Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 3 | * Video BOOT Graphics Card POST Module |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 4 | * |
| 5 | * ======================================================================== |
Kumar Gala | 6a6d948 | 2009-07-28 21:49:52 -0500 | [diff] [blame] | 6 | * Copyright (C) 2007 Freescale Semiconductor, Inc. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 7 | * Jason Jin <Jason.jin@freescale.com> |
| 8 | * |
| 9 | * Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved. |
| 10 | * |
| 11 | * This file may be distributed and/or modified under the terms of the |
| 12 | * GNU General Public License version 2.0 as published by the Free |
| 13 | * Software Foundation and appearing in the file LICENSE.GPL included |
| 14 | * in the packaging of this file. |
| 15 | * |
| 16 | * Licensees holding a valid Commercial License for this product from |
| 17 | * SciTech Software, Inc. may use this file in accordance with the |
| 18 | * Commercial License Agreement provided with the Software. |
| 19 | * |
| 20 | * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING |
| 21 | * THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 22 | * PURPOSE. |
| 23 | * |
| 24 | * See http://www.scitechsoft.com/license/ for information about |
| 25 | * the licensing options available and how to purchase a Commercial |
| 26 | * License Agreement. |
| 27 | * |
| 28 | * Contact license@scitechsoft.com if any conditions of this licensing |
| 29 | * are not clear to you, or you have questions about licensing options. |
| 30 | * |
| 31 | * ======================================================================== |
| 32 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 33 | * Language: ANSI C |
| 34 | * Environment: Linux Kernel |
| 35 | * Developer: Kendall Bennett |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 36 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 37 | * Description: Module to implement booting PCI/AGP controllers on the |
| 38 | * bus. We use the x86 real mode emulator to run the BIOS on |
| 39 | * graphics controllers to bring the cards up. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 40 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 41 | * Note that at present this module does *not* support |
| 42 | * multiple controllers. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 43 | * |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 44 | * The orignal name of this file is warmboot.c. |
| 45 | * Jason ported this file to u-boot to run the ATI video card |
| 46 | * BIOS in u-boot. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 47 | ****************************************************************************/ |
| 48 | #include <common.h> |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 49 | #include <bios_emul.h> |
| 50 | #include <errno.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 51 | #include <log.h> |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 52 | #include <malloc.h> |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 53 | #include <vbe.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 54 | #include <linux/delay.h> |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 55 | #include "biosemui.h" |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 56 | |
| 57 | /* Length of the BIOS image */ |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 58 | #define MAX_BIOSLEN (128 * 1024L) |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 59 | |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 60 | /* Place to save PCI BAR's that we change and later restore */ |
| 61 | static u32 saveROMBaseAddress; |
| 62 | static u32 saveBaseAddress10; |
| 63 | static u32 saveBaseAddress14; |
| 64 | static u32 saveBaseAddress18; |
| 65 | static u32 saveBaseAddress20; |
| 66 | |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 67 | /* Addres im memory of VBE region */ |
| 68 | const int vbe_offset = 0x2000; |
| 69 | |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 70 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 71 | static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info, |
| 72 | u32 x86_dword_ptr) |
| 73 | { |
| 74 | u32 seg_ofs, flat; |
| 75 | |
| 76 | seg_ofs = le32_to_cpu(x86_dword_ptr); |
| 77 | flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff); |
| 78 | if (flat >= 0xc0000) |
| 79 | return vga_info->BIOSImage + flat - 0xc0000; |
| 80 | else |
| 81 | return buf + (flat - vbe_offset); |
| 82 | } |
| 83 | |
| 84 | static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, |
| 85 | int vesa_mode, struct vbe_mode_info *mode_info) |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 86 | { |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 87 | void *buffer = (void *)(M.mem_base + vbe_offset); |
| 88 | u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00; |
| 89 | u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff; |
| 90 | struct vesa_mode_info *vm; |
| 91 | struct vbe_info *info; |
| 92 | const u16 *modes_bios, *ptr; |
| 93 | u16 *modes; |
| 94 | int size; |
| 95 | |
| 96 | debug("VBE: Getting information\n"); |
| 97 | regs->e.eax = VESA_GET_INFO; |
| 98 | regs->e.esi = buffer_seg; |
| 99 | regs->e.edi = buffer_adr; |
| 100 | info = buffer; |
| 101 | memset(info, '\0', sizeof(*info)); |
| 102 | strcpy(info->signature, "VBE2"); |
| 103 | BE_int86(0x10, regs, regs); |
| 104 | if (regs->e.eax != 0x4f) { |
| 105 | debug("VESA_GET_INFO: error %x\n", regs->e.eax); |
| 106 | return -ENOSYS; |
| 107 | } |
| 108 | debug("version %x\n", le16_to_cpu(info->version)); |
| 109 | debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 110 | info->oem_string_ptr)); |
| 111 | debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 112 | info->vendor_name_ptr)); |
| 113 | debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 114 | info->product_name_ptr)); |
| 115 | debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info, |
| 116 | info->product_rev_ptr)); |
| 117 | modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr); |
| 118 | debug("Modes: "); |
| 119 | for (ptr = modes_bios; *ptr != 0xffff; ptr++) |
| 120 | debug("%x ", le16_to_cpu(*ptr)); |
| 121 | debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4); |
| 122 | size = (ptr - modes_bios) * sizeof(u16) + 2; |
| 123 | modes = malloc(size); |
| 124 | if (!modes) |
| 125 | return -ENOMEM; |
| 126 | memcpy(modes, modes_bios, size); |
| 127 | |
| 128 | regs->e.eax = VESA_GET_CUR_MODE; |
| 129 | BE_int86(0x10, regs, regs); |
| 130 | if (regs->e.eax != 0x4f) { |
| 131 | debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax); |
| 132 | return -ENOSYS; |
| 133 | } |
| 134 | debug("Current mode %x\n", regs->e.ebx); |
| 135 | |
| 136 | for (ptr = modes; *ptr != 0xffff; ptr++) { |
| 137 | int mode = le16_to_cpu(*ptr); |
| 138 | bool linear_ok; |
| 139 | int attr; |
| 140 | |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 141 | debug("Mode %x: ", mode); |
| 142 | memset(buffer, '\0', sizeof(struct vbe_mode_info)); |
| 143 | regs->e.eax = VESA_GET_MODE_INFO; |
| 144 | regs->e.ebx = 0; |
| 145 | regs->e.ecx = mode; |
| 146 | regs->e.edx = 0; |
| 147 | regs->e.esi = buffer_seg; |
| 148 | regs->e.edi = buffer_adr; |
| 149 | BE_int86(0x10, regs, regs); |
| 150 | if (regs->e.eax != 0x4f) { |
| 151 | debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); |
| 152 | continue; |
| 153 | } |
| 154 | memcpy(mode_info->mode_info_block, buffer, |
| 155 | sizeof(struct vesa_mode_info)); |
| 156 | mode_info->valid = true; |
| 157 | vm = &mode_info->vesa; |
| 158 | attr = le16_to_cpu(vm->mode_attributes); |
| 159 | linear_ok = attr & 0x80; |
| 160 | debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n", |
| 161 | le16_to_cpu(vm->x_resolution), |
| 162 | le16_to_cpu(vm->y_resolution), |
| 163 | vm->bits_per_pixel, vm->memory_model, |
| 164 | linear_ok ? "OK" : "not available", |
| 165 | attr); |
| 166 | debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n", |
| 167 | vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos, |
| 168 | vm->red_mask_size, vm->green_mask_size, |
| 169 | vm->blue_mask_size); |
| 170 | } |
| 171 | |
| 172 | return 0; |
| 173 | } |
| 174 | |
| 175 | static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode, |
| 176 | struct vbe_mode_info *mode_info) |
| 177 | { |
| 178 | void *buffer = (void *)(M.mem_base + vbe_offset); |
| 179 | u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00; |
| 180 | u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff; |
| 181 | struct vesa_mode_info *vm; |
| 182 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 183 | debug("VBE: Setting VESA mode %#04x\n", vesa_mode); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 184 | regs->e.eax = VESA_SET_MODE; |
| 185 | regs->e.ebx = vesa_mode; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 186 | /* request linear framebuffer mode and don't clear display */ |
| 187 | regs->e.ebx |= (1 << 14) | (1 << 15); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 188 | BE_int86(0x10, regs, regs); |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 189 | if (regs->e.eax != 0x4f) { |
| 190 | debug("VESA_SET_MODE: error %x\n", regs->e.eax); |
| 191 | return -ENOSYS; |
| 192 | } |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 193 | |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 194 | memset(buffer, '\0', sizeof(struct vbe_mode_info)); |
| 195 | debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 196 | regs->e.eax = VESA_GET_MODE_INFO; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 197 | regs->e.ecx = vesa_mode; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 198 | regs->e.esi = buffer_seg; |
| 199 | regs->e.edi = buffer_adr; |
| 200 | BE_int86(0x10, regs, regs); |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 201 | if (regs->e.eax != 0x4f) { |
| 202 | debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); |
| 203 | return -ENOSYS; |
| 204 | } |
| 205 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 206 | memcpy(mode_info->mode_info_block, buffer, |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 207 | sizeof(struct vesa_mode_info)); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 208 | mode_info->valid = true; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 209 | mode_info->video_mode = vesa_mode; |
| 210 | vm = &mode_info->vesa; |
| 211 | vm->x_resolution = le16_to_cpu(vm->x_resolution); |
| 212 | vm->y_resolution = le16_to_cpu(vm->y_resolution); |
| 213 | vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline); |
| 214 | vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr); |
| 215 | vm->mode_attributes = le16_to_cpu(vm->mode_attributes); |
| 216 | debug("VBE: Init complete\n"); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 217 | |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 218 | return 0; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 219 | } |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 220 | #endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 221 | |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 222 | /**************************************************************************** |
| 223 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 224 | pcidev - PCI device info for the video card on the bus to boot |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 225 | vga_info - BIOS emulator VGA info structure |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 226 | |
| 227 | REMARKS: |
| 228 | This function executes the BIOS POST code on the controller. We assume that |
| 229 | at this stage the controller has its I/O and memory space enabled and |
| 230 | that all other controllers are in a disabled state. |
| 231 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 232 | #ifdef CONFIG_DM_PCI |
| 233 | static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info, |
| 234 | int vesa_mode, struct vbe_mode_info *mode_info) |
| 235 | #else |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 236 | static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info, |
| 237 | int vesa_mode, struct vbe_mode_info *mode_info) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 238 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 239 | { |
| 240 | RMREGS regs; |
| 241 | RMSREGS sregs; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 242 | #ifdef CONFIG_DM_PCI |
| 243 | pci_dev_t bdf; |
| 244 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 245 | |
| 246 | /* Determine the value to store in AX for BIOS POST. Per the PCI specs, |
| 247 | AH must contain the bus and AL must contain the devfn, encoded as |
| 248 | (dev << 3) | fn |
| 249 | */ |
| 250 | memset(®s, 0, sizeof(regs)); |
| 251 | memset(&sregs, 0, sizeof(sregs)); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 252 | #ifdef CONFIG_DM_PCI |
| 253 | bdf = dm_pci_get_bdf(pcidev); |
| 254 | regs.x.ax = (int)PCI_BUS(bdf) << 8 | |
| 255 | (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf); |
| 256 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 257 | regs.x.ax = ((int)PCI_BUS(pcidev) << 8) | |
| 258 | ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 259 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 260 | /*Setup the X86 emulator for the VGA BIOS*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 261 | BE_setVGA(vga_info); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 262 | |
| 263 | /*Execute the BIOS POST code*/ |
| 264 | BE_callRealMode(0xC000, 0x0003, ®s, &sregs); |
| 265 | |
| 266 | /*Cleanup and exit*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 267 | BE_getVGA(vga_info); |
| 268 | |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 269 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 270 | /* Useful for debugging */ |
| 271 | if (0) |
| 272 | atibios_debug_mode(vga_info, ®s, vesa_mode, mode_info); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 273 | if (vesa_mode != -1) |
| 274 | atibios_set_vesa_mode(®s, vesa_mode, mode_info); |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 275 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 276 | } |
| 277 | |
| 278 | /**************************************************************************** |
| 279 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 280 | pcidev - PCI device info for the video card on the bus |
| 281 | bar - Place to return the base address register offset to use |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 282 | |
| 283 | RETURNS: |
| 284 | The address to use to map the secondary BIOS (AGP devices) |
| 285 | |
| 286 | REMARKS: |
| 287 | Searches all the PCI base address registers for the device looking for a |
| 288 | memory mapping that is large enough to hold our ROM BIOS. We usually end up |
| 289 | finding the framebuffer mapping (usually BAR 0x10), and we use this mapping |
| 290 | to map the BIOS for the device into. We use a mapping that is already |
| 291 | assigned to the device to ensure the memory range will be passed through |
| 292 | by any PCI->PCI or AGP->PCI bridge that may be present. |
| 293 | |
| 294 | NOTE: Usually this function is only used for AGP devices, but it may be |
| 295 | used for PCI devices that have already been POST'ed and the BIOS |
| 296 | ROM base address has been zero'ed out. |
| 297 | |
| 298 | NOTE: This function leaves the original memory aperture disabled by leaving |
| 299 | it programmed to all 1's. It must be restored to the correct value |
| 300 | later. |
| 301 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 302 | #ifdef CONFIG_DM_PCI |
| 303 | static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar) |
| 304 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 305 | static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 306 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 307 | { |
| 308 | u32 base, size; |
| 309 | |
| 310 | for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) { |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 311 | #ifdef CONFIG_DM_PCI |
| 312 | dm_pci_read_config32(pcidev, *bar, &base); |
| 313 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 314 | pci_read_config_dword(pcidev, *bar, &base); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 315 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 316 | if (!(base & 0x1)) { |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 317 | #ifdef CONFIG_DM_PCI |
| 318 | dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF); |
| 319 | dm_pci_read_config32(pcidev, *bar, &size); |
| 320 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 321 | pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF); |
| 322 | pci_read_config_dword(pcidev, *bar, &size); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 323 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 324 | size = ~(size & ~0xFF) + 1; |
| 325 | if (size >= MAX_BIOSLEN) |
| 326 | return base & ~0xFF; |
| 327 | } |
| 328 | } |
| 329 | return 0; |
| 330 | } |
| 331 | |
| 332 | /**************************************************************************** |
| 333 | REMARKS: |
| 334 | Some non-x86 Linux kernels map PCI relocateable I/O to values that |
| 335 | are above 64K, which will not work with the BIOS image that requires |
| 336 | the offset for the I/O ports to be a maximum of 16-bits. Ideally |
| 337 | someone should fix the kernel to map the I/O ports for VGA compatible |
| 338 | devices to a different location (or just all I/O ports since it is |
| 339 | unlikely you can have enough devices in the machine to use up all |
| 340 | 64K of the I/O space - a total of more than 256 cards would be |
| 341 | necessary). |
| 342 | |
| 343 | Anyway to fix this we change all I/O mapped base registers and |
| 344 | chop off the top bits. |
| 345 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 346 | #ifdef CONFIG_DM_PCI |
| 347 | static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base) |
| 348 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 349 | static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 350 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 351 | { |
| 352 | if ((*base & 0x1) && (*base > 0xFFFE)) { |
| 353 | *base &= 0xFFFF; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 354 | #ifdef CONFIG_DM_PCI |
| 355 | dm_pci_write_config32(pcidev, reg, *base); |
| 356 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 357 | pci_write_config_dword(pcidev, reg, *base); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 358 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 359 | |
| 360 | } |
| 361 | } |
| 362 | |
| 363 | /**************************************************************************** |
| 364 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 365 | pcidev - PCI device info for the video card on the bus |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 366 | |
| 367 | RETURNS: |
| 368 | Pointers to the mapped BIOS image |
| 369 | |
| 370 | REMARKS: |
| 371 | Maps a pointer to the BIOS image on the graphics card on the PCI bus. |
| 372 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 373 | #ifdef CONFIG_DM_PCI |
| 374 | void *PCI_mapBIOSImage(struct udevice *pcidev) |
| 375 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 376 | void *PCI_mapBIOSImage(pci_dev_t pcidev) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 377 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 378 | { |
Ed Swarthout | 224dad2 | 2010-03-31 15:52:40 -0500 | [diff] [blame] | 379 | u32 BIOSImageBus; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 380 | int BIOSImageBAR; |
| 381 | u8 *BIOSImage; |
| 382 | |
| 383 | /*Save PCI BAR registers that might get changed*/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 384 | #ifdef CONFIG_DM_PCI |
| 385 | dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress); |
| 386 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); |
| 387 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); |
| 388 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18); |
| 389 | dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); |
| 390 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 391 | pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress); |
| 392 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); |
| 393 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); |
| 394 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18); |
| 395 | pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 396 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 397 | |
| 398 | /*Fix up I/O base registers to less than 64K */ |
| 399 | if(saveBaseAddress14 != 0) |
| 400 | PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); |
| 401 | else |
| 402 | PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); |
| 403 | |
| 404 | /* Some cards have problems that stop us from being able to read the |
| 405 | BIOS image from the ROM BAR. To fix this we have to do some chipset |
| 406 | specific programming for different cards to solve this problem. |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 407 | */ |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 408 | |
Ed Swarthout | 224dad2 | 2010-03-31 15:52:40 -0500 | [diff] [blame] | 409 | BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR); |
| 410 | if (BIOSImageBus == 0) { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 411 | printf("Find bios addr error\n"); |
| 412 | return NULL; |
| 413 | } |
| 414 | |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 415 | #ifdef CONFIG_DM_PCI |
| 416 | BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus, |
| 417 | PCI_REGION_MEM, 0, MAP_NOCACHE); |
| 418 | |
| 419 | /*Change the PCI BAR registers to map it onto the bus.*/ |
| 420 | dm_pci_write_config32(pcidev, BIOSImageBAR, 0); |
| 421 | dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1); |
| 422 | #else |
Ed Swarthout | 224dad2 | 2010-03-31 15:52:40 -0500 | [diff] [blame] | 423 | BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus, |
| 424 | PCI_REGION_MEM, 0, MAP_NOCACHE); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 425 | |
| 426 | /*Change the PCI BAR registers to map it onto the bus.*/ |
| 427 | pci_write_config_dword(pcidev, BIOSImageBAR, 0); |
Ed Swarthout | 224dad2 | 2010-03-31 15:52:40 -0500 | [diff] [blame] | 428 | pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 429 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 430 | udelay(1); |
| 431 | |
| 432 | /*Check that the BIOS image is valid. If not fail, or return the |
| 433 | compiled in BIOS image if that option was enabled |
| 434 | */ |
| 435 | if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) { |
| 436 | return NULL; |
| 437 | } |
| 438 | |
| 439 | return BIOSImage; |
| 440 | } |
| 441 | |
| 442 | /**************************************************************************** |
| 443 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 444 | pcidev - PCI device info for the video card on the bus |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 445 | |
| 446 | REMARKS: |
| 447 | Unmaps the BIOS image for the device and restores framebuffer mappings |
| 448 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 449 | #ifdef CONFIG_DM_PCI |
| 450 | void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage) |
| 451 | { |
| 452 | dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress); |
| 453 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); |
| 454 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); |
| 455 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18); |
| 456 | dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20); |
| 457 | } |
| 458 | #else |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 459 | void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage) |
| 460 | { |
| 461 | pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress); |
| 462 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); |
| 463 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); |
| 464 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18); |
| 465 | pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20); |
| 466 | } |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 467 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 468 | |
| 469 | /**************************************************************************** |
| 470 | PARAMETERS: |
Wolfgang Denk | 96bb2e0 | 2007-08-06 02:17:36 +0200 | [diff] [blame] | 471 | pcidev - PCI device info for the video card on the bus to boot |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 472 | VGAInfo - BIOS emulator VGA info structure |
| 473 | |
| 474 | RETURNS: |
York Sun | 4a59809 | 2013-04-01 11:29:11 -0700 | [diff] [blame] | 475 | true if successfully initialised, false if not. |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 476 | |
| 477 | REMARKS: |
| 478 | Loads and POST's the display controllers BIOS, directly from the BIOS |
| 479 | image we can extract over the PCI bus. |
| 480 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 481 | #ifdef CONFIG_DM_PCI |
| 482 | static int PCI_postController(struct udevice *pcidev, uchar *bios_rom, |
| 483 | int bios_len, BE_VGAInfo *vga_info, |
| 484 | int vesa_mode, struct vbe_mode_info *mode_info) |
| 485 | #else |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 486 | static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len, |
| 487 | BE_VGAInfo *vga_info, int vesa_mode, |
| 488 | struct vbe_mode_info *mode_info) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 489 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 490 | { |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 491 | u32 bios_image_len; |
| 492 | uchar *mapped_bios; |
| 493 | uchar *copy_of_bios; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 494 | #ifdef CONFIG_DM_PCI |
| 495 | pci_dev_t bdf; |
| 496 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 497 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 498 | if (bios_rom) { |
| 499 | copy_of_bios = bios_rom; |
| 500 | bios_image_len = bios_len; |
| 501 | } else { |
| 502 | /* |
| 503 | * Allocate memory to store copy of BIOS from display |
| 504 | * controller |
| 505 | */ |
| 506 | mapped_bios = PCI_mapBIOSImage(pcidev); |
| 507 | if (mapped_bios == NULL) { |
| 508 | printf("videoboot: Video ROM failed to map!\n"); |
| 509 | return false; |
| 510 | } |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 511 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 512 | bios_image_len = mapped_bios[2] * 512; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 513 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 514 | copy_of_bios = malloc(bios_image_len); |
| 515 | if (copy_of_bios == NULL) { |
| 516 | printf("videoboot: Out of memory!\n"); |
| 517 | return false; |
| 518 | } |
| 519 | memcpy(copy_of_bios, mapped_bios, bios_image_len); |
| 520 | PCI_unmapBIOSImage(pcidev, mapped_bios); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 521 | } |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 522 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 523 | /*Save information in vga_info structure*/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 524 | #ifdef CONFIG_DM_PCI |
| 525 | bdf = dm_pci_get_bdf(pcidev); |
| 526 | vga_info->function = PCI_FUNC(bdf); |
| 527 | vga_info->device = PCI_DEV(bdf); |
| 528 | vga_info->bus = PCI_BUS(bdf); |
| 529 | #else |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 530 | vga_info->function = PCI_FUNC(pcidev); |
| 531 | vga_info->device = PCI_DEV(pcidev); |
| 532 | vga_info->bus = PCI_BUS(pcidev); |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 533 | #endif |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 534 | vga_info->pcidev = pcidev; |
| 535 | vga_info->BIOSImage = copy_of_bios; |
| 536 | vga_info->BIOSImageLen = bios_image_len; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 537 | |
| 538 | /*Now execute the BIOS POST for the device*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 539 | if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 540 | printf("videoboot: Video ROM image is invalid!\n"); |
| 541 | return false; |
| 542 | } |
| 543 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 544 | PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 545 | |
| 546 | /*Reset the size of the BIOS image to the final size*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 547 | vga_info->BIOSImageLen = copy_of_bios[2] * 512; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 548 | return true; |
| 549 | } |
| 550 | |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 551 | #ifdef CONFIG_DM_PCI |
| 552 | int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop) |
| 553 | #else |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 554 | int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 555 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 556 | { |
| 557 | BE_VGAInfo *VGAInfo; |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 558 | #ifdef CONFIG_DM_PCI |
| 559 | pci_dev_t bdf = dm_pci_get_bdf(pcidev); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 560 | |
| 561 | printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n", |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 562 | PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf)); |
| 563 | #else |
| 564 | printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n", |
| 565 | PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev)); |
| 566 | #endif |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 567 | /*Initialise the x86 BIOS emulator*/ |
| 568 | if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) { |
| 569 | printf("videoboot: Out of memory!\n"); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 570 | return -ENOMEM; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 571 | } |
| 572 | memset(VGAInfo, 0, sizeof(*VGAInfo)); |
| 573 | BE_init(0, 65536, VGAInfo, 0); |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 574 | *vga_infop = VGAInfo; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 575 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 576 | return 0; |
| 577 | } |
| 578 | |
| 579 | void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void)) |
| 580 | { |
| 581 | X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func); |
| 582 | } |
| 583 | |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 584 | #ifdef CONFIG_DM_PCI |
| 585 | int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len, |
| 586 | BE_VGAInfo *vga_info, int clean_up, int vesa_mode, |
| 587 | struct vbe_mode_info *mode_info) |
| 588 | #else |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 589 | int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len, |
| 590 | BE_VGAInfo *vga_info, int clean_up, int vesa_mode, |
| 591 | struct vbe_mode_info *mode_info) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 592 | #endif |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 593 | { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 594 | /*Post all the display controller BIOS'es*/ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 595 | if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info, |
| 596 | vesa_mode, mode_info)) |
| 597 | return -EINVAL; |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 598 | |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 599 | /* |
| 600 | * Cleanup and exit the emulator if requested. If the BIOS emulator |
| 601 | * is needed after booting the card, we will not call BE_exit and |
| 602 | * leave it enabled for further use (ie: VESA driver etc). |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 603 | */ |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 604 | if (clean_up) { |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 605 | BE_exit(); |
Bin Meng | a264c90 | 2015-04-24 15:48:05 +0800 | [diff] [blame] | 606 | if (vga_info->BIOSImage && |
Simon Glass | cc40906 | 2016-09-25 21:33:06 -0600 | [diff] [blame] | 607 | (ulong)(vga_info->BIOSImage) != 0xc0000) |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 608 | free(vga_info->BIOSImage); |
| 609 | free(vga_info); |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 610 | } |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 611 | |
| 612 | return 0; |
| 613 | } |
| 614 | |
| 615 | /**************************************************************************** |
| 616 | PARAMETERS: |
| 617 | pcidev - PCI device info for the video card on the bus to boot |
| 618 | pVGAInfo - Place to return VGA info structure is requested |
| 619 | cleanUp - true to clean up on exit, false to leave emulator active |
| 620 | |
| 621 | REMARKS: |
| 622 | Boots the PCI/AGP video card on the bus using the Video ROM BIOS image |
| 623 | and the X86 BIOS emulator module. |
| 624 | ****************************************************************************/ |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 625 | #ifdef CONFIG_DM_PCI |
| 626 | int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo, |
| 627 | int clean_up) |
| 628 | #else |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 629 | int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up) |
Simon Glass | d3e0c8f | 2016-01-17 16:11:09 -0700 | [diff] [blame] | 630 | #endif |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 631 | { |
| 632 | BE_VGAInfo *VGAInfo; |
| 633 | int ret; |
| 634 | |
| 635 | ret = biosemu_setup(pcidev, &VGAInfo); |
| 636 | if (ret) |
| 637 | return false; |
| 638 | ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL); |
| 639 | if (ret) |
| 640 | return false; |
| 641 | |
| 642 | /* Return VGA info pointer if the caller requested it*/ |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 643 | if (pVGAInfo) |
| 644 | *pVGAInfo = VGAInfo; |
Simon Glass | acda1cc | 2014-11-14 20:56:40 -0700 | [diff] [blame] | 645 | |
Jason Jin | a63ce95 | 2007-07-06 08:34:56 +0800 | [diff] [blame] | 646 | return true; |
| 647 | } |