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git01.mediatek.com / filogic / uboot / 82073c0da15db98ae9f33f56c5e09a31ac6e0e80 / . / arch / arm / dts / imx93-var-som-symphony-u-boot.dtsi
blob: 1193fc0ca19a4ed104aa932bdbda6a699a4d0d8a [file] [log] [blame]
Mathieu Othacehe2415f1d2023-12-29 11:55:23 +0100[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2022 NXP
4 * Copyright 2023 Variscite Ltd.
5 */
6
7#include "imx93-u-boot.dtsi"
8
9/ {
10 wdt-reboot {
11 compatible = "wdt-reboot";
12 wdt = <&wdog3>;
13 bootph-pre-ram;
14 bootph-some-ram;
15 };
16
17 aliases {
18 ethernet0 = &eqos;
19 ethernet1 = &fec;
20 };
21
22 firmware {
23 optee {
24 compatible = "linaro,optee-tz";
25 method = "smc";
26 };
27 };
28};
29
30&{/soc@0} {
31 bootph-all;
32 bootph-pre-ram;
33};
34
35&aips1 {
36 bootph-pre-ram;
37 bootph-all;
38};
39
40&aips2 {
41 bootph-pre-ram;
42 bootph-some-ram;
43};
44
45&aips3 {
46 bootph-pre-ram;
47 bootph-some-ram;
48};
49
50&iomuxc {
51 bootph-pre-ram;
52 bootph-some-ram;
53};
54
55&reg_usdhc2_vmmc {
56 u-boot,off-on-delay-us = <20000>;
57 bootph-pre-ram;
58 bootph-some-ram;
59};
60
61&pinctrl_reg_usdhc2_vmmc {
62 bootph-pre-ram;
63};
64
65&pinctrl_uart1 {
66 bootph-pre-ram;
67 bootph-some-ram;
68};
69
70&pinctrl_usdhc2 {
71 bootph-pre-ram;
72 bootph-some-ram;
73};
74
75&gpio1 {
76 bootph-pre-ram;
77 bootph-some-ram;
78};
79
80&gpio2 {
81 bootph-pre-ram;
82 bootph-some-ram;
83};
84
85&gpio3 {
86 bootph-pre-ram;
87 bootph-some-ram;
88};
89
90&gpio4 {
91 bootph-pre-ram;
92 bootph-some-ram;
93};
94
95&lpuart1 {
96 bootph-pre-ram;
97 bootph-some-ram;
98};
99
100&usdhc1 {
101 bootph-pre-ram;
102 bootph-some-ram;
103};
104
105&usdhc2 {
106 bootph-pre-ram;
107 bootph-some-ram;
108 fsl,signal-voltage-switch-extra-delay-ms = <8>;
109};
110
111&ethphy0 {
112 reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
113 reset-assert-us = <15000>;
114 reset-deassert-us = <100000>;
115};
116
117&ethphy1 {
118 reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>;
119 reset-assert-us = <15000>;
120 reset-deassert-us = <100000>;
121};
122
123&s4muap {
124 bootph-pre-ram;
125 bootph-some-ram;
126 status = "okay";
127};
128
129&clk {
130 bootph-all;
131 bootph-pre-ram;
132 /delete-property/ assigned-clocks;
133 /delete-property/ assigned-clock-rates;
134};
135
136&osc_32k {
137 bootph-all;
138 bootph-pre-ram;
139};
140
141&osc_24m {
142 bootph-all;
143 bootph-pre-ram;
144};
145
146&clk_ext1 {
147 bootph-all;
148 bootph-pre-ram;
149};
150
151/*
152 * The two nodes below won't be needed once nxp,pca9451a
153 * support is added to the Linux kernel.
154 */
155&iomuxc {
156 pinctrl_lpi2c3: lpi2c3grp {
157 bootph-pre-ram;
158 fsl,pins = <
159 MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
160 MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
161 >;
162 };
163};
164
165&lpi2c3 {
166 bootph-pre-ram;
167 bootph-some-ram;
168 clock-frequency = <400000>;
169 pinctrl-names = "default", "sleep";
170 pinctrl-0 = <&pinctrl_lpi2c3>;
171 pinctrl-1 = <&pinctrl_lpi2c3>;
172 status = "okay";
173
174 pmic@25 {
175 bootph-pre-ram;
176 bootph-some-ram;
177 compatible = "nxp,pca9451a";
178 reg = <0x25>;
179 pinctrl-names = "default";
180
181 regulators {
182 bootph-pre-ram;
183 buck1: BUCK1 {
184 regulator-name = "BUCK1";
185 regulator-min-microvolt = <600000>;
186 regulator-max-microvolt = <2187500>;
187 regulator-boot-on;
188 regulator-always-on;
189 regulator-ramp-delay = <3125>;
190 };
191
192 buck2: BUCK2 {
193 regulator-name = "BUCK2";
194 regulator-min-microvolt = <600000>;
195 regulator-max-microvolt = <2187500>;
196 regulator-boot-on;
197 regulator-always-on;
198 regulator-ramp-delay = <3125>;
199 };
200
201 buck4: BUCK4{
202 regulator-name = "BUCK4";
203 regulator-min-microvolt = <600000>;
204 regulator-max-microvolt = <3400000>;
205 regulator-boot-on;
206 regulator-always-on;
207 };
208
209 buck5: BUCK5{
210 regulator-name = "BUCK5";
211 regulator-min-microvolt = <600000>;
212 regulator-max-microvolt = <3400000>;
213 regulator-boot-on;
214 regulator-always-on;
215 };
216
217 buck6: BUCK6 {
218 regulator-name = "BUCK6";
219 regulator-min-microvolt = <600000>;
220 regulator-max-microvolt = <3400000>;
221 regulator-boot-on;
222 regulator-always-on;
223 };
224
225 ldo1: LDO1 {
226 regulator-name = "LDO1";
227 regulator-min-microvolt = <1600000>;
228 regulator-max-microvolt = <3300000>;
229 regulator-boot-on;
230 regulator-always-on;
231 };
232
233 ldo2: LDO2 {
234 regulator-name = "LDO2";
235 regulator-min-microvolt = <800000>;
236 regulator-max-microvolt = <1150000>;
237 regulator-boot-on;
238 regulator-always-on;
239 };
240
241 ldo3: LDO3 {
242 regulator-name = "LDO3";
243 regulator-min-microvolt = <800000>;
244 regulator-max-microvolt = <3300000>;
245 regulator-boot-on;
246 regulator-always-on;
247 };
248
249 ldo4: LDO4 {
250 regulator-name = "LDO4";
251 regulator-min-microvolt = <800000>;
252 regulator-max-microvolt = <3300000>;
253 regulator-boot-on;
254 regulator-always-on;
255 };
256
257 ldo5: LDO5 {
258 regulator-name = "LDO5";
259 regulator-min-microvolt = <1800000>;
260 regulator-max-microvolt = <3300000>;
261 regulator-boot-on;
262 regulator-always-on;
263 };
264 };
265 };
266};