blob: 18a8b24b71f788c130f6007d4410cecad64cbcb0 [file] [log] [blame]
Tom Warren81f1ec72014-01-24 12:46:17 -07001#include "skeleton.dtsi"
2
3/ {
4 compatible = "nvidia,tegra124";
5
6 tegra_car: clock@60006000 {
7 compatible = "nvidia,tegra124-car";
8 reg = <0x60006000 0x1000>;
9 #clock-cells = <1>;
10 };
11
12 apbdma: dma@60020000 {
13 compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
14 reg = <0x60020000 0x1400>;
15 interrupts = <0 104 0x04
16 0 105 0x04
17 0 106 0x04
18 0 107 0x04
19 0 108 0x04
20 0 109 0x04
21 0 110 0x04
22 0 111 0x04
23 0 112 0x04
24 0 113 0x04
25 0 114 0x04
26 0 115 0x04
27 0 116 0x04
28 0 117 0x04
29 0 118 0x04
30 0 119 0x04
31 0 128 0x04
32 0 129 0x04
33 0 130 0x04
34 0 131 0x04
35 0 132 0x04
36 0 133 0x04
37 0 134 0x04
38 0 135 0x04
39 0 136 0x04
40 0 137 0x04
41 0 138 0x04
42 0 139 0x04
43 0 140 0x04
44 0 141 0x04
45 0 142 0x04
46 0 143 0x04>;
47 };
48
49 gpio: gpio@6000d000 {
50 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
51 reg = <0x6000d000 0x1000>;
52 interrupts = <0 32 0x04
53 0 33 0x04
54 0 34 0x04
55 0 35 0x04
56 0 55 0x04
57 0 87 0x04
58 0 89 0x04
59 0 125 0x04>;
60 #gpio-cells = <2>;
61 gpio-controller;
62 #interrupt-cells = <2>;
63 interrupt-controller;
64 };
65
66 i2c@7000c000 {
67 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
68 reg = <0x7000c000 0x100>;
69 interrupts = <0 38 0x04>;
70 #address-cells = <1>;
71 #size-cells = <0>;
72 clocks = <&tegra_car 12>;
73 status = "disabled";
74 };
75
76 i2c@7000c400 {
77 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
78 reg = <0x7000c400 0x100>;
79 interrupts = <0 84 0x04>;
80 #address-cells = <1>;
81 #size-cells = <0>;
82 clocks = <&tegra_car 54>;
83 status = "disabled";
84 };
85
86 i2c@7000c500 {
87 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
88 reg = <0x7000c500 0x100>;
89 interrupts = <0 92 0x04>;
90 #address-cells = <1>;
91 #size-cells = <0>;
92 clocks = <&tegra_car 67>;
93 status = "disabled";
94 };
95
96 i2c@7000c700 {
97 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
98 reg = <0x7000c700 0x100>;
99 interrupts = <0 120 0x04>;
100 #address-cells = <1>;
101 #size-cells = <0>;
102 clocks = <&tegra_car 103>;
103 status = "disabled";
104 };
105
106 i2c@7000d000 {
107 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
108 reg = <0x7000d000 0x100>;
109 interrupts = <0 53 0x04>;
110 #address-cells = <1>;
111 #size-cells = <0>;
112 clocks = <&tegra_car 47>;
113 status = "disabled";
114 };
115
116 i2c@7000d100 {
117 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
118 reg = <0x7000d100 0x100>;
119 interrupts = <0 53 0x04>;
120 #address-cells = <1>;
121 #size-cells = <0>;
122 clocks = <&tegra_car 47>;
123 status = "disabled";
124 };
125
126 spi@7000d400 {
127 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
128 reg = <0x7000d400 0x200>;
129 interrupts = <0 59 0x04>;
130 nvidia,dma-request-selector = <&apbdma 15>;
131 #address-cells = <1>;
132 #size-cells = <0>;
133 status = "disabled";
134 clocks = <&tegra_car 41>;
135 };
136
137 spi@7000d600 {
138 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
139 reg = <0x7000d600 0x200>;
140 interrupts = <0 82 0x04>;
141 nvidia,dma-request-selector = <&apbdma 16>;
142 #address-cells = <1>;
143 #size-cells = <0>;
144 status = "disabled";
145 clocks = <&tegra_car 44>;
146 };
147
148 spi@7000d800 {
149 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
150 reg = <0x7000d800 0x200>;
151 interrupts = <0 83 0x04>;
152 nvidia,dma-request-selector = <&apbdma 17>;
153 #address-cells = <1>;
154 #size-cells = <0>;
155 status = "disabled";
156 clocks = <&tegra_car 46>;
157 };
158
159 spi@7000da00 {
160 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
161 reg = <0x7000da00 0x200>;
162 interrupts = <0 93 0x04>;
163 nvidia,dma-request-selector = <&apbdma 18>;
164 #address-cells = <1>;
165 #size-cells = <0>;
166 status = "disabled";
167 clocks = <&tegra_car 68>;
168 };
169
170 spi@7000dc00 {
171 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
172 reg = <0x7000dc00 0x200>;
173 interrupts = <0 94 0x04>;
174 nvidia,dma-request-selector = <&apbdma 27>;
175 #address-cells = <1>;
176 #size-cells = <0>;
177 status = "disabled";
178 clocks = <&tegra_car 104>;
179 };
180
181 spi@7000de00 {
182 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
183 reg = <0x7000de00 0x200>;
184 interrupts = <0 79 0x04>;
185 nvidia,dma-request-selector = <&apbdma 28>;
186 #address-cells = <1>;
187 #size-cells = <0>;
188 status = "disabled";
189 clocks = <&tegra_car 105>;
190 };
191
192 sdhci@700b0000 {
193 compatible = "nvidia,tegra124-sdhci";
194 reg = <0x700b0000 0x200>;
195 interrupts = <0 14 0x04>;
196 clocks = <&tegra_car 14>;
197 status = "disabled";
198 };
199
200 sdhci@700b0200 {
201 compatible = "nvidia,tegra124-sdhci";
202 reg = <0x700b0200 0x200>;
203 interrupts = <0 15 0x04>;
204 clocks = <&tegra_car 9>;
205 status = "disabled";
206 };
207
208 sdhci@700b0400 {
209 compatible = "nvidia,tegra124-sdhci";
210 reg = <0x700b0400 0x200>;
211 interrupts = <0 19 0x04>;
212 clocks = <&tegra_car 69>;
213 status = "disabled";
214 };
215
216 sdhci@700b0600 {
217 compatible = "nvidia,tegra124-sdhci";
218 reg = <0x700b0600 0x200>;
219 interrupts = <0 31 0x04>;
220 clocks = <&tegra_car 15>;
221 status = "disabled";
222 };
223
224 usb@7d000000 {
225 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
226 reg = <0x7d000000 0x4000>;
227 interrupts = < 52 >;
228 phy_type = "utmi";
229 clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */
230 status = "disabled";
231 };
232
233 usb@7d004000 {
234 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
235 reg = <0x7d004000 0x4000>;
236 interrupts = < 53 >;
237 phy_type = "hsic";
238 clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */
239 status = "disabled";
240 };
241
242 usb@7d008000 {
243 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
244 reg = <0x7d008000 0x4000>;
245 interrupts = < 129 >;
246 phy_type = "utmi";
247 clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */
248 status = "disabled";
249 };
250};