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Michael Schwingen1ae44282008-01-16 19:51:14 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * hardware register definitions for the AcTux-2 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef _ACTUX2_HW_H
27#define _ACTUX2_HW_H
28
29/* 0 = LED off,1 = green, 2 = red, 3 = orange */
30#define ACTUX2_LED1(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
31#define ACTUX2_LED2(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
32#define ACTUX2_LED3(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
33#define ACTUX2_LED4(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
34
35#define ACTUX2_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS
36#define ACTUX2_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
37#define ACTUX2_OPTION (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0)
38
39/*
40 * GPIO settings
41 */
42#define CFG_GPIO_DBGINT 0
43#define CFG_GPIO_ETHINT 1
44#define CFG_GPIO_ETHRST 2 /* Out */
45#define CFG_GPIO_LED5_GN 3 /* Out */
46#define CFG_GPIO_UNUSED4 4
47#define CFG_GPIO_UNUSED5 5
48#define CFG_GPIO_DSR 6 /* Out */
49#define CFG_GPIO_DCD 7 /* Out */
50#define CFG_GPIO_IPAC_INT 8
51#define CFG_GPIO_DBGJUMPER 9
52#define CFG_GPIO_BUTTON1 10
53#define CFG_GPIO_DBGSENSE 11
54#define CFG_GPIO_DTR 12
55#define CFG_GPIO_IORST 13 /* Out */
56#define CFG_GPIO_PCI_CLK 14 /* Out */
57#define CFG_GPIO_EXTBUS_CLK 15 /* Out */
58
59#endif