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Nishanth Menonc5ac2c72022-05-25 13:38:48 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * AM625 SK dts file for R5 SPL
4 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
5 */
6
7#include "k3-am625-sk.dts"
8#include "k3-am62x-sk-ddr4-1600MTs.dtsi"
9#include "k3-am62-ddr.dtsi"
10
11#include "k3-am625-sk-u-boot.dtsi"
12
13/ {
14 aliases {
15 remoteproc0 = &sysctrler;
16 remoteproc1 = &a53_0;
17 serial0 = &wkup_uart0;
18 serial3 = &main_uart1;
19 };
20
21 chosen {
22 stdout-path = "serial2:115200n8";
23 tick-timer = &timer1;
24 };
25
26 memory@80000000 {
27 device_type = "memory";
28 /* 2G RAM */
29 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
30
31 };
32
33 reserved-memory {
34 #address-cells = <2>;
35 #size-cells = <2>;
36 ranges;
37
38 secure_ddr: optee@9e800000 {
39 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
40 alignment = <0x1000>;
41 no-map;
42 };
43 };
44
45 a53_0: a53@0 {
46 compatible = "ti,am654-rproc";
47 reg = <0x00 0x00a90000 0x00 0x10>;
48 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
49 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
50 resets = <&k3_reset 135 0>;
51 clocks = <&k3_clks 61 0>;
52 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
53 assigned-clock-parents = <&k3_clks 61 2>;
54 assigned-clock-rates = <200000000>, <1200000000>;
55 ti,sci = <&dmsc>;
56 ti,sci-proc-id = <32>;
57 ti,sci-host-id = <10>;
58 u-boot,dm-spl;
59 };
60
61 dm_tifs: dm-tifs {
62 compatible = "ti,j721e-dm-sci";
63 ti,host-id = <36>;
64 ti,secure-host;
65 mbox-names = "rx", "tx";
66 mboxes= <&secure_proxy_main 22>,
67 <&secure_proxy_main 23>;
68 u-boot,dm-spl;
69 };
70};
71
72&dmsc {
73 mboxes= <&secure_proxy_main 0>,
74 <&secure_proxy_main 1>,
75 <&secure_proxy_main 0>;
76 mbox-names = "rx", "tx", "notify";
77 ti,host-id = <35>;
78 ti,secure-host;
79};
80
81&cbass_main {
82 sa3_secproxy: secproxy@44880000 {
83 u-boot,dm-spl;
84 compatible = "ti,am654-secure-proxy";
85 #mbox-cells = <1>;
86 reg-names = "rt", "scfg", "target_data";
87 reg = <0x00 0x44880000 0x00 0x20000>,
88 <0x0 0x44860000 0x0 0x20000>,
89 <0x0 0x43600000 0x0 0x10000>;
90 };
91
92 sysctrler: sysctrler {
93 compatible = "ti,am654-system-controller";
94 mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>;
95 mbox-names = "tx", "rx", "boot_notify";
96 u-boot,dm-spl;
97 };
98};
99
100&mcu_pmx0 {
101 u-boot,dm-spl;
102 wkup_uart0_pins_default: wkup-uart0-pins-default {
103 pinctrl-single,pins = <
104 AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
105 AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
106 AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
107 AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
108 >;
109 u-boot,dm-spl;
110 };
111};
112
113&main_pmx0 {
114 u-boot,dm-spl;
115 main_uart1_pins_default: main-uart1-pins-default {
116 pinctrl-single,pins = <
117 AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
118 AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
119 AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
120 AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
121 >;
122 u-boot,dm-spl;
123 };
124};
125
126/* WKUP UART0 is used for DM firmware logs */
127&wkup_uart0 {
128 pinctrl-names = "default";
129 pinctrl-0 = <&wkup_uart0_pins_default>;
130 status = "okay";
131 u-boot,dm-spl;
132};
133
134/* Main UART1 is used for TIFS firmware logs */
135&main_uart1 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&main_uart1_pins_default>;
138 status = "okay";
139 u-boot,dm-spl;
140};