Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Driver for SST serial flashes |
| 3 | * |
| 4 | * (C) Copyright 2000-2002 |
| 5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 6 | * Copyright 2008, Network Appliance Inc. |
| 7 | * Jason McMullan <mcmullan@netapp.com> |
| 8 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. |
| 9 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
| 10 | * Copyright (c) 2008-2009 Analog Devices Inc. |
| 11 | * |
| 12 | * Licensed under the GPL-2 or later. |
| 13 | */ |
| 14 | |
| 15 | #include <common.h> |
| 16 | #include <malloc.h> |
| 17 | #include <spi_flash.h> |
| 18 | |
| 19 | #include "spi_flash_internal.h" |
| 20 | |
| 21 | #define CMD_SST_WREN 0x06 /* Write Enable */ |
| 22 | #define CMD_SST_WRDI 0x04 /* Write Disable */ |
| 23 | #define CMD_SST_RDSR 0x05 /* Read Status Register */ |
| 24 | #define CMD_SST_WRSR 0x01 /* Write Status Register */ |
| 25 | #define CMD_SST_READ 0x03 /* Read Data Bytes */ |
| 26 | #define CMD_SST_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ |
| 27 | #define CMD_SST_BP 0x02 /* Byte Program */ |
| 28 | #define CMD_SST_AAI_WP 0xAD /* Auto Address Increment Word Program */ |
| 29 | #define CMD_SST_SE 0x20 /* Sector Erase */ |
| 30 | |
| 31 | #define SST_SR_WIP (1 << 0) /* Write-in-Progress */ |
| 32 | #define SST_SR_WEL (1 << 1) /* Write enable */ |
| 33 | #define SST_SR_BP0 (1 << 2) /* Block Protection 0 */ |
| 34 | #define SST_SR_BP1 (1 << 3) /* Block Protection 1 */ |
| 35 | #define SST_SR_BP2 (1 << 4) /* Block Protection 2 */ |
| 36 | #define SST_SR_AAI (1 << 6) /* Addressing mode */ |
| 37 | #define SST_SR_BPL (1 << 7) /* BP bits lock */ |
| 38 | |
| 39 | struct sst_spi_flash_params { |
| 40 | u8 idcode1; |
| 41 | u16 nr_sectors; |
| 42 | const char *name; |
| 43 | }; |
| 44 | |
| 45 | struct sst_spi_flash { |
| 46 | struct spi_flash flash; |
| 47 | const struct sst_spi_flash_params *params; |
| 48 | }; |
| 49 | |
| 50 | static inline struct sst_spi_flash *to_sst_spi_flash(struct spi_flash *flash) |
| 51 | { |
| 52 | return container_of(flash, struct sst_spi_flash, flash); |
| 53 | } |
| 54 | |
| 55 | #define SST_SECTOR_SIZE (4 * 1024) |
| 56 | static const struct sst_spi_flash_params sst_spi_flash_table[] = { |
| 57 | { |
Mike Frysinger | ca3e83b | 2009-06-19 03:27:28 -0400 | [diff] [blame] | 58 | .idcode1 = 0x8d, |
| 59 | .nr_sectors = 128, |
| 60 | .name = "SST25VF040B", |
| 61 | },{ |
| 62 | .idcode1 = 0x8e, |
| 63 | .nr_sectors = 256, |
| 64 | .name = "SST25VF080B", |
| 65 | },{ |
| 66 | .idcode1 = 0x41, |
| 67 | .nr_sectors = 512, |
| 68 | .name = "SST25VF016B", |
| 69 | },{ |
| 70 | .idcode1 = 0x4a, |
| 71 | .nr_sectors = 1024, |
| 72 | .name = "SST25VF032B", |
| 73 | },{ |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 74 | .idcode1 = 0x01, |
Mike Frysinger | ad4897e | 2009-06-19 03:20:06 -0400 | [diff] [blame] | 75 | .nr_sectors = 16, |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 76 | .name = "SST25WF512", |
| 77 | },{ |
| 78 | .idcode1 = 0x02, |
Mike Frysinger | ad4897e | 2009-06-19 03:20:06 -0400 | [diff] [blame] | 79 | .nr_sectors = 32, |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 80 | .name = "SST25WF010", |
| 81 | },{ |
| 82 | .idcode1 = 0x03, |
Mike Frysinger | ad4897e | 2009-06-19 03:20:06 -0400 | [diff] [blame] | 83 | .nr_sectors = 64, |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 84 | .name = "SST25WF020", |
| 85 | },{ |
| 86 | .idcode1 = 0x04, |
Mike Frysinger | ad4897e | 2009-06-19 03:20:06 -0400 | [diff] [blame] | 87 | .nr_sectors = 128, |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 88 | .name = "SST25WF040", |
| 89 | }, |
| 90 | }; |
| 91 | |
| 92 | static int |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 93 | sst_enable_writing(struct spi_flash *flash) |
| 94 | { |
| 95 | int ret = spi_flash_cmd(flash->spi, CMD_SST_WREN, NULL, 0); |
| 96 | if (ret) |
| 97 | debug("SF: Enabling Write failed\n"); |
| 98 | return ret; |
| 99 | } |
| 100 | |
| 101 | static int |
| 102 | sst_disable_writing(struct spi_flash *flash) |
| 103 | { |
| 104 | int ret = spi_flash_cmd(flash->spi, CMD_SST_WRDI, NULL, 0); |
| 105 | if (ret) |
| 106 | debug("SF: Disabling Write failed\n"); |
| 107 | return ret; |
| 108 | } |
| 109 | |
| 110 | static int |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 111 | sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf) |
| 112 | { |
| 113 | int ret; |
| 114 | u8 cmd[4] = { |
| 115 | CMD_SST_BP, |
| 116 | offset >> 16, |
| 117 | offset >> 8, |
| 118 | offset, |
| 119 | }; |
| 120 | |
| 121 | debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", |
| 122 | spi_w8r8(flash->spi, CMD_SST_RDSR), buf, cmd[0], offset); |
| 123 | |
| 124 | ret = sst_enable_writing(flash); |
| 125 | if (ret) |
| 126 | return ret; |
| 127 | |
| 128 | ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1); |
| 129 | if (ret) |
| 130 | return ret; |
| 131 | |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 132 | return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | static int |
| 136 | sst_write(struct spi_flash *flash, u32 offset, size_t len, const void *buf) |
| 137 | { |
| 138 | size_t actual, cmd_len; |
| 139 | int ret; |
| 140 | u8 cmd[4]; |
| 141 | |
| 142 | ret = spi_claim_bus(flash->spi); |
| 143 | if (ret) { |
| 144 | debug("SF: Unable to claim SPI bus\n"); |
| 145 | return ret; |
| 146 | } |
| 147 | |
| 148 | /* If the data is not word aligned, write out leading single byte */ |
| 149 | actual = offset % 2; |
| 150 | if (actual) { |
| 151 | ret = sst_byte_write(flash, offset, buf); |
| 152 | if (ret) |
| 153 | goto done; |
| 154 | } |
| 155 | offset += actual; |
| 156 | |
| 157 | ret = sst_enable_writing(flash); |
| 158 | if (ret) |
| 159 | goto done; |
| 160 | |
| 161 | cmd_len = 4; |
| 162 | cmd[0] = CMD_SST_AAI_WP; |
| 163 | cmd[1] = offset >> 16; |
| 164 | cmd[2] = offset >> 8; |
| 165 | cmd[3] = offset; |
| 166 | |
| 167 | for (; actual < len - 1; actual += 2) { |
| 168 | debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", |
| 169 | spi_w8r8(flash->spi, CMD_SST_RDSR), buf + actual, cmd[0], |
| 170 | offset); |
| 171 | |
| 172 | ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, |
| 173 | buf + actual, 2); |
| 174 | if (ret) { |
| 175 | debug("SF: sst word program failed\n"); |
| 176 | break; |
| 177 | } |
| 178 | |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 179 | ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 180 | if (ret) |
| 181 | break; |
| 182 | |
| 183 | cmd_len = 1; |
| 184 | offset += 2; |
| 185 | } |
| 186 | |
| 187 | if (!ret) |
| 188 | ret = sst_disable_writing(flash); |
| 189 | |
| 190 | /* If there is a single trailing byte, write it out */ |
| 191 | if (!ret && actual != len) |
| 192 | ret = sst_byte_write(flash, offset, buf + actual); |
| 193 | |
| 194 | done: |
| 195 | debug("SF: sst: program %s %zu bytes @ 0x%zx\n", |
| 196 | ret ? "failure" : "success", len, offset - actual); |
| 197 | |
| 198 | spi_release_bus(flash->spi); |
| 199 | return ret; |
| 200 | } |
| 201 | |
Mike Frysinger | 53421bb | 2011-01-10 02:20:13 -0500 | [diff] [blame] | 202 | int sst_erase(struct spi_flash *flash, u32 offset, size_t len) |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 203 | { |
Richard Retanubun | b0148dc | 2011-02-16 16:37:22 -0500 | [diff] [blame] | 204 | return spi_flash_cmd_erase(flash, CMD_SST_SE, offset, len); |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 205 | } |
| 206 | |
| 207 | static int |
| 208 | sst_unlock(struct spi_flash *flash) |
| 209 | { |
| 210 | int ret; |
| 211 | u8 cmd, status; |
| 212 | |
| 213 | ret = sst_enable_writing(flash); |
| 214 | if (ret) |
| 215 | return ret; |
| 216 | |
| 217 | cmd = CMD_SST_WRSR; |
| 218 | status = 0; |
| 219 | ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &status, 1); |
| 220 | if (ret) |
| 221 | debug("SF: Unable to set status byte\n"); |
| 222 | |
| 223 | debug("SF: sst: status = %x\n", spi_w8r8(flash->spi, CMD_SST_RDSR)); |
| 224 | |
| 225 | return ret; |
| 226 | } |
| 227 | |
| 228 | struct spi_flash * |
| 229 | spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode) |
| 230 | { |
| 231 | const struct sst_spi_flash_params *params; |
| 232 | struct sst_spi_flash *stm; |
| 233 | size_t i; |
| 234 | |
| 235 | for (i = 0; i < ARRAY_SIZE(sst_spi_flash_table); ++i) { |
| 236 | params = &sst_spi_flash_table[i]; |
| 237 | if (params->idcode1 == idcode[2]) |
| 238 | break; |
| 239 | } |
| 240 | |
| 241 | if (i == ARRAY_SIZE(sst_spi_flash_table)) { |
| 242 | debug("SF: Unsupported SST ID %02x\n", idcode[1]); |
| 243 | return NULL; |
| 244 | } |
| 245 | |
| 246 | stm = malloc(sizeof(*stm)); |
| 247 | if (!stm) { |
| 248 | debug("SF: Failed to allocate memory\n"); |
| 249 | return NULL; |
| 250 | } |
| 251 | |
| 252 | stm->params = params; |
| 253 | stm->flash.spi = spi; |
| 254 | stm->flash.name = params->name; |
| 255 | |
| 256 | stm->flash.write = sst_write; |
| 257 | stm->flash.erase = sst_erase; |
Mike Frysinger | 816790c | 2011-04-12 01:34:55 -0400 | [diff] [blame^] | 258 | stm->flash.read = spi_flash_cmd_read_fast; |
Richard Retanubun | b0148dc | 2011-02-16 16:37:22 -0500 | [diff] [blame] | 259 | stm->flash.sector_size = SST_SECTOR_SIZE; |
| 260 | stm->flash.size = stm->flash.sector_size * params->nr_sectors; |
Mike Frysinger | f1cb7c8 | 2009-03-27 19:27:58 -0400 | [diff] [blame] | 261 | |
| 262 | /* Flash powers up read-only, so clear BP# bits */ |
| 263 | sst_unlock(&stm->flash); |
| 264 | |
| 265 | return &stm->flash; |
| 266 | } |