| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* Tegra114 clock control functions */ |
| 7 | |
| 8 | #ifndef _TEGRA114_CLOCK_H_ |
| 9 | #define _TEGRA114_CLOCK_H_ |
| 10 | |
| 11 | #include <asm/arch-tegra/clock.h> |
| 12 | |
| 13 | /* CLK_RST_CONTROLLER_OSC_CTRL_0 */ |
| 14 | #define OSC_FREQ_SHIFT 28 |
| 15 | #define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT) |
| 16 | |
| Thierry Reding | 0fca329 | 2015-09-08 11:38:04 +0200 | [diff] [blame] | 17 | /* CLK_RST_CONTROLLER_PLLC_MISC_0 */ |
| 18 | #define PLLC_IDDQ (1 << 26) |
| 19 | |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 20 | #endif /* _TEGRA114_CLOCK_H_ */ |