| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 2 | /* |
| 3 | * Configuration for Xilinx ZynqMP Nand Flash utility |
| 4 | * |
| 5 | * (C) Copyright 2018 Xilinx, Inc. |
| 6 | * Michal Simek <michal.simek@xilinx.com> |
| 7 | * Siva Durga Prasad Paladugu <sivadur@xilinx.com> |
| Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_ZYNQMP_MINI_NAND_H |
| 11 | #define __CONFIG_ZYNQMP_MINI_NAND_H |
| 12 | |
| 13 | #include <configs/xilinx_zynqmp_mini.h> |
| 14 | |
| 15 | #define CONFIG_SYS_ICACHE_OFF |
| Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 16 | #define CONFIG_SYS_SDRAM_SIZE 0x1000000 |
| 17 | #define CONFIG_SYS_SDRAM_BASE 0x0 |
| Siva Durga Prasad Paladugu | 95dbaaf | 2018-01-05 16:16:15 +0530 | [diff] [blame] | 18 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000) |
| 19 | #define CONFIG_SYS_MALLOC_LEN 0x800000 |
| 20 | |
| 21 | #endif /* __CONFIG_ZYNQMP_MINI_NAND_H */ |