blob: e041e7e0afbd48c685f6b09de4554e30ccddccdf [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +01002/*
3 * (C) Copyright 2014 Angelo Dureghello <angelo@sysam.it>
4 *
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +01005 */
6
7#ifndef __IMMAP_5307__
8#define __IMMAP_5307__
9
10#define MMAP_SIM (CONFIG_SYS_MBAR + 0x00000000)
11#define MMAP_INTC (CONFIG_SYS_MBAR + 0x00000040)
12#define MMAP_CSM (CONFIG_SYS_MBAR + 0x00000080)
13#define MMAP_DRAMC (CONFIG_SYS_MBAR + 0x00000100)
14#define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000140)
15#define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000180)
16#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x000001C0)
17#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000200)
18#define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00000244)
19
20typedef struct sim {
21 u8 rsr;
22 u8 sypcr;
23 u8 swivr;
24 u8 swsr;
25 u16 par;
26 u8 irqpar;
27 u8 res1;
28 u8 pllcr;
29 u8 res2;
30 u16 res3;
31 u8 mpark;
32 u8 res4;
33 u16 res5;
34 u32 res6;
35} sim_t;
36
37typedef struct intctrl {
38 u32 ipr;
39 u32 imr;
40 u16 res7;
41 u8 res8;
42 u8 avr;
43 u8 icr0;
44 u8 icr1;
45 u8 icr2;
46 u8 icr3;
47 u8 icr4;
48 u8 icr5;
49 u8 icr6;
50 u8 icr7;
51 u8 icr8;
52 u8 icr9;
53 u16 res9;
54} intctrl_t;
55
56typedef struct csm {
57 u16 csar0; /* Chip-select Address */
58 u16 res1;
59 u32 csmr0; /* Chip-select Mask */
60 u16 res2;
61 u16 cscr0; /* Chip-select Control */
62 u16 csar1;
63 u16 res3;
64 u32 csmr1;
65 u16 res4;
66 u16 cscr1;
67 u16 csar2;
68 u16 res5;
69 u32 csmr2;
70 u16 res6;
71 u16 cscr2;
72 u16 csar3;
73 u16 res7;
74 u32 csmr3;
75 u16 res8;
76 u16 cscr3;
77 u16 csar4;
78 u16 res9;
79 u32 csmr4;
80 u16 res10;
81 u16 cscr4;
82 u16 csar5;
83 u16 res11;
84 u32 csmr5;
85 u16 res12;
86 u16 cscr5;
87 u16 csar6;
88 u16 res13;
89 u32 csmr6;
90 u16 res14;
91 u16 cscr6;
92 u16 csar7;
93 u16 res15;
94 u32 csmr7;
95 u16 res16;
96 u16 cscr7;
97} csm_t;
98
99typedef struct sdramctrl {
100 u16 dcr;
101 u16 res1;
102 u32 res2;
103 u32 dacr0;
104 u32 dmr0;
105 u32 dacr1;
106 u32 dmr1;
107} sdramctrl_t;
108
109typedef struct gpio {
110 u16 paddr;
111 u16 res1;
112 u16 padat;
113 u16 res2;
114} gpio_t;
115
116#endif /* __IMMAP_5307__ */
117