Blame - configs/chromebook_bob_defconfig - filogic/uboot

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Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	1	CONFIG_ARM=y
				2	CONFIG_ARCH_ROCKCHIP=y
				3	CONFIG_SYS_TEXT_BASE=0x00200000
				4	CONFIG_SPL_GPIO_SUPPORT=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	5	CONFIG_ROCKCHIP_RK3399=y
				6	CONFIG_ROCKCHIP_BOOT_MODE_REG=0
				7	CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
				8	# CONFIG_SPL_MMC_SUPPORT is not set
				9	CONFIG_TARGET_CHROMEBOOK_BOB=y
Tom Rini	c9285bf	2019-04-29 15:54:04 -0400	[diff] [blame]	10	CONFIG_NR_DRAM_BANKS=1
				11	CONFIG_SPL_STACK_R_ADDR=0x80000
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	12	CONFIG_DEBUG_UART_BASE=0xff1a0000
				13	CONFIG_DEBUG_UART_CLOCK=24000000
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	14	CONFIG_SPL_SPI_FLASH_SUPPORT=y
				15	CONFIG_SPL_SPI_SUPPORT=y
				16	CONFIG_DEBUG_UART=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	17	CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
				18	# CONFIG_DISPLAY_CPUINFO is not set
				19	CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Goldschmidt	cc4078c	2018-09-30 14:31:53 +0200	[diff] [blame]	20	CONFIG_SPL_TEXT_BASE=0xff8c2000
Kever Yang	2067354	2019-08-20 11:47:02 +0800	[diff] [blame]	21	# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	22	CONFIG_SPL_STACK_R=y
				23	CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
				24	CONFIG_SPL_SPI_LOAD=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	25	CONFIG_CMD_BOOTZ=y
				26	CONFIG_CMD_GPIO=y
				27	CONFIG_CMD_GPT=y
				28	CONFIG_CMD_I2C=y
				29	CONFIG_CMD_MMC=y
				30	CONFIG_CMD_SF=y
				31	CONFIG_CMD_SF_TEST=y
				32	CONFIG_CMD_SPI=y
				33	CONFIG_CMD_USB=y
				34	# CONFIG_CMD_SETEXPR is not set
				35	CONFIG_CMD_TIME=y
				36	CONFIG_CMD_PMIC=y
				37	CONFIG_CMD_REGULATOR=y
				38	CONFIG_CMD_LOG=y
				39	CONFIG_SPL_OF_CONTROL=y
				40	CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
				41	CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
				42	CONFIG_ENV_IS_IN_MMC=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	43	CONFIG_ROCKCHIP_GPIO=y
				44	CONFIG_I2C_CROS_EC_TUNNEL=y
				45	CONFIG_SYS_I2C_ROCKCHIP=y
				46	CONFIG_I2C_MUX=y
				47	CONFIG_DM_KEYBOARD=y
				48	CONFIG_CROS_EC_KEYB=y
				49	CONFIG_CROS_EC=y
				50	CONFIG_CROS_EC_SPI=y
				51	CONFIG_PWRSEQ=y
				52	CONFIG_MMC_DW=y
				53	CONFIG_MMC_DW_ROCKCHIP=y
				54	CONFIG_MMC_SDHCI=y
				55	CONFIG_MMC_SDHCI_ROCKCHIP=y
				56	CONFIG_SPI_FLASH=y
Patrick Delaunay	0df8104	2019-02-27 15:20:36 +0100	[diff] [blame]	57	CONFIG_SF_DEFAULT_SPEED=20000000
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	58	CONFIG_SPI_FLASH_GIGADEVICE=y
				59	CONFIG_DM_ETH=y
				60	CONFIG_ETH_DESIGNWARE=y
				61	CONFIG_GMAC_ROCKCHIP=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	62	CONFIG_PMIC_RK8XX=y
				63	CONFIG_REGULATOR_PWM=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	64	CONFIG_REGULATOR_RK8XX=y
				65	CONFIG_PWM_ROCKCHIP=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	66	CONFIG_DEBUG_UART_SHIFT=2
				67	CONFIG_ROCKCHIP_SPI=y
				68	CONFIG_SYSRESET=y
				69	CONFIG_USB=y
				70	CONFIG_USB_XHCI_HCD=y
				71	CONFIG_USB_XHCI_DWC3=y
				72	CONFIG_USB_EHCI_HCD=y
				73	CONFIG_USB_EHCI_GENERIC=y
				74	CONFIG_USB_HOST_ETHER=y
				75	CONFIG_USB_ETHER_ASIX=y
				76	CONFIG_USB_ETHER_ASIX88179=y
				77	CONFIG_USB_ETHER_MCS7830=y
				78	CONFIG_USB_ETHER_RTL8152=y
				79	CONFIG_USB_ETHER_SMSC95XX=y
Simon Glass	8fbf992	2019-01-21 14:53:36 -0700	[diff] [blame]	80	CONFIG_CMD_DHRYSTONE=y
				81	CONFIG_ERRNO_STR=y