Andrew Davis | b8d8cd4 | 2022-08-30 15:54:29 +0530 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_K3=y |
| 3 | CONFIG_TI_SECURE_DEVICE=y |
| 4 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
| 5 | CONFIG_SYS_MALLOC_F_LEN=0x8000 |
| 6 | CONFIG_SPL_GPIO=y |
| 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 9 | CONFIG_NR_DRAM_BANKS=2 |
| 10 | CONFIG_SOC_K3_J721E=y |
| 11 | CONFIG_TARGET_J7200_A72_EVM=y |
| 12 | CONFIG_ENV_SIZE=0x20000 |
| 13 | CONFIG_ENV_OFFSET=0x680000 |
| 14 | CONFIG_DM_GPIO=y |
| 15 | CONFIG_SPL_DM_SPI=y |
| 16 | CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" |
| 17 | CONFIG_SPL_TEXT_BASE=0x80080000 |
| 18 | CONFIG_SPL_MMC=y |
| 19 | CONFIG_SPL_SERIAL=y |
| 20 | CONFIG_SPL_DRIVERS_MISC=y |
| 21 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| 22 | CONFIG_ENV_OFFSET_REDUND=0x6A0000 |
| 23 | CONFIG_SPL_FS_FAT=y |
| 24 | CONFIG_SPL_LIBDISK_SUPPORT=y |
| 25 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| 26 | CONFIG_SPL_SPI=y |
| 27 | # CONFIG_PSCI_RESET is not set |
| 28 | CONFIG_DISTRO_DEFAULTS=y |
| 29 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 30 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 |
| 31 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| 32 | CONFIG_SPL_LOAD_FIT=y |
| 33 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 |
Andrew Davis | b8d8cd4 | 2022-08-30 15:54:29 +0530 | [diff] [blame] | 34 | # CONFIG_USE_SPL_FIT_GENERATOR is not set |
| 35 | CONFIG_OF_BOARD_SETUP=y |
| 36 | CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" |
| 37 | CONFIG_LOGLEVEL=7 |
| 38 | CONFIG_SPL_MAX_SIZE=0xc0000 |
| 39 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 40 | CONFIG_SPL_BSS_START_ADDR=0x80a00000 |
| 41 | CONFIG_SPL_BSS_MAX_SIZE=0x80000 |
| 42 | CONFIG_SPL_BOARD_INIT=y |
| 43 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| 44 | CONFIG_SPL_STACK_R=y |
| 45 | CONFIG_SYS_SPL_MALLOC=y |
| 46 | CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 |
| 47 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
| 48 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 |
| 49 | CONFIG_SPL_DMA=y |
| 50 | CONFIG_SPL_ENV_SUPPORT=y |
| 51 | CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" |
| 52 | CONFIG_SPL_I2C=y |
| 53 | CONFIG_SPL_DM_MAILBOX=y |
| 54 | CONFIG_SPL_MTD_SUPPORT=y |
| 55 | CONFIG_SPL_DM_SPI_FLASH=y |
| 56 | CONFIG_SPL_NOR_SUPPORT=y |
| 57 | CONFIG_SPL_DM_RESET=y |
| 58 | CONFIG_SPL_POWER_DOMAIN=y |
| 59 | CONFIG_SPL_RAM_SUPPORT=y |
| 60 | CONFIG_SPL_RAM_DEVICE=y |
| 61 | # CONFIG_SPL_SPI_FLASH_TINY is not set |
| 62 | CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y |
| 63 | CONFIG_SPL_SPI_LOAD=y |
| 64 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 |
| 65 | CONFIG_SPL_USB_GADGET=y |
| 66 | CONFIG_SPL_DFU=y |
| 67 | CONFIG_SPL_YMODEM_SUPPORT=y |
| 68 | CONFIG_SYS_MAXARGS=64 |
| 69 | CONFIG_CMD_ASKENV=y |
| 70 | CONFIG_CMD_DFU=y |
| 71 | # CONFIG_CMD_FLASH is not set |
| 72 | CONFIG_CMD_GPIO=y |
| 73 | CONFIG_CMD_GPT=y |
| 74 | CONFIG_CMD_I2C=y |
| 75 | CONFIG_CMD_MMC=y |
| 76 | CONFIG_CMD_MTD=y |
| 77 | CONFIG_CMD_REMOTEPROC=y |
| 78 | CONFIG_CMD_UFS=y |
| 79 | CONFIG_CMD_USB=y |
| 80 | CONFIG_CMD_USB_MASS_STORAGE=y |
| 81 | # CONFIG_CMD_SETEXPR is not set |
| 82 | CONFIG_CMD_TIME=y |
| 83 | CONFIG_CMD_EXT4_WRITE=y |
| 84 | CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" |
| 85 | CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" |
| 86 | CONFIG_CMD_UBI=y |
| 87 | # CONFIG_ISO_PARTITION is not set |
| 88 | # CONFIG_SPL_EFI_PARTITION is not set |
| 89 | CONFIG_OF_CONTROL=y |
| 90 | CONFIG_SPL_OF_CONTROL=y |
| 91 | CONFIG_SPL_MULTI_DTB_FIT=y |
| 92 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y |
| 93 | CONFIG_ENV_OVERWRITE=y |
| 94 | CONFIG_ENV_IS_IN_MMC=y |
| 95 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
| 96 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 97 | CONFIG_NET_RANDOM_ETHADDR=y |
Andrew Davis | b8d8cd4 | 2022-08-30 15:54:29 +0530 | [diff] [blame] | 98 | CONFIG_SPL_DM=y |
| 99 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 100 | CONFIG_REGMAP=y |
| 101 | CONFIG_SPL_REGMAP=y |
| 102 | CONFIG_SYSCON=y |
| 103 | CONFIG_SPL_SYSCON=y |
| 104 | CONFIG_SPL_OF_TRANSLATE=y |
| 105 | CONFIG_CLK=y |
| 106 | CONFIG_SPL_CLK=y |
| 107 | CONFIG_CLK_CCF=y |
| 108 | CONFIG_CLK_TI_SCI=y |
| 109 | CONFIG_DFU_MMC=y |
| 110 | CONFIG_DFU_RAM=y |
| 111 | CONFIG_DFU_SF=y |
| 112 | CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 |
| 113 | CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 |
| 114 | CONFIG_DMA_CHANNELS=y |
| 115 | CONFIG_TI_K3_NAVSS_UDMA=y |
| 116 | CONFIG_USB_FUNCTION_FASTBOOT=y |
| 117 | CONFIG_FASTBOOT_BUF_ADDR=0x82000000 |
| 118 | CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 |
| 119 | CONFIG_FASTBOOT_FLASH=y |
| 120 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
| 121 | CONFIG_FASTBOOT_CMD_OEM_FORMAT=y |
| 122 | CONFIG_TI_SCI_PROTOCOL=y |
| 123 | CONFIG_DA8XX_GPIO=y |
| 124 | CONFIG_DM_PCA953X=y |
| 125 | CONFIG_DM_I2C=y |
| 126 | CONFIG_DM_I2C_GPIO=y |
| 127 | CONFIG_SYS_I2C_OMAP24XX=y |
| 128 | CONFIG_DM_MAILBOX=y |
| 129 | CONFIG_K3_SEC_PROXY=y |
| 130 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 131 | CONFIG_MMC_IO_VOLTAGE=y |
| 132 | CONFIG_MMC_UHS_SUPPORT=y |
| 133 | CONFIG_MMC_HS400_SUPPORT=y |
| 134 | CONFIG_SPL_MMC_HS400_SUPPORT=y |
| 135 | CONFIG_MMC_SDHCI=y |
| 136 | CONFIG_MMC_SDHCI_ADMA=y |
| 137 | CONFIG_SPL_MMC_SDHCI_ADMA=y |
| 138 | CONFIG_MMC_SDHCI_AM654=y |
| 139 | CONFIG_MTD=y |
| 140 | CONFIG_DM_MTD=y |
| 141 | CONFIG_MTD_NOR_FLASH=y |
Tom Rini | 01fe814 | 2022-12-02 16:42:20 -0500 | [diff] [blame] | 142 | CONFIG_FLASH_SHOW_PROGRESS=0 |
Andrew Davis | b8d8cd4 | 2022-08-30 15:54:29 +0530 | [diff] [blame] | 143 | CONFIG_CFI_FLASH=y |
| 144 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y |
| 145 | CONFIG_FLASH_CFI_MTD=y |
| 146 | CONFIG_SYS_FLASH_CFI=y |
| 147 | CONFIG_HBMC_AM654=y |
| 148 | CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y |
| 149 | CONFIG_DM_SPI_FLASH=y |
| 150 | CONFIG_SPI_FLASH_STMICRO=y |
| 151 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| 152 | CONFIG_SPI_FLASH_MTD=y |
| 153 | CONFIG_MULTIPLEXER=y |
| 154 | CONFIG_MUX_MMIO=y |
| 155 | CONFIG_PHY_FIXED=y |
Andrew Davis | b8d8cd4 | 2022-08-30 15:54:29 +0530 | [diff] [blame] | 156 | CONFIG_TI_AM65_CPSW_NUSS=y |
| 157 | CONFIG_PHY=y |
| 158 | CONFIG_SPL_PHY=y |
| 159 | CONFIG_PHY_CADENCE_TORRENT=y |
| 160 | CONFIG_PHY_J721E_WIZ=y |
| 161 | CONFIG_PINCTRL=y |
| 162 | # CONFIG_PINCTRL_GENERIC is not set |
| 163 | CONFIG_SPL_PINCTRL=y |
| 164 | # CONFIG_SPL_PINCTRL_GENERIC is not set |
| 165 | CONFIG_PINCTRL_SINGLE=y |
| 166 | CONFIG_POWER_DOMAIN=y |
| 167 | CONFIG_TI_SCI_POWER_DOMAIN=y |
| 168 | CONFIG_DM_REGULATOR=y |
| 169 | CONFIG_DM_REGULATOR_FIXED=y |
| 170 | CONFIG_DM_REGULATOR_GPIO=y |
| 171 | CONFIG_RAM=y |
| 172 | CONFIG_SPL_RAM=y |
| 173 | CONFIG_REMOTEPROC_TI_K3_R5F=y |
| 174 | CONFIG_DM_RESET=y |
| 175 | CONFIG_RESET_TI_SCI=y |
| 176 | CONFIG_SCSI=y |
| 177 | CONFIG_DM_SCSI=y |
| 178 | CONFIG_DM_SERIAL=y |
| 179 | CONFIG_SOC_DEVICE=y |
| 180 | CONFIG_SOC_DEVICE_TI_K3=y |
| 181 | CONFIG_SOC_TI=y |
| 182 | CONFIG_SPI=y |
| 183 | CONFIG_DM_SPI=y |
| 184 | CONFIG_CADENCE_QSPI=y |
| 185 | CONFIG_HAS_CQSPI_REF_CLK=y |
| 186 | CONFIG_CQSPI_REF_CLK=133333333 |
| 187 | CONFIG_SYSRESET=y |
| 188 | CONFIG_SPL_SYSRESET=y |
| 189 | CONFIG_SYSRESET_TI_SCI=y |
| 190 | CONFIG_USB=y |
| 191 | CONFIG_DM_USB_GADGET=y |
| 192 | CONFIG_SPL_DM_USB_GADGET=y |
| 193 | CONFIG_USB_XHCI_HCD=y |
| 194 | CONFIG_USB_CDNS3=y |
| 195 | CONFIG_USB_CDNS3_GADGET=y |
| 196 | CONFIG_USB_CDNS3_HOST=y |
| 197 | CONFIG_SPL_USB_CDNS3_GADGET=y |
| 198 | CONFIG_USB_GADGET=y |
| 199 | CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" |
| 200 | CONFIG_USB_GADGET_VENDOR_NUM=0x0451 |
| 201 | CONFIG_USB_GADGET_PRODUCT_NUM=0x6164 |
| 202 | CONFIG_UFS=y |
| 203 | CONFIG_CADENCE_UFS=y |
| 204 | CONFIG_TI_J721E_UFS=y |
| 205 | CONFIG_OF_LIBFDT_OVERLAY=y |