blob: 528839a33de4da3061059cc5f136b241e91123dd [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andy Flemingaecf6fc2011-04-08 02:10:27 -05002/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Andy Flemingb36a4d42014-07-25 17:39:08 -05004 * Andy Fleming <afleming@gmail.com>
Andy Flemingaecf6fc2011-04-08 02:10:27 -05005 *
Andy Flemingaecf6fc2011-04-08 02:10:27 -05006 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7 */
8
9#ifndef _PHY_H
10#define _PHY_H
11
Simon Glass992b6032020-07-19 10:15:39 -060012#include <log.h>
13#include <phy_interface.h>
14#include <dm/ofnode.h>
15#include <dm/read.h>
Simon Glassfb6f4822020-02-03 07:36:17 -070016#include <linux/errno.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050017#include <linux/list.h>
18#include <linux/mii.h>
19#include <linux/ethtool.h>
20#include <linux/mdio.h>
Simon Glass992b6032020-07-19 10:15:39 -060021
22struct udevice;
Andy Flemingaecf6fc2011-04-08 02:10:27 -050023
Hannes Schmelzerda494602017-03-23 15:11:43 +010024#define PHY_FIXED_ID 0xa5a55a5a
Samuel Mendoza-Jonas2325c442019-06-18 11:37:17 +100025#define PHY_NCSI_ID 0xbeefcafe
26
Siva Durga Prasad Paladugud5c4e1e2018-11-27 11:49:11 +053027/*
28 * There is no actual id for this.
29 * This is just a dummy id for gmii2rgmmi converter.
30 */
31#define PHY_GMII2RGMII_ID 0x5a5a5a5a
Hannes Schmelzerda494602017-03-23 15:11:43 +010032
Andy Flemingaecf6fc2011-04-08 02:10:27 -050033#define PHY_MAX_ADDR 32
34
Shaohui Xie62a7b922016-01-28 15:55:46 +080035#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
36
Florian Fainelli33bbc242016-01-13 16:59:33 +030037#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
Andy Flemingaecf6fc2011-04-08 02:10:27 -050038 SUPPORTED_TP | \
39 SUPPORTED_MII)
40
Florian Fainelli33bbc242016-01-13 16:59:33 +030041#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
42 SUPPORTED_10baseT_Full)
43
44#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
45 SUPPORTED_100baseT_Full)
46
47#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
Andy Flemingaecf6fc2011-04-08 02:10:27 -050048 SUPPORTED_1000baseT_Full)
49
Florian Fainelli33bbc242016-01-13 16:59:33 +030050#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
51 PHY_100BT_FEATURES | \
52 PHY_DEFAULT_FEATURES)
53
Radu Pirea (NXP OSS)f2d36cb2021-06-18 21:58:30 +030054#define PHY_100BT1_FEATURES (SUPPORTED_TP | \
55 SUPPORTED_MII | \
56 SUPPORTED_100baseT_Full)
57
Florian Fainelli33bbc242016-01-13 16:59:33 +030058#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
59 PHY_1000BT_FEATURES)
60
Andy Flemingaecf6fc2011-04-08 02:10:27 -050061#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
62 SUPPORTED_10000baseT_Full)
63
Stefan Roeseb6af5572014-10-22 12:13:15 +020064#ifndef PHY_ANEG_TIMEOUT
Andy Flemingaecf6fc2011-04-08 02:10:27 -050065#define PHY_ANEG_TIMEOUT 4000
Stefan Roeseb6af5572014-10-22 12:13:15 +020066#endif
Andy Flemingaecf6fc2011-04-08 02:10:27 -050067
68
Andy Flemingaecf6fc2011-04-08 02:10:27 -050069struct phy_device;
70
71#define MDIO_NAME_LEN 32
72
73struct mii_dev {
74 struct list_head link;
75 char name[MDIO_NAME_LEN];
76 void *priv;
77 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
78 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
79 u16 val);
80 int (*reset)(struct mii_dev *bus);
81 struct phy_device *phymap[PHY_MAX_ADDR];
82 u32 phy_mask;
83};
84
85/* struct phy_driver: a structure which defines PHY behavior
86 *
87 * uid will contain a number which represents the PHY. During
88 * startup, the driver will poll the PHY to find out what its
89 * UID--as defined by registers 2 and 3--is. The 32-bit result
90 * gotten from the PHY will be masked to
91 * discard any bits which may change based on revision numbers
92 * unimportant to functionality
93 *
94 */
95struct phy_driver {
96 char *name;
97 unsigned int uid;
98 unsigned int mask;
99 unsigned int mmds;
100
101 u32 features;
102
103 /* Called to do any driver startup necessities */
104 /* Will be called during phy_connect */
105 int (*probe)(struct phy_device *phydev);
106
107 /* Called to configure the PHY, and modify the controller
108 * based on the results. Should be called after phy_connect */
109 int (*config)(struct phy_device *phydev);
110
111 /* Called when starting up the controller */
112 int (*startup)(struct phy_device *phydev);
113
114 /* Called when bringing down the controller */
115 int (*shutdown)(struct phy_device *phydev);
116
Stefano Babic6b8c5972013-09-02 15:42:30 +0200117 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
118 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
119 u16 val);
Carlo Caione4de87e22019-02-08 17:25:06 +0000120
121 /* Phy specific driver override for reading a MMD register */
122 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
123
124 /* Phy specific driver override for writing a MMD register */
125 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
126 u16 val);
127
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500128 struct list_head list;
Alex Marginean1fd54162019-11-14 18:28:29 +0200129
130 /* driver private data */
131 ulong data;
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500132};
133
134struct phy_device {
135 /* Information about the PHY type */
136 /* And management functions */
137 struct mii_dev *bus;
138 struct phy_driver *drv;
139 void *priv;
140
Simon Glassdbad3462015-04-05 16:07:39 -0600141#ifdef CONFIG_DM_ETH
142 struct udevice *dev;
Grygorii Strashko6189c062018-07-05 12:02:48 -0500143 ofnode node;
Simon Glassdbad3462015-04-05 16:07:39 -0600144#else
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500145 struct eth_device *dev;
Simon Glassdbad3462015-04-05 16:07:39 -0600146#endif
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500147
148 /* forced speed & duplex (no autoneg)
149 * partner speed & duplex & pause (autoneg)
150 */
151 int speed;
152 int duplex;
153
154 /* The most recently read link state */
155 int link;
156 int port;
157 phy_interface_t interface;
158
159 u32 advertising;
160 u32 supported;
161 u32 mmds;
162
163 int autoneg;
164 int addr;
165 int pause;
166 int asym_pause;
167 u32 phy_id;
Pankaj Bansal3c43a482018-11-16 06:26:18 +0000168 bool is_c45;
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500169 u32 flags;
170};
171
Shaohui Xieb48127f2013-11-14 19:00:31 +0800172struct fixed_link {
173 int phy_id;
174 int duplex;
175 int link_speed;
176 int pause;
177 int asym_pause;
178};
179
Dan Murphyc3f0ba92020-05-04 16:14:36 -0500180/**
181 * phy_read - Convenience function for reading a given PHY register
182 * @phydev: the phy_device struct
183 * @devad: The MMD to read from
184 * @regnum: register number to read
185 * @return: value for success or negative errno for failure
186 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500187static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
188{
189 struct mii_dev *bus = phydev->bus;
190
Samuel Mendoza-Jonasb069c4a2019-06-18 11:37:18 +1000191 if (!bus || !bus->read) {
192 debug("%s: No bus configured\n", __func__);
193 return -1;
194 }
195
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500196 return bus->read(bus, phydev->addr, devad, regnum);
197}
198
Dan Murphyc3f0ba92020-05-04 16:14:36 -0500199/**
200 * phy_write - Convenience function for writing a given PHY register
201 * @phydev: the phy_device struct
202 * @devad: The MMD to read from
203 * @regnum: register number to write
204 * @val: value to write to @regnum
205 * @return: 0 for success or negative errno for failure
206 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500207static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
208 u16 val)
209{
210 struct mii_dev *bus = phydev->bus;
211
Thirupathaiah Annapureddy7bb40102020-08-17 17:31:08 -0700212 if (!bus || !bus->write) {
Samuel Mendoza-Jonasb069c4a2019-06-18 11:37:18 +1000213 debug("%s: No bus configured\n", __func__);
214 return -1;
215 }
216
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500217 return bus->write(bus, phydev->addr, devad, regnum, val);
218}
219
Dan Murphyc3f0ba92020-05-04 16:14:36 -0500220/**
221 * phy_mmd_start_indirect - Convenience function for writing MMD registers
222 * @phydev: the phy_device struct
223 * @devad: The MMD to read from
224 * @regnum: register number to write
225 * @return: None
226 */
Carlo Caione4de87e22019-02-08 17:25:06 +0000227static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
228 int regnum)
229{
230 /* Write the desired MMD Devad */
231 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
232
233 /* Write the desired MMD register address */
234 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
235
236 /* Select the Function : DATA with no post increment */
237 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
238 (devad | MII_MMD_CTRL_NOINCR));
239}
240
Dan Murphyc3f0ba92020-05-04 16:14:36 -0500241/**
242 * phy_read_mmd - Convenience function for reading a register
243 * from an MMD on a given PHY.
244 * @phydev: The phy_device struct
245 * @devad: The MMD to read from
246 * @regnum: The register on the MMD to read
247 * @return: Value for success or negative errno for failure
248 */
Carlo Caione4de87e22019-02-08 17:25:06 +0000249static inline int phy_read_mmd(struct phy_device *phydev, int devad,
250 int regnum)
251{
252 struct phy_driver *drv = phydev->drv;
253
254 if (regnum > (u16)~0 || devad > 32)
255 return -EINVAL;
256
257 /* driver-specific access */
258 if (drv->read_mmd)
259 return drv->read_mmd(phydev, devad, regnum);
260
261 /* direct C45 / C22 access */
262 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
263 devad == MDIO_DEVAD_NONE || !devad)
264 return phy_read(phydev, devad, regnum);
265
266 /* indirect C22 access */
267 phy_mmd_start_indirect(phydev, devad, regnum);
268
269 /* Read the content of the MMD's selected register */
270 return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
271}
272
Dan Murphyc3f0ba92020-05-04 16:14:36 -0500273/**
274 * phy_write_mmd - Convenience function for writing a register
275 * on an MMD on a given PHY.
276 * @phydev: The phy_device struct
277 * @devad: The MMD to read from
278 * @regnum: The register on the MMD to read
279 * @val: value to write to @regnum
280 * @return: 0 for success or negative errno for failure
281 */
Carlo Caione4de87e22019-02-08 17:25:06 +0000282static inline int phy_write_mmd(struct phy_device *phydev, int devad,
283 int regnum, u16 val)
284{
285 struct phy_driver *drv = phydev->drv;
286
287 if (regnum > (u16)~0 || devad > 32)
288 return -EINVAL;
289
290 /* driver-specific access */
291 if (drv->write_mmd)
292 return drv->write_mmd(phydev, devad, regnum, val);
293
294 /* direct C45 / C22 access */
295 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
296 devad == MDIO_DEVAD_NONE || !devad)
297 return phy_write(phydev, devad, regnum, val);
298
299 /* indirect C22 access */
300 phy_mmd_start_indirect(phydev, devad, regnum);
301
302 /* Write the data into MMD's selected register */
303 return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
304}
305
Dan Murphyc06211d2020-05-04 16:14:38 -0500306/**
307 * phy_set_bits_mmd - Convenience function for setting bits in a register
308 * on MMD
309 * @phydev: the phy_device struct
310 * @devad: the MMD containing register to modify
311 * @regnum: register number to modify
312 * @val: bits to set
313 * @return: 0 for success or negative errno for failure
314 */
315static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
316 u32 regnum, u16 val)
317{
318 int value, ret;
319
320 value = phy_read_mmd(phydev, devad, regnum);
321 if (value < 0)
322 return value;
323
324 value |= val;
325
326 ret = phy_write_mmd(phydev, devad, regnum, value);
327 if (ret < 0)
328 return ret;
329
330 return 0;
331}
332
333/**
334 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
335 * on MMD
336 * @phydev: the phy_device struct
337 * @devad: the MMD containing register to modify
338 * @regnum: register number to modify
339 * @val: bits to clear
340 * @return: 0 for success or negative errno for failure
341 */
342static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
343 u32 regnum, u16 val)
344{
345 int value, ret;
346
347 value = phy_read_mmd(phydev, devad, regnum);
348 if (value < 0)
349 return value;
350
351 value &= ~val;
352
353 ret = phy_write_mmd(phydev, devad, regnum, value);
354 if (ret < 0)
355 return ret;
356
357 return 0;
358}
359
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500360#ifdef CONFIG_PHYLIB_10G
361extern struct phy_driver gen10g_driver;
362
Alex Margineane4386742020-01-09 10:50:05 +0200363/*
364 * List all 10G interfaces here, the assumption being that PHYs on these
365 * interfaces are C45
366 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500367static inline int is_10g_interface(phy_interface_t interface)
368{
Alex Margineane4386742020-01-09 10:50:05 +0200369 return interface == PHY_INTERFACE_MODE_XGMII ||
370 interface == PHY_INTERFACE_MODE_USXGMII ||
Vladimir Oltean6a6e4022021-09-18 15:32:34 +0300371 interface == PHY_INTERFACE_MODE_10GBASER;
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500372}
373
374#endif
375
Alex Marginean64d5f392019-07-11 18:32:56 +0300376/**
377 * phy_init() - Initializes the PHY drivers
Alex Marginean64d5f392019-07-11 18:32:56 +0300378 * This function registers all available PHY drivers
379 *
Dan Murphy98422d92020-05-04 16:14:37 -0500380 * @return: 0 if OK, -ve on error
Alex Marginean64d5f392019-07-11 18:32:56 +0300381 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500382int phy_init(void);
Alex Marginean64d5f392019-07-11 18:32:56 +0300383
384/**
385 * phy_reset() - Resets the specified PHY
Alex Marginean64d5f392019-07-11 18:32:56 +0300386 * Issues a reset of the PHY and waits for it to complete
387 *
388 * @phydev: PHY to reset
Dan Murphy98422d92020-05-04 16:14:37 -0500389 * @return: 0 if OK, -ve on error
Alex Marginean64d5f392019-07-11 18:32:56 +0300390 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500391int phy_reset(struct phy_device *phydev);
Alex Marginean64d5f392019-07-11 18:32:56 +0300392
393/**
394 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
Alex Marginean64d5f392019-07-11 18:32:56 +0300395 * The function checks the PHY addresses flagged in phy_mask and returns a
396 * phy_device pointer if it detects a PHY.
397 * This function should only be called if just one PHY is expected to be present
398 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
399 * it is undefined which of these PHYs is returned.
400 *
401 * @bus: MII/MDIO bus to scan
402 * @phy_mask: bitmap of PYH addresses to scan
403 * @interface: type of MAC-PHY interface
Dan Murphy98422d92020-05-04 16:14:37 -0500404 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Marginean64d5f392019-07-11 18:32:56 +0300405 */
Troy Kisky9519bc52012-10-22 16:40:43 +0000406struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
407 phy_interface_t interface);
Alex Marginean64d5f392019-07-11 18:32:56 +0300408
Vladimir Oltean8c089f72021-01-25 14:23:52 +0200409#ifdef CONFIG_PHY_FIXED
410
411/**
412 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
413 * @node: OF node for the container of the fixed-link node
414 *
415 * Description: Creates a struct phy_device based on a fixed-link of_node
416 * description. Can be used without phy_connect by drivers which do not expose
417 * a UCLASS_ETH udevice.
418 */
419struct phy_device *fixed_phy_create(ofnode node);
420
421#else
422
423static inline struct phy_device *fixed_phy_create(ofnode node)
424{
425 return NULL;
426}
427
428#endif
429
Simon Glassdbad3462015-04-05 16:07:39 -0600430#ifdef CONFIG_DM_ETH
Alex Marginean64d5f392019-07-11 18:32:56 +0300431
432/**
433 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
434 * @phydev: PHY device
435 * @dev: Ethernet device
436 */
Simon Glassdbad3462015-04-05 16:07:39 -0600437void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
Alex Marginean64d5f392019-07-11 18:32:56 +0300438
439/**
440 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Marginean64d5f392019-07-11 18:32:56 +0300441 * Creates a PHY device for the PHY at the given address, if one doesn't exist
442 * already, and associates it with the Ethernet device.
443 * The function may be called with addr <= 0, in this case addr value is ignored
444 * and the bus is scanned to detect a PHY. Scanning should only be used if only
445 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
446 * which PHY is returned.
447 *
448 * @bus: MII/MDIO bus that hosts the PHY
449 * @addr: PHY address on MDIO bus
450 * @dev: Ethernet device to associate to the PHY
451 * @interface: type of MAC-PHY interface
Dan Murphy98422d92020-05-04 16:14:37 -0500452 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Marginean64d5f392019-07-11 18:32:56 +0300453 */
Simon Glassdbad3462015-04-05 16:07:39 -0600454struct phy_device *phy_connect(struct mii_dev *bus, int addr,
455 struct udevice *dev,
456 phy_interface_t interface);
Michal Simekc1c16032022-02-23 15:45:41 +0100457/**
458 * phy_device_create() - Create a PHY device
459 *
460 * @bus: MII/MDIO bus that hosts the PHY
461 * @addr: PHY address on MDIO bus
462 * @phy_id: where to store the ID retrieved
463 * @is_c45: Device Identifiers if is_c45
464 * @interface: interface between the MAC and PHY
465 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
466 */
467struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
468 u32 phy_id, bool is_c45,
469 phy_interface_t interface);
Alex Marginean64d5f392019-07-11 18:32:56 +0300470
Michal Simek488eec52022-02-23 15:45:42 +0100471/**
472 * phy_connect_phy_id() - Connect to phy device by reading PHY id
473 * from phy node.
474 *
475 * @bus: MII/MDIO bus that hosts the PHY
476 * @dev: Ethernet device to associate to the PHY
477 * @interface: Interface between the MAC and PHY
478 * @return: pointer to phy_device if a PHY is found,
479 * or NULL otherwise
480 */
481struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
T Karthik Reddy2f24c902022-03-29 16:05:57 +0200482 int phyaddr, phy_interface_t interface);
Michal Simek488eec52022-02-23 15:45:42 +0100483
Grygorii Strashko6189c062018-07-05 12:02:48 -0500484static inline ofnode phy_get_ofnode(struct phy_device *phydev)
485{
486 if (ofnode_valid(phydev->node))
487 return phydev->node;
488 else
489 return dev_ofnode(phydev->dev);
490}
Simon Glassdbad3462015-04-05 16:07:39 -0600491#else
Alex Marginean64d5f392019-07-11 18:32:56 +0300492
493/**
494 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
495 * @phydev: PHY device
496 * @dev: Ethernet device
497 */
Troy Kisky9519bc52012-10-22 16:40:43 +0000498void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
Alex Marginean64d5f392019-07-11 18:32:56 +0300499
500/**
501 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Marginean64d5f392019-07-11 18:32:56 +0300502 * Creates a PHY device for the PHY at the given address, if one doesn't exist
503 * already, and associates it with the Ethernet device.
504 * The function may be called with addr <= 0, in this case addr value is ignored
505 * and the bus is scanned to detect a PHY. Scanning should only be used if only
506 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
507 * which PHY is returned.
508 *
509 * @bus: MII/MDIO bus that hosts the PHY
510 * @addr: PHY address on MDIO bus
511 * @dev: Ethernet device to associate to the PHY
512 * @interface: type of MAC-PHY interface
Dan Murphy98422d92020-05-04 16:14:37 -0500513 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Marginean64d5f392019-07-11 18:32:56 +0300514 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500515struct phy_device *phy_connect(struct mii_dev *bus, int addr,
516 struct eth_device *dev,
517 phy_interface_t interface);
Alex Marginean64d5f392019-07-11 18:32:56 +0300518
Grygorii Strashko6189c062018-07-05 12:02:48 -0500519static inline ofnode phy_get_ofnode(struct phy_device *phydev)
520{
521 return ofnode_null();
522}
Simon Glassdbad3462015-04-05 16:07:39 -0600523#endif
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500524int phy_startup(struct phy_device *phydev);
525int phy_config(struct phy_device *phydev);
526int phy_shutdown(struct phy_device *phydev);
527int phy_register(struct phy_driver *drv);
Alexey Brodkine476bb22016-01-13 16:59:34 +0300528int phy_set_supported(struct phy_device *phydev, u32 max_speed);
Ariel D'Alessandro9c18c912022-04-12 10:31:36 -0300529int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
530 u16 set);
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500531int genphy_config_aneg(struct phy_device *phydev);
Troy Kisky80b6b092012-02-07 14:08:48 +0000532int genphy_restart_aneg(struct phy_device *phydev);
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500533int genphy_update_link(struct phy_device *phydev);
Yegor Yefremovc40f5d32012-11-28 11:15:17 +0100534int genphy_parse_link(struct phy_device *phydev);
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500535int genphy_config(struct phy_device *phydev);
536int genphy_startup(struct phy_device *phydev);
537int genphy_shutdown(struct phy_device *phydev);
538int gen10g_config(struct phy_device *phydev);
539int gen10g_startup(struct phy_device *phydev);
540int gen10g_shutdown(struct phy_device *phydev);
541int gen10g_discover_mmds(struct phy_device *phydev);
542
Florian Fainelli01b4ade2017-12-09 14:59:54 -0800543int phy_b53_init(void);
Kevin Smith87b2c4e2016-03-31 19:33:12 +0000544int phy_mv88e61xx_init(void);
Shaohui Xie0e548d72014-12-30 18:32:04 +0800545int phy_aquantia_init(void);
Andy Fleming60ca78b2011-04-07 21:56:05 -0500546int phy_atheros_init(void);
547int phy_broadcom_init(void);
Shengzhou Liuc878bdb2014-11-10 18:32:29 +0800548int phy_cortina_init(void);
Abbie Chang556872f2021-01-14 13:34:12 -0800549int phy_cortina_access_init(void);
Andy Fleming60ca78b2011-04-07 21:56:05 -0500550int phy_davicom_init(void);
Matt Porter3bbeb792013-03-20 05:38:13 +0000551int phy_et1011c_init(void);
Andy Fleming60ca78b2011-04-07 21:56:05 -0500552int phy_lxt_init(void);
553int phy_marvell_init(void);
Alexandru Gagniuc757bb672017-07-07 11:36:57 -0700554int phy_micrel_ksz8xxx_init(void);
555int phy_micrel_ksz90x1_init(void);
Neil Armstrong7a4c90d2017-10-18 10:02:10 +0200556int phy_meson_gxl_init(void);
Andy Fleming60ca78b2011-04-07 21:56:05 -0500557int phy_natsemi_init(void);
Ariel D'Alessandro97504bc2022-04-12 10:31:34 -0300558int phy_nxp_c45_tja11xx_init(void);
Michael Trimarchi80ba4362022-04-12 10:31:37 -0300559int phy_nxp_tja11xx_init(void);
Andy Fleming60ca78b2011-04-07 21:56:05 -0500560int phy_realtek_init(void);
Vladimir Zapolskiyaf9605f2011-12-29 15:18:37 +0000561int phy_smsc_init(void);
Andy Fleming60ca78b2011-04-07 21:56:05 -0500562int phy_teranetics_init(void);
Edgar E. Iglesias8d3ce682015-09-25 23:46:08 -0700563int phy_ti_init(void);
Andy Fleming60ca78b2011-04-07 21:56:05 -0500564int phy_vitesse_init(void);
Siva Durga Prasad Paladugudd6cbd32016-02-05 13:22:10 +0530565int phy_xilinx_init(void);
John Haechtenee253f92016-12-09 22:15:17 +0000566int phy_mscc_init(void);
Hannes Schmelzerda494602017-03-23 15:11:43 +0100567int phy_fixed_init(void);
Samuel Mendoza-Jonasb069c4a2019-06-18 11:37:18 +1000568int phy_ncsi_init(void);
Siva Durga Prasad Paladugud5c4e1e2018-11-27 11:49:11 +0530569int phy_xilinx_gmii2rgmii_init(void);
Timur Tabi856f32f2011-10-18 18:44:34 -0500570
Fabio Estevam55e0f192014-02-15 14:52:00 -0200571int board_phy_config(struct phy_device *phydev);
Shengzhou Liu072b0fa2015-04-07 18:46:32 +0800572int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
Fabio Estevam55e0f192014-02-15 14:52:00 -0200573
Simon Glassdbad3462015-04-05 16:07:39 -0600574/**
575 * phy_get_interface_by_name() - Look up a PHY interface name
576 *
577 * @str: PHY interface name, e.g. "mii"
Dan Murphy98422d92020-05-04 16:14:37 -0500578 * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
Simon Glassdbad3462015-04-05 16:07:39 -0600579 */
580int phy_get_interface_by_name(const char *str);
581
Dan Murphy63e3cde2016-05-02 15:46:00 -0500582/**
583 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
584 * is RGMII (all variants)
585 * @phydev: the phy_device struct
Dan Murphy98422d92020-05-04 16:14:37 -0500586 * @return: true if MII bus is RGMII or false if it is not
Dan Murphy63e3cde2016-05-02 15:46:00 -0500587 */
588static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
589{
590 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
591 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
592}
593
Dan Murphy07cf56a2016-05-02 15:46:01 -0500594/**
595 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
596 * is SGMII (all variants)
597 * @phydev: the phy_device struct
Dan Murphy98422d92020-05-04 16:14:37 -0500598 * @return: true if MII bus is SGMII or false if it is not
Dan Murphy07cf56a2016-05-02 15:46:01 -0500599 */
600static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
601{
602 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
603 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
604}
605
Timur Tabi856f32f2011-10-18 18:44:34 -0500606/* PHY UIDs for various PHYs that are referenced in external code */
Wolfgang Denk62fb2b42021-09-27 17:42:39 +0200607#define PHY_UID_CS4340 0x13e51002
608#define PHY_UID_CS4223 0x03e57003
Priyanka Jain46fa2bd2018-10-11 04:47:05 +0000609#define PHY_UID_TN2020 0x00a19410
610#define PHY_UID_IN112525_S03 0x02107440
Timur Tabi856f32f2011-10-18 18:44:34 -0500611
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500612#endif