blob: 4282beb395071ec2e834b14b51442522ddae2042 [file] [log] [blame]
Dinh Nguyenad51f7c2012-10-04 06:46:02 +00001/*
2 * Copyright (C) 2012 Altera Corporation <www.altera.com>
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Dinh Nguyenad51f7c2012-10-04 06:46:02 +00005 */
6
7MEMORY { .sdram : ORIGIN = (0), LENGTH = (0xffffffff) }
8
9OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
10OUTPUT_ARCH(arm)
11ENTRY(_start)
12SECTIONS
13{
14 . = 0x00000000;
15
16 . = ALIGN(4);
17 .text :
18 {
Benoît Thébaudeau3954db82013-04-11 09:36:03 +000019 arch/arm/cpu/armv7/start.o (.text*)
Dinh Nguyenad51f7c2012-10-04 06:46:02 +000020 *(.text*)
21 } >.sdram
22
23 . = ALIGN(4);
24 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } >.sdram
25
26 . = ALIGN(4);
27 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sdram
28
29 . = ALIGN(4);
30 __image_copy_end = .;
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +010031
32 .end :
33 {
34 *(.__end)
35 }
Dinh Nguyenad51f7c2012-10-04 06:46:02 +000036
37 .bss : {
38 . = ALIGN(4);
39 __bss_start = .;
40 *(.bss*)
41 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +000042 __bss_end = .;
Dinh Nguyenad51f7c2012-10-04 06:46:02 +000043 } >.sdram
44
45 . = ALIGN(8);
46 __malloc_start = .;
47 . = . + CONFIG_SPL_MALLOC_SIZE;
48 __malloc_end = .;
49
50 . = . + CONFIG_SPL_STACK_SIZE;
51 . = ALIGN(8);
52 __stack_start = .;
53}