blob: c7a539d281942d63ec2b19e3b38d15450c46ead3 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glassf79d5382014-11-12 22:42:21 -07002/*
3 * Copyright (c) 2014 Google, Inc
4 * Copyright (C) 2000 Ronald G. Minnich
5 *
6 * Microcode update for Intel PIII and later CPUs
Simon Glassf79d5382014-11-12 22:42:21 -07007 */
8
9#include <common.h>
10#include <errno.h>
11#include <fdtdec.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090012#include <linux/libfdt.h>
Simon Glassf79d5382014-11-12 22:42:21 -070013#include <asm/cpu.h>
Simon Glass2df61882016-03-11 22:06:54 -070014#include <asm/microcode.h>
Simon Glassf79d5382014-11-12 22:42:21 -070015#include <asm/msr.h>
Simon Glass9281eb52015-01-01 16:18:14 -070016#include <asm/msr-index.h>
Simon Glassf79d5382014-11-12 22:42:21 -070017#include <asm/processor.h>
Simon Glass2df61882016-03-11 22:06:54 -070018
19DECLARE_GLOBAL_DATA_PTR;
Simon Glassf79d5382014-11-12 22:42:21 -070020
21/**
22 * struct microcode_update - standard microcode header from Intel
23 *
24 * We read this information out of the device tree and use it to determine
25 * whether the update is applicable or not. We also use the same structure
26 * to read information from the CPU.
27 */
28struct microcode_update {
29 uint header_version;
30 uint update_revision;
31 uint date_code;
32 uint processor_signature;
33 uint checksum;
34 uint loader_revision;
35 uint processor_flags;
36 const void *data;
37 int size;
38};
39
40static int microcode_decode_node(const void *blob, int node,
41 struct microcode_update *update)
42{
43 update->data = fdt_getprop(blob, node, "data", &update->size);
44 if (!update->data)
Simon Glassbd241242016-07-25 18:58:58 -060045 return -ENOENT;
Simon Glassf79d5382014-11-12 22:42:21 -070046
47 update->header_version = fdtdec_get_int(blob, node,
48 "intel,header-version", 0);
49 update->update_revision = fdtdec_get_int(blob, node,
50 "intel,update-revision", 0);
51 update->date_code = fdtdec_get_int(blob, node,
52 "intel,date-code", 0);
53 update->processor_signature = fdtdec_get_int(blob, node,
Simon Glassc8a5c412014-12-15 22:02:41 -070054 "intel,processor-signature", 0);
Simon Glassf79d5382014-11-12 22:42:21 -070055 update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
56 update->loader_revision = fdtdec_get_int(blob, node,
Simon Glassc8a5c412014-12-15 22:02:41 -070057 "intel,loader-revision", 0);
Simon Glassf79d5382014-11-12 22:42:21 -070058 update->processor_flags = fdtdec_get_int(blob, node,
Simon Glassc8a5c412014-12-15 22:02:41 -070059 "intel,processor-flags", 0);
Simon Glassf79d5382014-11-12 22:42:21 -070060
61 return 0;
62}
63
Simon Glassc17d4502016-03-11 22:07:09 -070064int microcode_read_rev(void)
Simon Glassf79d5382014-11-12 22:42:21 -070065{
Simon Glassc17d4502016-03-11 22:07:09 -070066 /* Quark does not have microcode MSRs */
67#ifdef CONFIG_INTEL_QUARK
68 return 0;
69#else
Simon Glassf79d5382014-11-12 22:42:21 -070070 /*
71 * Some Intel CPUs can be very finicky about the CPUID sequence used.
72 * So this is implemented in assembly so that it works reliably.
73 */
74 uint32_t low, high;
75
76 asm volatile (
77 "xorl %%eax, %%eax\n"
78 "xorl %%edx, %%edx\n"
Simon Glass9281eb52015-01-01 16:18:14 -070079 "movl %2, %%ecx\n"
Simon Glassf79d5382014-11-12 22:42:21 -070080 "wrmsr\n"
81 "movl $0x01, %%eax\n"
82 "cpuid\n"
Simon Glass9281eb52015-01-01 16:18:14 -070083 "movl %2, %%ecx\n"
Simon Glassf79d5382014-11-12 22:42:21 -070084 "rdmsr\n"
85 : /* outputs */
86 "=a" (low), "=d" (high)
87 : /* inputs */
Simon Glass9281eb52015-01-01 16:18:14 -070088 "i" (MSR_IA32_UCODE_REV)
Simon Glassf79d5382014-11-12 22:42:21 -070089 : /* clobbers */
90 "ebx", "ecx"
91 );
92
93 return high;
Simon Glassc17d4502016-03-11 22:07:09 -070094#endif
Simon Glassf79d5382014-11-12 22:42:21 -070095}
96
97static void microcode_read_cpu(struct microcode_update *cpu)
98{
99 /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
100 unsigned int x86_model, x86_family;
101 struct cpuid_result result;
102 uint32_t low, high;
103
Simon Glass9281eb52015-01-01 16:18:14 -0700104 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
Simon Glassf79d5382014-11-12 22:42:21 -0700105 result = cpuid(1);
Simon Glass9281eb52015-01-01 16:18:14 -0700106 rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision);
Simon Glassf79d5382014-11-12 22:42:21 -0700107 x86_model = (result.eax >> 4) & 0x0f;
108 x86_family = (result.eax >> 8) & 0x0f;
109 cpu->processor_signature = result.eax;
110
111 cpu->processor_flags = 0;
112 if ((x86_model >= 5) || (x86_family > 6)) {
113 rdmsr(0x17, low, high);
114 cpu->processor_flags = 1 << ((high >> 18) & 7);
115 }
116 debug("microcode: sig=%#x pf=%#x revision=%#x\n",
117 cpu->processor_signature, cpu->processor_flags,
118 cpu->update_revision);
119}
120
121/* Get a microcode update from the device tree and apply it */
122int microcode_update_intel(void)
123{
124 struct microcode_update cpu, update;
Ivan Gorinov7fe40752018-06-21 21:16:16 -0700125 ulong address;
Simon Glassf79d5382014-11-12 22:42:21 -0700126 const void *blob = gd->fdt_blob;
Simon Glassc8a5c412014-12-15 22:02:41 -0700127 int skipped;
Simon Glassf79d5382014-11-12 22:42:21 -0700128 int count;
129 int node;
130 int ret;
Simon Glass9281eb52015-01-01 16:18:14 -0700131 int rev;
Simon Glassf79d5382014-11-12 22:42:21 -0700132
133 microcode_read_cpu(&cpu);
134 node = 0;
135 count = 0;
Simon Glassc8a5c412014-12-15 22:02:41 -0700136 skipped = 0;
Simon Glassf79d5382014-11-12 22:42:21 -0700137 do {
138 node = fdtdec_next_compatible(blob, node,
139 COMPAT_INTEL_MICROCODE);
140 if (node < 0) {
141 debug("%s: Found %d updates\n", __func__, count);
Simon Glassc8a5c412014-12-15 22:02:41 -0700142 return count ? 0 : skipped ? -EEXIST : -ENOENT;
Simon Glassf79d5382014-11-12 22:42:21 -0700143 }
144
145 ret = microcode_decode_node(blob, node, &update);
Simon Glassbd241242016-07-25 18:58:58 -0600146 if (ret == -ENOENT && ucode_base) {
147 /*
148 * The microcode has been removed from the device tree
149 * in the build system. In that case it will have
150 * already been updated in car_init().
151 */
152 debug("%s: Microcode data not available\n", __func__);
153 skipped++;
154 continue;
155 }
Simon Glassf79d5382014-11-12 22:42:21 -0700156 if (ret) {
157 debug("%s: Unable to decode update: %d\n", __func__,
158 ret);
159 return ret;
160 }
Simon Glassc8a5c412014-12-15 22:02:41 -0700161 if (!(update.processor_signature == cpu.processor_signature &&
162 (update.processor_flags & cpu.processor_flags))) {
163 debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
164 __func__, update.processor_signature,
165 update.processor_flags);
166 skipped++;
167 continue;
Simon Glassf79d5382014-11-12 22:42:21 -0700168 }
Ivan Gorinov7fe40752018-06-21 21:16:16 -0700169 address = (ulong)update.data + UCODE_HEADER_LEN;
170 wrmsr(MSR_IA32_UCODE_WRITE, address, 0);
Simon Glass9281eb52015-01-01 16:18:14 -0700171 rev = microcode_read_rev();
Simon Glassf79d5382014-11-12 22:42:21 -0700172 debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
Simon Glass9281eb52015-01-01 16:18:14 -0700173 rev, update.date_code & 0xffff,
Simon Glassf79d5382014-11-12 22:42:21 -0700174 (update.date_code >> 24) & 0xff,
175 (update.date_code >> 16) & 0xff);
Simon Glass9281eb52015-01-01 16:18:14 -0700176 if (update.update_revision != rev) {
177 printf("Microcode update failed\n");
178 return -EFAULT;
179 }
Simon Glassf79d5382014-11-12 22:42:21 -0700180 count++;
Ivan Gorinov7fe40752018-06-21 21:16:16 -0700181 if (!ucode_base) {
182 ucode_base = (ulong)update.data;
183 ucode_size = update.size;
184 }
Simon Glassf79d5382014-11-12 22:42:21 -0700185 } while (1);
186}