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Aubrey Li51185db2007-03-20 18:16:24 +08001/*
2 * U-boot - Configuration file for BF561 EZKIT board
3 */
4
Mike Frysinger62d2a232008-06-01 09:09:48 -04005#ifndef __CONFIG_BF561_EZKIT_H__
6#define __CONFIG_BF561_EZKIT_H__
Aubrey Li51185db2007-03-20 18:16:24 +08007
Mike Frysinger18a407c2009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysingerf0dd7922008-02-18 05:26:48 -05009
Aubrey Li51185db2007-03-20 18:16:24 +080010
Aubrey Li51185db2007-03-20 18:16:24 +080011/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040012 * Processor Settings
Aubrey Li51185db2007-03-20 18:16:24 +080013 */
Mike Frysinger5b0c1282010-12-23 14:58:37 -050014#define CONFIG_BFIN_CPU bf561-0.3
Mike Frysinger62d2a232008-06-01 09:09:48 -040015#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
Aubrey Li51185db2007-03-20 18:16:24 +080016
Aubrey Li51185db2007-03-20 18:16:24 +080017
18/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040019 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
Aubrey Li51185db2007-03-20 18:16:24 +080022 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040023/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 30000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 20
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 6
Aubrey Li51185db2007-03-20 18:16:24 +080040
Aubrey Li51185db2007-03-20 18:16:24 +080041
42/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040043 * Memory Settings
Aubrey Li51185db2007-03-20 18:16:24 +080044 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040045#define CONFIG_MEM_ADD_WDTH 9
46#define CONFIG_MEM_SIZE 64
Aubrey Li51185db2007-03-20 18:16:24 +080047
Mike Frysinger62d2a232008-06-01 09:09:48 -040048#define CONFIG_EBIU_SDRRC_VAL 0x306
49#define CONFIG_EBIU_SDGCTL_VAL 0x91114d
Aubrey Li51185db2007-03-20 18:16:24 +080050
Mike Frysinger62d2a232008-06-01 09:09:48 -040051#define CONFIG_EBIU_AMGCTL_VAL 0x3F
52#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
53#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
Aubrey Li51185db2007-03-20 18:16:24 +080054
Mike Frysinger62d2a232008-06-01 09:09:48 -040055#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
56#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
Aubrey Li51185db2007-03-20 18:16:24 +080057
Aubrey Li51185db2007-03-20 18:16:24 +080058
59/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040060 * Network Settings
Aubrey Li51185db2007-03-20 18:16:24 +080061 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040062#define ADI_CMDS_NETWORK 1
Ben Warren0fd6aae2009-10-04 22:37:03 -070063#define CONFIG_NET_MULTI
64#define CONFIG_SMC91111 1
Mike Frysinger62d2a232008-06-01 09:09:48 -040065#define CONFIG_SMC91111_BASE 0x2C010300
66#define CONFIG_SMC_USE_32_BIT 1
67#define CONFIG_HOSTNAME bf561-ezkit
68/* Uncomment next line to use fixed MAC address */
69/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
Aubrey Li51185db2007-03-20 18:16:24 +080070
Jon Loeliger5c4ddae2007-07-10 10:12:10 -050071
Jon Loeliger5c4ddae2007-07-10 10:12:10 -050072/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040073 * Flash Settings
Jon Loeliger8262ada2007-07-04 22:31:49 -050074 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040075#define CONFIG_SYS_FLASH_CFI
76#define CONFIG_FLASH_CFI_DRIVER
77#define CONFIG_SYS_FLASH_CFI_AMD_RESET
78#define CONFIG_SYS_FLASH_BASE 0x20000000
79#define CONFIG_SYS_MAX_FLASH_BANKS 1
80#define CONFIG_SYS_MAX_FLASH_SECT 135
81/* The BF561-EZKIT uses a top boot flash */
82#define CONFIG_ENV_IS_IN_FLASH 1
Mike Frysingerba31b832011-05-09 15:43:27 -040083#define CONFIG_ENV_OFFSET (0x800000 - CONFIG_ENV_SECT_SIZE)
Mike Frysinger7b06b5e2010-12-23 18:07:01 -050084#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
Mike Frysingerba31b832011-05-09 15:43:27 -040085#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
86#define CONFIG_ENV_SECT_SIZE 0x2000
Jon Loeliger8262ada2007-07-04 22:31:49 -050087
Mike Frysinger62d2a232008-06-01 09:09:48 -040088
Aubrey Li51185db2007-03-20 18:16:24 +080089/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040090 * I2C Settings
Aubrey Li51185db2007-03-20 18:16:24 +080091 */
Mike Frysinger62d2a232008-06-01 09:09:48 -040092#define CONFIG_SOFT_I2C
Mike Frysingerd86e9a72010-06-08 16:22:44 -040093#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
94#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
Aubrey Li51185db2007-03-20 18:16:24 +080095
Aubrey Li51185db2007-03-20 18:16:24 +080096
97/*
Mike Frysinger62d2a232008-06-01 09:09:48 -040098 * Misc Settings
Aubrey Li51185db2007-03-20 18:16:24 +080099 */
Mike Frysinger62d2a232008-06-01 09:09:48 -0400100#define CONFIG_UART_CONSOLE 0
101
Aubrey Li51185db2007-03-20 18:16:24 +0800102
103/*
Mike Frysinger62d2a232008-06-01 09:09:48 -0400104 * Pull in common ADI header for remaining command/environment setup
Aubrey Li51185db2007-03-20 18:16:24 +0800105 */
Mike Frysinger62d2a232008-06-01 09:09:48 -0400106#include <configs/bfin_adi_common.h>
Aubrey Li51185db2007-03-20 18:16:24 +0800107
Mike Frysinger18a407c2009-04-24 17:22:40 -0400108#endif