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Simon Glass4c0dc6d2013-03-05 14:39:35 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
4 * (C) Copyright 2000 - 2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glass4c0dc6d2013-03-05 14:39:35 +00008 ********************************************************************
9 * NOTE: This header file defines an interface to U-Boot. Including
10 * this (unmodified) header file in another file is considered normal
11 * use of U-Boot, and does *not* fall under the heading of "derived
12 * work".
13 ********************************************************************
14 */
15
16#ifndef __ASM_GENERIC_U_BOOT_H__
17#define __ASM_GENERIC_U_BOOT_H__
18
19/*
20 * Board information passed to Linux kernel from U-Boot
21 *
22 * include/asm-ppc/u-boot.h
23 */
24
25#ifndef __ASSEMBLY__
26
27typedef struct bd_info {
28 unsigned long bi_memstart; /* start of DRAM memory */
29 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
30 unsigned long bi_flashstart; /* start of FLASH memory */
31 unsigned long bi_flashsize; /* size of FLASH memory */
32 unsigned long bi_flashoffset; /* reserved area for startup monitor */
33 unsigned long bi_sramstart; /* start of SRAM memory */
34 unsigned long bi_sramsize; /* size of SRAM memory */
35#ifdef CONFIG_ARM
36 unsigned long bi_arm_freq; /* arm frequency */
37 unsigned long bi_dsp_freq; /* dsp core frequency */
38 unsigned long bi_ddr_freq; /* ddr frequency */
39#endif
Christophe Leroy069fa832017-07-06 10:23:22 +020040#if defined(CONFIG_8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
Simon Glass4c0dc6d2013-03-05 14:39:35 +000041 unsigned long bi_immr_base; /* base of IMMR register */
42#endif
Heiko Schocher6f90e582017-06-14 05:49:40 +020043#if defined(CONFIG_M68K)
Simon Glass4c0dc6d2013-03-05 14:39:35 +000044 unsigned long bi_mbar_base; /* base of internal registers */
45#endif
46#if defined(CONFIG_MPC83xx)
47 unsigned long bi_immrbar;
48#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000049 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
50 unsigned long bi_ip_addr; /* IP Address */
51 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
52 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
53 unsigned long bi_intfreq; /* Internal Freq, in MHz */
54 unsigned long bi_busfreq; /* Bus Freq, in MHz */
55#if defined(CONFIG_CPM2)
56 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
57 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
58 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
59 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
60#endif
Heiko Schocher6f90e582017-06-14 05:49:40 +020061#if defined(CONFIG_M68K)
Simon Glass4c0dc6d2013-03-05 14:39:35 +000062 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
63 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
64#endif
Alison Wang8f6d8f32015-02-12 18:33:15 +080065#if defined(CONFIG_EXTRA_CLOCK)
66 unsigned long bi_inpfreq; /* input Freq in MHz */
67 unsigned long bi_vcofreq; /* vco Freq in MHz */
68 unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
69#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000070
71#ifdef CONFIG_HAS_ETH1
72 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
73#endif
74#ifdef CONFIG_HAS_ETH2
75 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
76#endif
77#ifdef CONFIG_HAS_ETH3
78 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
79#endif
80#ifdef CONFIG_HAS_ETH4
81 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
82#endif
83#ifdef CONFIG_HAS_ETH5
84 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
85#endif
86
Simon Glass4c0dc6d2013-03-05 14:39:35 +000087 ulong bi_arch_number; /* unique id for this board */
88 ulong bi_boot_params; /* where this board expects params */
89#ifdef CONFIG_NR_DRAM_BANKS
90 struct { /* RAM configuration */
Bin Mengc8964482015-08-06 01:31:20 -070091 phys_addr_t start;
92 phys_size_t size;
Simon Glass4c0dc6d2013-03-05 14:39:35 +000093 } bi_dram[CONFIG_NR_DRAM_BANKS];
94#endif /* CONFIG_NR_DRAM_BANKS */
95} bd_t;
96
97#endif /* __ASSEMBLY__ */
98
99#endif /* __ASM_GENERIC_U_BOOT_H__ */