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git01.mediatek.com / filogic / uboot / 7f936d483098e3177391fa4985b5161a1c2ff42a / . / include / configs / ti_am335x_common.h
blob: 9697431b449638e0a88124be96d686a711211d0e [file] [log] [blame]
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]1/*
2 * ti_am335x_common.h
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 *
8 * For more details, please see the technical documents listed at
9 * http://www.ti.com/product/am3359#technicaldocuments
10 */
11
12#ifndef __CONFIG_TI_AM335X_COMMON_H__
13#define __CONFIG_TI_AM335X_COMMON_H__
14
15#define CONFIG_AM33XX
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]16#define CONFIG_ARCH_CPU_INIT
17#define CONFIG_SYS_CACHELINE_SIZE 64
18#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
19#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
Heiko Schocher2233e462013-11-04 14:05:00 +0100[diff] [blame]20#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]21
Simon Glassb7fe5812014-10-22 21:37:14 -0600[diff] [blame]22#ifndef CONFIG_SPL_BUILD
Simon Glassb7fe5812014-10-22 21:37:14 -0600[diff] [blame]23# define CONFIG_OMAP_SERIAL
Simon Glassb7fe5812014-10-22 21:37:14 -0600[diff] [blame]24#endif
25
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]26#include <asm/arch/omap.h>
27
28/* NS16550 Configuration */
29#define CONFIG_SYS_NS16550
Simon Glassb7fe5812014-10-22 21:37:14 -0600[diff] [blame]30#ifdef CONFIG_SPL_BUILD
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]31#define CONFIG_SYS_NS16550_SERIAL
32#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Simon Glassb7fe5812014-10-22 21:37:14 -0600[diff] [blame]33#endif
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]34#define CONFIG_SYS_NS16550_CLK 48000000
35
36/* Network defines. */
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]37#define CONFIG_CMD_DHCP
Mugunthan V N0c1d8562014-02-18 07:31:55 -0500[diff] [blame]38#define CONFIG_CMD_MII
Tom Rinib3d2e2c2013-08-20 08:53:46 -0400[diff] [blame]39#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]40#define CONFIG_BOOTP_DNS2
41#define CONFIG_BOOTP_SEND_HOSTNAME
42#define CONFIG_BOOTP_GATEWAY
43#define CONFIG_BOOTP_SUBNETMASK
44#define CONFIG_NET_RETRY_COUNT 10
Tom Rinib3d2e2c2013-08-20 08:53:46 -0400[diff] [blame]45#define CONFIG_CMD_PING
46#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
47#define CONFIG_MII /* Required in net/eth.c */
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]48
Tom Rini45841f62013-08-20 08:53:43 -0400[diff] [blame]49/*
Tom Rini2a766c42013-08-28 09:00:30 -0400[diff] [blame]50 * RTC related defines. To use bootcount you must set bootlimit in the
Tom Rini084240b2013-11-08 13:53:14 -0500[diff] [blame]51 * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT
52 * in the board config.
Tom Rini2a766c42013-08-28 09:00:30 -0400[diff] [blame]53 */
Tom Rini2a766c42013-08-28 09:00:30 -0400[diff] [blame]54#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
55
Tom Rini303bfe82013-10-01 12:32:04 -0400[diff] [blame]56/* Enable the HW watchdog, since we can use this with bootcount */
57#define CONFIG_HW_WATCHDOG
58#define CONFIG_OMAP_WATCHDOG
59
Tom Rini2a766c42013-08-28 09:00:30 -0400[diff] [blame]60/*
Tom Rini45841f62013-08-20 08:53:43 -0400[diff] [blame]61 * SPL related defines. The Public RAM memory map the ROM defines the
62 * area between 0x402F0400 and 0x4030B800 as a download area and
63 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
64 * supports X-MODEM loading via UART, and we leverage this and then use
65 * Y-MODEM to load u-boot.img, when booted over UART.
66 */
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]67#define CONFIG_SPL_TEXT_BASE 0x402F0400
Tom Rini45841f62013-08-20 08:53:43 -0400[diff] [blame]68#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
Tom Rinid9f808d2014-04-03 07:52:53 -0400[diff] [blame]69#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
70 (128 << 20))
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]71
Tom Rini303bfe82013-10-01 12:32:04 -0400[diff] [blame]72/* Enable the watchdog inside of SPL */
73#define CONFIG_SPL_WATCHDOG_SUPPORT
74
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]75/*
76 * Since SPL did pll and ddr initialization for us,
77 * we don't need to do it twice.
78 */
79#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
80#define CONFIG_SKIP_LOWLEVEL_INIT
81#endif
82
Tom Rini9fec9ae2014-05-21 12:57:22 -0400[diff] [blame]83/*
84 * When building U-Boot such that there is no previous loader
85 * we need to call board_early_init_f. This is taken care of in
86 * s_init when we have SPL used.
87 */
88#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL)
89#define CONFIG_BOARD_EARLY_INIT_F
90#endif
91
Enric Balletbò i Serra47858592013-12-06 21:30:20 +0100[diff] [blame]92#ifdef CONFIG_NAND
93#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
94#endif
95
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]96/* Now bring in the rest of the common code. */
Nishanth Menonad63dd72015-07-22 18:05:41 -0500[diff] [blame]97#include <configs/ti_armv7_omap.h>
Tom Rinia2f4c912013-08-09 11:22:17 -0400[diff] [blame]98
99#endif /* __CONFIG_TI_AM335X_COMMON_H__ */