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git01.mediatek.com / filogic / uboot / 7f1843228b92ea6a1149c1dc907df49b2e0b423e / . / configs / tinker-rk3288_defconfig
blob: 85d94a6ea89f3a68bb852ea13b3d036ede8dca79 [file] [log] [blame]
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
3CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]4CONFIG_SYS_ARCH_TIMER=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]5CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]6CONFIG_TEXT_BASE=0x01000000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]7CONFIG_SPL_GPIO=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=1
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]9CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]10CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]11CONFIG_ROCKCHIP_RK3288=y
Eddie Cai1e1a79f2017-01-18 11:03:54 +0800[diff] [blame]12CONFIG_TARGET_TINKER_RK3288=y
Tom Rinifdc7e362019-11-11 20:04:24 -0500[diff] [blame]13CONFIG_SPL_STACK_R_ADDR=0x80000
Simon Glassa8f0c942019-09-25 08:56:28 -0600[diff] [blame]14CONFIG_SPL_SIZE_LIMIT=0x4b000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]15CONFIG_DEBUG_UART_BASE=0xff690000
16CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]17CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]18CONFIG_DEBUG_UART=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]19CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
20CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
Tom Rini7f184322022-10-28 20:27:07 -0400[diff] [blame^]21CONFIG_SYS_MONITOR_LEN=614400
Tom Rinib5bf5622017-08-25 17:50:27 -0400[diff] [blame]22# CONFIG_ANDROID_BOOT_IMAGE is not set
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]23CONFIG_USE_PREBOOT=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]24CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]25CONFIG_SILENT_CONSOLE=y
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]26CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]27CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]28CONFIG_SPL_NO_BSS_LIMIT=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]29# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
30CONFIG_SPL_STACK=0xff718000
Jagan Teki8aa6c992019-09-17 11:40:41 +0530[diff] [blame]31CONFIG_SPL_STACK_R=y
32CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]33CONFIG_SPL_I2C=y
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]34CONFIG_SPL_POWER=y
Tom Rinif3c2f992022-06-25 19:29:46 -0400[diff] [blame]35CONFIG_SYS_BOOTM_LEN=0x4000000
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]36CONFIG_CMD_GPIO=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]37CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]38CONFIG_CMD_I2C=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]39CONFIG_CMD_MMC=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]40CONFIG_CMD_SPI=y
Eddie Caid1ba93e2017-03-07 12:47:07 +0800[diff] [blame]41CONFIG_CMD_USB=y
Urja Rannikko17dd9d32019-05-13 13:51:04 +0000[diff] [blame]42CONFIG_CMD_USB_MASS_STORAGE=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]43# CONFIG_CMD_SETEXPR is not set
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]44CONFIG_CMD_CACHE=y
45CONFIG_CMD_TIME=y
46CONFIG_CMD_PMIC=y
47CONFIG_CMD_REGULATOR=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +0100[diff] [blame]48# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]49# CONFIG_SPL_EFI_PARTITION is not set
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]50CONFIG_SPL_OF_CONTROL=y
Kever Yang614f2532019-07-01 11:49:13 +0800[diff] [blame]51CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]52CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]53CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]54CONFIG_SYS_MMC_ENV_DEV=1
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]55CONFIG_REGMAP=y
56CONFIG_SPL_REGMAP=y
57CONFIG_SYSCON=y
58CONFIG_SPL_SYSCON=y
59# CONFIG_SPL_SIMPLE_BUS is not set
60CONFIG_CLK=y
61CONFIG_SPL_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]62CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]63CONFIG_ROCKCHIP_GPIO=y
64CONFIG_SYS_I2C_ROCKCHIP=y
Jonas Karlman269a37f2017-04-22 08:57:54 +0000[diff] [blame]65CONFIG_MISC=y
66CONFIG_I2C_EEPROM=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]67CONFIG_MMC_DW=y
Masahiro Yamadadc607f82017-01-10 13:32:03 +0900[diff] [blame]68CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]69CONFIG_MTD=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]70CONFIG_SF_DEFAULT_SPEED=20000000
Jacob Chen5c3166d2017-02-23 14:20:17 +0800[diff] [blame]71CONFIG_ETH_DESIGNWARE=y
72CONFIG_GMAC_ROCKCHIP=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]73CONFIG_PINCTRL=y
74CONFIG_SPL_PINCTRL=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]75CONFIG_DM_PMIC=y
Jacob Chen614704b2017-05-02 14:54:52 +0800[diff] [blame]76CONFIG_PMIC_RK8XX=y
Simon Glass6343ffb2021-08-08 12:20:25 -0600[diff] [blame]77CONFIG_SPL_PMIC_RK8XX=y
Michael Trimarchi5e2d2382019-09-17 11:40:42 +0530[diff] [blame]78CONFIG_SPL_DM_REGULATOR=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]79CONFIG_DM_REGULATOR_FIXED=y
Michael Trimarchi5e2d2382019-09-17 11:40:42 +0530[diff] [blame]80CONFIG_SPL_DM_REGULATOR_FIXED=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]81CONFIG_REGULATOR_RK8XX=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]82CONFIG_PWM_ROCKCHIP=y
83CONFIG_RAM=y
84CONFIG_SPL_RAM=y
Xu Ziyuan535b3dc2016-08-01 08:46:19 +0800[diff] [blame]85CONFIG_DEBUG_UART_SHIFT=2
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]86CONFIG_SYSRESET=y
Eddie Caid1ba93e2017-03-07 12:47:07 +0800[diff] [blame]87CONFIG_USB=y
Philipp Tomsich54983812017-07-03 18:30:06 +0200[diff] [blame]88CONFIG_USB_DWC2=y
Adam Fordd4183d62018-01-02 10:39:52 -0600[diff] [blame]89CONFIG_ROCKCHIP_USB2_PHY=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]90CONFIG_USB_KEYBOARD=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]91CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]92CONFIG_USB_ETHER_ASIX=y
93CONFIG_USB_ETHER_SMSC95XX=y
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]94CONFIG_USB_GADGET=y
95CONFIG_USB_GADGET_DWC2_OTG=y
Simon Glass52cb5042022-10-18 07:46:31 -0600[diff] [blame]96CONFIG_VIDEO=y
Jagan Tekif31db0d2020-01-23 19:42:21 +0530[diff] [blame]97CONFIG_DISPLAY=y
98CONFIG_VIDEO_ROCKCHIP=y
99CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Tom Rinid49f5822020-02-28 13:28:38 -0500[diff] [blame]100CONFIG_CMD_DHRYSTONE=y
101CONFIG_ERRNO_STR=y