| Michael Trimarchi | c7b2830 | 2022-07-20 18:22:13 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2017 Free Electrons |
| 4 | * Copyright (C) 2017 NextThing Co |
| 5 | * |
| 6 | * Author: Boris Brezillon <boris.brezillon@free-electrons.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/mtd/rawnand.h> |
| 20 | |
| 21 | static void amd_nand_decode_id(struct nand_chip *chip) |
| 22 | { |
| 23 | struct mtd_info *mtd = nand_to_mtd(chip); |
| 24 | |
| 25 | nand_decode_ext_id(chip); |
| 26 | |
| 27 | /* |
| 28 | * Check for Spansion/AMD ID + repeating 5th, 6th byte since |
| 29 | * some Spansion chips have erasesize that conflicts with size |
| 30 | * listed in nand_ids table. |
| 31 | * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) |
| 32 | */ |
| 33 | if (chip->id.data[4] != 0x00 && chip->id.data[5] == 0x00 && |
| 34 | chip->id.data[6] == 0x00 && chip->id.data[7] == 0x00 && |
| 35 | mtd->writesize == 512) { |
| 36 | mtd->erasesize = 128 * 1024; |
| 37 | mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1); |
| 38 | } |
| 39 | } |
| 40 | |
| 41 | static int amd_nand_init(struct nand_chip *chip) |
| 42 | { |
| 43 | if (nand_is_slc(chip)) |
| 44 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
| 45 | |
| 46 | return 0; |
| 47 | } |
| 48 | |
| 49 | const struct nand_manufacturer_ops amd_nand_manuf_ops = { |
| 50 | .detect = amd_nand_decode_id, |
| 51 | .init = amd_nand_init, |
| 52 | }; |