blob: 1d615ec28387db4432bfff5b786b51fd4d6cc616 [file] [log] [blame]
Michal Simek113ca2e2022-02-23 15:52:03 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Xilinx Inc.
4 */
5
Michal Simek113ca2e2022-02-23 15:52:03 +01006#include <cpu_func.h>
7#include <dm.h>
8#include <dma.h>
9#include <dma-uclass.h>
10#include <errno.h>
11#include <dm/device_compat.h>
12
13/**
14 * struct zynqmp_dpdma_priv - Private structure
15 * @dev: Device uclass for video_ops
16 */
17struct zynqmp_dpdma_priv {
18 struct udevice *dev;
19};
20
21static int zynqmp_dpdma_probe(struct udevice *dev)
22{
23 /* Only placeholder for power domain driver */
24 return 0;
25}
26
27static const struct dma_ops zynqmp_dpdma_ops = {
28};
29
30static const struct udevice_id zynqmp_dpdma_ids[] = {
31 { .compatible = "xlnx,zynqmp-dpdma" },
32 { }
33};
34
35U_BOOT_DRIVER(zynqmp_dpdma) = {
36 .name = "zynqmp_dpdma",
37 .id = UCLASS_DMA,
38 .of_match = zynqmp_dpdma_ids,
39 .ops = &zynqmp_dpdma_ops,
40 .probe = zynqmp_dpdma_probe,
41 .priv_auto = sizeof(struct zynqmp_dpdma_priv),
42};