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wdenk591dda52002-11-18 00:14:45 +00001/*
2 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02003 * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
wdenk591dda52002-11-18 00:14:45 +00004 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Based on sc520cdp.c from rolo 1.6:
26 *----------------------------------------------------------------------
27 * (C) Copyright 2000
28 * Sysgo Real-Time Solutions GmbH
29 * Klein-Winternheim, Germany
30 *----------------------------------------------------------------------
31 */
32
wdenkabda5ca2003-05-31 18:35:21 +000033#include <config.h>
34
wdenk591dda52002-11-18 00:14:45 +000035#include <common.h>
36#include <asm/io.h>
Graeme Russe6d4f432009-02-24 21:12:35 +110037#include <ali512x.h>
wdenk591dda52002-11-18 00:14:45 +000038
39
40/* ALI M5123 Logical device numbers:
41 * 0 FDC
42 * 1 unused?
43 * 2 unused?
44 * 3 lpt
45 * 4 UART1
46 * 5 UART2
47 * 6 RTC
48 * 7 mouse/kbd
49 * 8 CIO
50 */
51
52/*
53 ************************************************************
54 * Some access primitives for the ALi chip: *
55 ************************************************************
56 */
57
58static void ali_write(u8 index, u8 value)
wdenk57b2d802003-06-27 21:31:46 +000059{
wdenk591dda52002-11-18 00:14:45 +000060 /* write an arbirary register */
61 outb(index, ALI_INDEX);
62 outb(value, ALI_DATA);
63}
64
wdenkabda5ca2003-05-31 18:35:21 +000065#if 0
wdenk591dda52002-11-18 00:14:45 +000066static int ali_read(u8 index)
67{
68 outb(index, ALI_INDEX);
69 return inb(ALI_DATA);
70}
wdenkabda5ca2003-05-31 18:35:21 +000071#endif
wdenk591dda52002-11-18 00:14:45 +000072
73#define ALI_OPEN() \
wdenkabda5ca2003-05-31 18:35:21 +000074 outb(0x51, ALI_INDEX); \
wdenk57b2d802003-06-27 21:31:46 +000075 outb(0x23, ALI_INDEX)
wdenk591dda52002-11-18 00:14:45 +000076
77
78#define ALI_CLOSE() \
wdenkabda5ca2003-05-31 18:35:21 +000079 outb(0xbb, ALI_INDEX)
wdenk591dda52002-11-18 00:14:45 +000080
81/* Select a logical device */
82#define ALI_SELDEV(dev) \
wdenk57b2d802003-06-27 21:31:46 +000083 ali_write(0x07, dev)
wdenk591dda52002-11-18 00:14:45 +000084
85
86void ali512x_init(void)
87{
88 ALI_OPEN();
89
90 ali_write(0x02, 0x01); /* soft reset */
91 ali_write(0x03, 0x03); /* disable access to CIOs */
92 ali_write(0x22, 0x00); /* disable direct powerdown */
93 ali_write(0x23, 0x00); /* disable auto powerdown */
94 ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */
95
96 ALI_CLOSE();
97}
98
99void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)
100{
101 ALI_OPEN();
102 ALI_SELDEV(0);
wdenk57b2d802003-06-27 21:31:46 +0000103
wdenk591dda52002-11-18 00:14:45 +0000104 ali_write(0x30, enabled?1:0);
105 if (enabled) {
106 ali_write(0x60, io >> 8);
107 ali_write(0x61, io & 0xff);
108 ali_write(0x70, irq);
109 ali_write(0x74, dma_channel);
wdenk57b2d802003-06-27 21:31:46 +0000110
wdenk591dda52002-11-18 00:14:45 +0000111 /* AT mode, no drive swap */
112 ali_write(0xf0, 0x08);
113 ali_write(0xf1, 0x00);
114 ali_write(0xf2, 0xff);
115 ali_write(0xf4, 0x00);
116 }
117 ALI_CLOSE();
118}
119
120
121void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)
122{
123 ALI_OPEN();
124 ALI_SELDEV(3);
wdenk57b2d802003-06-27 21:31:46 +0000125
wdenk591dda52002-11-18 00:14:45 +0000126 ali_write(0x30, enabled?1:0);
127 if (enabled) {
128 ali_write(0x60, io >> 8);
129 ali_write(0x61, io & 0xff);
130 ali_write(0x70, irq);
131 ali_write(0x74, dma_channel);
wdenk57b2d802003-06-27 21:31:46 +0000132
wdenk591dda52002-11-18 00:14:45 +0000133 /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */
134 ali_write(0xf0, 0xbc);
135 /* 12 MHz, Burst DMA in ECP */
136 ali_write(0xf1, 0x05);
137 }
138 ALI_CLOSE();
139
140}
141
142void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)
143{
144 ALI_OPEN();
145 ALI_SELDEV(index?5:4);
wdenk57b2d802003-06-27 21:31:46 +0000146
wdenk591dda52002-11-18 00:14:45 +0000147 ali_write(0x30, enabled?1:0);
148 if (enabled) {
149 ali_write(0x60, io >> 8);
150 ali_write(0x61, io & 0xff);
151 ali_write(0x70, irq);
wdenk57b2d802003-06-27 21:31:46 +0000152
wdenk591dda52002-11-18 00:14:45 +0000153 ali_write(0xf0, 0x00);
154 ali_write(0xf1, 0x00);
wdenk57b2d802003-06-27 21:31:46 +0000155
wdenk591dda52002-11-18 00:14:45 +0000156 /* huh? write 0xf2 twice - a typo in rolo
wdenk57b2d802003-06-27 21:31:46 +0000157 * or some secret ali errata? Who knows?
wdenk591dda52002-11-18 00:14:45 +0000158 */
159 if (index) {
160 ali_write(0xf2, 0x00);
161 }
162 ali_write(0xf2, 0x0c);
163 }
164 ALI_CLOSE();
165
166}
167
168void ali512x_set_uart2_irda(int enabled)
169{
170 ALI_OPEN();
171 ALI_SELDEV(5);
wdenk57b2d802003-06-27 21:31:46 +0000172
wdenk591dda52002-11-18 00:14:45 +0000173 ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */
174 ALI_CLOSE();
175
176}
177
178void ali512x_set_rtc(int enabled, u16 io, u8 irq)
179{
180 ALI_OPEN();
181 ALI_SELDEV(6);
wdenk57b2d802003-06-27 21:31:46 +0000182
wdenk591dda52002-11-18 00:14:45 +0000183 ali_write(0x30, enabled?1:0);
184 if (enabled) {
185 ali_write(0x60, io >> 8);
186 ali_write(0x61, io & 0xff);
187 ali_write(0x70, irq);
188
189 ali_write(0xf0, 0x00);
190 }
191 ALI_CLOSE();
192}
193
194void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)
195{
196 ALI_OPEN();
197 ALI_SELDEV(7);
wdenk57b2d802003-06-27 21:31:46 +0000198
wdenk591dda52002-11-18 00:14:45 +0000199 ali_write(0x30, enabled?1:0);
200 if (enabled) {
201 ali_write(0x70, kbc_irq);
wdenk57b2d802003-06-27 21:31:46 +0000202 ali_write(0x72, mouse_irq);
203
wdenk591dda52002-11-18 00:14:45 +0000204 ali_write(0xf0, 0x00);
205 }
206 ALI_CLOSE();
207}
208
209
210/* Common I/O
wdenk57b2d802003-06-27 21:31:46 +0000211 *
wdenk591dda52002-11-18 00:14:45 +0000212 * (This descripotsion is base on several incompete sources
213 * since I have not been able to obtain any datasheet for the device
wdenk57b2d802003-06-27 21:31:46 +0000214 * there may be some mis-understandings burried in here.
wdenk591dda52002-11-18 00:14:45 +0000215 * -- Daniel daniel@omicron.se)
wdenk57b2d802003-06-27 21:31:46 +0000216 *
wdenk591dda52002-11-18 00:14:45 +0000217 * There are 22 CIO pins numbered
218 * 10-17
219 * 20-25
220 * 30-37
wdenk57b2d802003-06-27 21:31:46 +0000221 *
wdenk591dda52002-11-18 00:14:45 +0000222 * 20-24 are dedicated CIO pins, the other 17 are muliplexed with
223 * other functions.
wdenk57b2d802003-06-27 21:31:46 +0000224 *
225 * Secondary
wdenk591dda52002-11-18 00:14:45 +0000226 * CIO Pin Function Decription
227 * =======================================================
228 * CIO10 IRQIN1 Interrupt input 1?
229 * CIO11 IRQIN2 Interrupt input 2?
230 * CIO12 IRRX IrDa Receive
231 * CIO13 IRTX IrDa Transmit
232 * CIO14 P21 KBC P21 fucntion
233 * CIO15 P20 KBC P21 fucntion
234 * CIO16 I2C_CLK I2C Clock
235 * CIO17 I2C_DAT I2C Data
wdenk57b2d802003-06-27 21:31:46 +0000236 *
wdenk591dda52002-11-18 00:14:45 +0000237 * CIO20 -
238 * CIO21 -
239 * CIO22 -
240 * CIO23 -
241 * CIO24 -
242 * CIO25 LOCK Keylock
wdenk57b2d802003-06-27 21:31:46 +0000243 *
wdenk591dda52002-11-18 00:14:45 +0000244 * CIO30 KBC_CLK Keybaord Clock
245 * CIO31 CS0J General Chip Select decoder CS0J
246 * CIO32 CS1J General Chip Select decoder CS1J
247 * CIO33 ALT_KCLK Alternative Keyboard Clock
248 * CIO34 ALT_KDAT Alternative Keyboard Data
249 * CIO35 ALT_MCLK Alternative Mouse Clock
250 * CIO36 ALT_MDAT Alternative Mouse Data
251 * CIO37 ALT_KBC Alternative KBC select
252 *
wdenk57b2d802003-06-27 21:31:46 +0000253 * The CIO use an indirect address scheme.
254 *
wdenkabda5ca2003-05-31 18:35:21 +0000255 * Reigster 3 in the SIO is used to select the index and data
256 * port addresses where the CIO I/O registers show up.
wdenk57b2d802003-06-27 21:31:46 +0000257 * The function selection registers are accessible under
258 * function SIO 8.
259 *
wdenk591dda52002-11-18 00:14:45 +0000260 * SIO reigster 3 (CIO Address Selection) bit definitions:
wdenkabda5ca2003-05-31 18:35:21 +0000261 * bit 7 CIO index and data registers enabled
262 * bit 1-0 CIO indirect registers port address select
Wolfgang Denka1be4762008-05-20 16:00:29 +0200263 * 0 index = 0xE0 data = 0xE1
wdenk591dda52002-11-18 00:14:45 +0000264 * 1 index = 0xE2 data = 0xE3
265 * 2 index = 0xE4 data = 0xE5
266 * 3 index = 0xEA data = 0xEB
wdenk57b2d802003-06-27 21:31:46 +0000267 *
wdenkabda5ca2003-05-31 18:35:21 +0000268 * There are three CIO I/O register accessed via CIO index port and CIO data port
wdenk591dda52002-11-18 00:14:45 +0000269 * 0x01 CIO 10-17 data
270 * 0x02 CIO 20-25 data (bits 7-6 unused)
271 * 0x03 CIO 30-37 data
wdenk57b2d802003-06-27 21:31:46 +0000272 *
273 *
274 * The pin function is accessed through normal
wdenk591dda52002-11-18 00:14:45 +0000275 * SIO registers, each register have the same format:
wdenk57b2d802003-06-27 21:31:46 +0000276 *
wdenk591dda52002-11-18 00:14:45 +0000277 * Bit Function Value
wdenk57b2d802003-06-27 21:31:46 +0000278 * 0 Input/output 1=input
wdenk591dda52002-11-18 00:14:45 +0000279 * 1 Polarity of signal 1=inverted
280 * 2 Unused ??
281 * 3 Function (normal or special) 1=special
282 * 7-4 Unused
wdenk57b2d802003-06-27 21:31:46 +0000283 *
wdenk591dda52002-11-18 00:14:45 +0000284 * SIO REG
285 * 0xe0 CIO 10 Config
286 * 0xe1 CIO 11 Config
287 * 0xe2 CIO 12 Config
288 * 0xe3 CIO 13 Config
289 * 0xe4 CIO 14 Config
290 * 0xe5 CIO 15 Config
291 * 0xe6 CIO 16 Config
292 * 0xe7 CIO 16 Config
293 *
294 * 0xe8 CIO 20 Config
295 * 0xe9 CIO 21 Config
296 * 0xea CIO 22 Config
297 * 0xeb CIO 23 Config
298 * 0xec CIO 24 Config
299 * 0xed CIO 25 Config
300 *
301 * 0xf5 CIO 30 Config
302 * 0xf6 CIO 31 Config
303 * 0xf7 CIO 32 Config
304 * 0xf8 CIO 33 Config
305 * 0xf9 CIO 34 Config
306 * 0xfa CIO 35 Config
307 * 0xfb CIO 36 Config
308 * 0xfc CIO 37 Config
wdenk57b2d802003-06-27 21:31:46 +0000309 *
wdenk591dda52002-11-18 00:14:45 +0000310 */
311
wdenkabda5ca2003-05-31 18:35:21 +0000312#define ALI_CIO_PORT_SEL 0x83
313#define ALI_CIO_INDEX 0xea
314#define ALI_CIO_DATA 0xeb
315
wdenk591dda52002-11-18 00:14:45 +0000316void ali512x_set_cio(int enabled)
317{
318 int i;
wdenk57b2d802003-06-27 21:31:46 +0000319
wdenk591dda52002-11-18 00:14:45 +0000320 ALI_OPEN();
wdenk57b2d802003-06-27 21:31:46 +0000321
wdenkabda5ca2003-05-31 18:35:21 +0000322 if (enabled) {
323 ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */
324 } else {
325 ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80);
326 }
wdenk57b2d802003-06-27 21:31:46 +0000327
wdenk591dda52002-11-18 00:14:45 +0000328 ALI_SELDEV(8);
wdenk57b2d802003-06-27 21:31:46 +0000329
wdenk591dda52002-11-18 00:14:45 +0000330 ali_write(0x30, enabled?1:0);
wdenk57b2d802003-06-27 21:31:46 +0000331
wdenk591dda52002-11-18 00:14:45 +0000332 /* set all pins to input to start with */
333 for (i=0xe0;i<0xee;i++) {
334 ali_write(i, 1);
335 }
wdenk57b2d802003-06-27 21:31:46 +0000336
wdenk591dda52002-11-18 00:14:45 +0000337 for (i=0xf5;i<0xfe;i++) {
338 ali_write(i, 1);
339 }
wdenk57b2d802003-06-27 21:31:46 +0000340
wdenk591dda52002-11-18 00:14:45 +0000341 ALI_CLOSE();
342}
343
wdenkabda5ca2003-05-31 18:35:21 +0000344
wdenk591dda52002-11-18 00:14:45 +0000345void ali512x_cio_function(int pin, int special, int inv, int input)
346{
347 u8 data;
348 u8 addr;
wdenk57b2d802003-06-27 21:31:46 +0000349
wdenk591dda52002-11-18 00:14:45 +0000350 /* valid pins are 10-17, 20-25 and 30-37 */
wdenk57b2d802003-06-27 21:31:46 +0000351 if (pin >= 10 && pin <= 17) {
wdenkabda5ca2003-05-31 18:35:21 +0000352 addr = 0xe0+(pin&7);
wdenk591dda52002-11-18 00:14:45 +0000353 } else if (pin >= 20 && pin <= 25) {
wdenkabda5ca2003-05-31 18:35:21 +0000354 addr = 0xe8+(pin&7);
wdenk57b2d802003-06-27 21:31:46 +0000355 } else if (pin >= 30 && pin <= 37) {
wdenkabda5ca2003-05-31 18:35:21 +0000356 addr = 0xf5+(pin&7);
wdenk591dda52002-11-18 00:14:45 +0000357 } else {
358 return;
359 }
wdenk57b2d802003-06-27 21:31:46 +0000360
wdenk591dda52002-11-18 00:14:45 +0000361 ALI_OPEN();
wdenkabda5ca2003-05-31 18:35:21 +0000362
wdenk591dda52002-11-18 00:14:45 +0000363 ALI_SELDEV(8);
wdenk57b2d802003-06-27 21:31:46 +0000364
365
wdenkabda5ca2003-05-31 18:35:21 +0000366 data=0xf4;
wdenk591dda52002-11-18 00:14:45 +0000367 if (special) {
368 data |= 0x08;
369 } else {
370 if (inv) {
371 data |= 0x02;
372 }
373 if (input) {
374 data |= 0x01;
375 }
376 }
wdenk57b2d802003-06-27 21:31:46 +0000377
wdenk591dda52002-11-18 00:14:45 +0000378 ali_write(addr, data);
wdenk57b2d802003-06-27 21:31:46 +0000379
wdenk591dda52002-11-18 00:14:45 +0000380 ALI_CLOSE();
381}
382
wdenk57b2d802003-06-27 21:31:46 +0000383void ali512x_cio_out(int pin, int value)
wdenk591dda52002-11-18 00:14:45 +0000384{
385 u8 reg;
386 u8 data;
387 u8 bit;
wdenk57b2d802003-06-27 21:31:46 +0000388
wdenkabda5ca2003-05-31 18:35:21 +0000389 reg = pin/10;
390 bit = 1 << (pin%10);
wdenk57b2d802003-06-27 21:31:46 +0000391
392
wdenkabda5ca2003-05-31 18:35:21 +0000393 outb(reg, ALI_CIO_INDEX); /* select I/O register */
394 data = inb(ALI_CIO_DATA);
wdenk591dda52002-11-18 00:14:45 +0000395 if (value) {
396 data |= bit;
397 } else {
398 data &= ~bit;
399 }
wdenkabda5ca2003-05-31 18:35:21 +0000400 outb(data, ALI_CIO_DATA);
wdenk591dda52002-11-18 00:14:45 +0000401}
402
403int ali512x_cio_in(int pin)
404{
405 u8 reg;
406 u8 data;
407 u8 bit;
wdenk57b2d802003-06-27 21:31:46 +0000408
wdenk591dda52002-11-18 00:14:45 +0000409 /* valid pins are 10-17, 20-25 and 30-37 */
wdenkabda5ca2003-05-31 18:35:21 +0000410 reg = pin/10;
411 bit = 1 << (pin%10);
wdenk57b2d802003-06-27 21:31:46 +0000412
413
wdenkabda5ca2003-05-31 18:35:21 +0000414 outb(reg, ALI_CIO_INDEX); /* select I/O register */
415 data = inb(ALI_CIO_DATA);
wdenk57b2d802003-06-27 21:31:46 +0000416
417 return data & bit;
wdenk591dda52002-11-18 00:14:45 +0000418}