wdenk | 7ebf744 | 2002-11-02 23:17:16 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2002 ELTEC Elektronik AG |
| 3 | * Frank Gottschling <fgottschling@eltec.de> |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <command.h> |
| 26 | #include <mpc106.h> |
| 27 | #include <video_fb.h> |
| 28 | |
| 29 | /* ------------------------------------------------------------------------- */ |
| 30 | |
| 31 | int checkboard (void) |
| 32 | { |
| 33 | puts ("Board: ELTEC PowerPC\n"); |
| 34 | return (0); |
| 35 | } |
| 36 | |
| 37 | /* ------------------------------------------------------------------------- */ |
| 38 | |
| 39 | int checkflash (void) |
| 40 | { |
| 41 | /* TODO */ |
| 42 | printf ("Test not implemented !\n"); |
| 43 | return (0); |
| 44 | } |
| 45 | |
| 46 | /* ------------------------------------------------------------------------- */ |
| 47 | |
| 48 | static unsigned int mpc106_read_cfg_dword (unsigned int reg) |
| 49 | { |
| 50 | unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); |
| 51 | |
| 52 | out32r(MPC106_REG_ADDR, reg_addr); |
| 53 | |
| 54 | return (in32r(MPC106_REG_DATA | (reg & 0x3))); |
| 55 | } |
| 56 | |
| 57 | /* ------------------------------------------------------------------------- */ |
| 58 | |
| 59 | long int dram_size (int board_type) |
| 60 | { |
| 61 | /* |
| 62 | * No actual initialisation to do - done when setting up |
| 63 | * PICRs MCCRs ME/SARs etc in asm_init.S. |
| 64 | */ |
| 65 | |
| 66 | register unsigned long i, msar1, mear1, memSize; |
| 67 | |
| 68 | #if defined(CFG_MEMTEST) |
| 69 | register unsigned long reg; |
| 70 | |
| 71 | printf("Testing DRAM\n"); |
| 72 | |
| 73 | /* write each mem addr with it's address */ |
| 74 | for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) |
| 75 | *reg = reg; |
| 76 | |
| 77 | for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) |
| 78 | { |
| 79 | if (*reg != reg) |
| 80 | return -1; |
| 81 | } |
| 82 | #endif |
| 83 | |
| 84 | /* |
| 85 | * Since MPC107 memory controller chip has already been set to |
| 86 | * control all memory, just read and interpret its memory boundery register. |
| 87 | */ |
| 88 | memSize = 0; |
| 89 | msar1 = mpc106_read_cfg_dword(MPC106_MSAR1); |
| 90 | mear1 = mpc106_read_cfg_dword(MPC106_MEAR1); |
| 91 | i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf; |
| 92 | |
| 93 | do |
| 94 | { |
| 95 | if (i & 0x01) /* is bank enabled ? */ |
| 96 | memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; |
| 97 | msar1 >>= 8; |
| 98 | mear1 >>= 8; |
| 99 | i >>= 1; |
| 100 | } while (i); |
| 101 | |
| 102 | return (memSize * 0x100000); |
| 103 | } |
| 104 | /* ------------------------------------------------------------------------- */ |
| 105 | |
| 106 | long int initdram(int board_type) |
| 107 | { |
| 108 | return dram_size(board_type); |
| 109 | } |
| 110 | |
| 111 | /* ------------------------------------------------------------------------- */ |
| 112 | |
| 113 | /* |
| 114 | * The BAB 911 can be reset by writing bit 0 of the Processor Initialization |
| 115 | * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities |
| 116 | * Memory Block). |
| 117 | */ |
| 118 | void do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) |
| 119 | { |
| 120 | out8(MPC107_EUMB_PI, 1); |
| 121 | } |
| 122 | |
| 123 | /* ------------------------------------------------------------------------- */ |
| 124 | |
| 125 | #if defined(CONFIG_WATCHDOG) |
| 126 | |
| 127 | /* |
| 128 | * Since the 7xx CPUs don't have an internal watchdog, this function is |
| 129 | * board specific. |
| 130 | */ |
| 131 | void watchdog_reset(void) |
| 132 | { |
| 133 | } |
| 134 | #endif /* CONFIG_WATCHDOG */ |
| 135 | |
| 136 | /* ------------------------------------------------------------------------- */ |
| 137 | |
| 138 | void after_reloc (ulong dest_addr) |
| 139 | { |
| 140 | DECLARE_GLOBAL_DATA_PTR; |
| 141 | |
| 142 | /* |
| 143 | * Jump to the main U-Boot board init code |
| 144 | */ |
| 145 | board_init_r(gd, dest_addr); |
| 146 | } |
| 147 | |
| 148 | /* ------------------------------------------------------------------------- */ |
| 149 | |
| 150 | #ifdef CONFIG_CONSOLE_EXTRA_INFO |
| 151 | extern GraphicDevice smi; |
| 152 | |
| 153 | void video_get_info_str (int line_number, char *info) |
| 154 | { |
| 155 | /* init video info strings for graphic console */ |
| 156 | switch (line_number) |
| 157 | { |
| 158 | case 1: |
| 159 | sprintf (info," MPC7xx V%d.%d at %d / %d MHz", |
| 160 | (get_pvr() >> 8) & 0xFF, |
| 161 | get_pvr() & 0xFF, |
| 162 | 400, |
| 163 | 100); |
| 164 | return; |
| 165 | case 2: |
| 166 | sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH", |
| 167 | dram_size(0)/0x100000, |
| 168 | flash_init()/0x100000); |
| 169 | return; |
| 170 | case 3: |
| 171 | sprintf (info, " %s", smi.modeIdent); |
| 172 | return; |
| 173 | } |
| 174 | |
| 175 | /* no more info lines */ |
| 176 | *info = 0; |
| 177 | return; |
| 178 | } |
| 179 | #endif |
| 180 | |
| 181 | |
| 182 | |
| 183 | |
| 184 | |
| 185 | |
| 186 | |
| 187 | |
| 188 | |
| 189 | |