Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 7e60cbad4901aa77016ce1e649dd2d0395491a02 / . / include / configs / kontron_sl28.h
blob: a073a06c8275db8163ce99572a43a9715a170fbd [file] [log] [blame]
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
2
Michael Walle8edcefa2022-05-30 23:02:10 +0200[diff] [blame]3#ifndef __SL28_CONFIG_H
4#define __SL28_CONFIG_H
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]5
6#include <asm/arch/stream_id_lsch3.h>
7#include <asm/arch/config.h>
8#include <asm/arch/soc.h>
9
10/* we don't use hwconfig but this has to be defined.. */
11#define HWCONFIG_BUFFER_SIZE 256
12
13/* we don't have secure memory unless we have a BL31 */
14#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]15#undef CFG_SYS_MEM_RESERVE_SECURE
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]16#endif
17
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]18#define CFG_SYS_DDR_SDRAM_BASE 0x80000000
Tom Rini376b88a2022-10-28 20:27:13 -0400[diff] [blame]19#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]20#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
21#define CFG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]22
23/* early stack pointer */
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]24
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]25/* SMP */
26#define CPU_RELEASE_ADDR secondary_boot_addr
27
28/* generic timer */
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]29
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]30/* early heap for SPL DM */
Tom Rini376b88a2022-10-28 20:27:13 -0400[diff] [blame]31#define CONFIG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]32
33/* serial port */
Tom Rinidf6a2152022-11-16 13:10:28 -0500[diff] [blame]34#define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]35
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]36/* SPL */
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]37
Sughosh Ganuccb36462022-04-15 11:29:34 +0530[diff] [blame]38/* GUID for capsule updatable firmware image */
39#define KONTRON_SL28_FIT_IMAGE_GUID \
40 EFI_GUID(0x86ebd44f, 0xfeb8, 0x466f, 0x8b, 0xb8, \
41 0x89, 0x06, 0x18, 0x45, 0x6d, 0x8b)
42
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]43/* environment */
44/* see include/configs/ti_armv7_common.h */
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]45#define ENV_MEM_LAYOUT_SETTINGS \
46 "loadaddr=0x82000000\0" \
47 "kernel_addr_r=0x82000000\0" \
48 "fdt_addr_r=0x88000000\0" \
49 "bootm_size=0x10000000\0" \
50 "pxefile_addr_r=0x80100000\0" \
51 "scriptaddr=0x80000000\0" \
52 "ramdisk_addr_r=0x88080000\0"
53
54#define BOOT_TARGET_DEVICES(func) \
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]55 func(MMC, mmc, 0) \
Michael Walle654652a2020-12-20 22:35:13 +0100[diff] [blame]56 func(MMC, mmc, 1) \
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]57 func(NVME, nvme, 0) \
58 func(USB, usb, 0) \
Michael Walle101410e2021-01-08 00:08:59 +0100[diff] [blame]59 func(SCSI, scsi, 0) \
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]60 func(DHCP, dhcp, 0) \
61 func(PXE, pxe, 0)
62#include <config_distro_bootcmd.h>
63
64#define CONFIG_EXTRA_ENV_SETTINGS \
65 "env_addr=0x203e0004\0" \
66 "envload=env import -d -b ${env_addr}\0" \
67 "install_rcw=source 20200000\0" \
68 "fdtfile=freescale/fsl-ls1028a-kontron-sl28.dtb\0" \
Michael Walle0b132092021-11-09 14:48:51 +0530[diff] [blame]69 "dfu_alt_info=sf 0:0=u-boot-bin raw 0x210000 0x1d0000;" \
70 "u-boot-env raw 0x3e0000 0x20000\0" \
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]71 ENV_MEM_LAYOUT_SETTINGS \
72 BOOTENV
73
Michael Walle8edcefa2022-05-30 23:02:10 +0200[diff] [blame]74#endif /* __SL28_CONFIG_H */