blob: 4bb618b32c296aa0efa1a1b81ba017714334f79f [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rick Chen36cb27c2017-12-26 13:55:53 +08002/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chen36cb27c2017-12-26 13:55:53 +08005 */
6
7#include <asm/mach-types.h>
8#include <common.h>
9#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
10#include <netdev.h>
11#endif
12#include <linux/io.h>
Rick Chen36cb27c2017-12-26 13:55:53 +080013
14DECLARE_GLOBAL_DATA_PTR;
15
16/*
17 * Miscellaneous platform dependent initializations
18 */
19
20int board_init(void)
21{
22 gd->bd->bi_arch_number = MACH_TYPE_AE250;
23 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
24
25 return 0;
26}
27
28int dram_init(void)
29{
30 unsigned long sdram_base = PHYS_SDRAM_0;
31 unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
32 unsigned long actual_size;
33
34 actual_size = get_ram_size((void *)sdram_base, expected_size);
35 gd->ram_size = actual_size;
36
37 if (expected_size != actual_size) {
38 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
39 actual_size >> 20, expected_size >> 20);
40 }
41
42 return 0;
43}
44
45int dram_init_banksize(void)
46{
47 gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
48 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
49 gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
50 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
51
52 return 0;
53}
54
55#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
56int board_eth_init(bd_t *bd)
57{
58 return ftmac100_initialize(bd);
59}
60#endif
61
62ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
63{
64 return 0;
65}
Rick Chen40a6fe72018-03-29 10:08:33 +080066
67void *board_fdt_blob_setup(void)
68{
69 void **ptr = (void *)CONFIG_SYS_SDRAM_BASE;
70 if (fdt_magic(*ptr) == FDT_MAGIC)
71 return (void *)*ptr;
72
73 return (void *)CONFIG_SYS_FDT_BASE;
74}