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Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrick Delaunayf7b2a842020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard879cde52019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020013#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060014#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060015#include <env_internal.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060016#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010017#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020018#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070019#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010020#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070021#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010022#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060023#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070024#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010025#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020026#include <mtd_node.h>
Simon Glass274e0b02020-05-10 11:39:56 -060027#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020028#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020029#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020030#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020031#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010032#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010033#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020034#include <watchdog.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020035#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010036#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010037#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020038#include <asm/arch/sys_proto.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020039#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060040#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060041#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070042#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020043#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020044#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010045#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010046
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +020047#include "../../st/common/stusb160x.h"
48
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010049/* SYSCFG registers */
50#define SYSCFG_BOOTR 0x00
51#define SYSCFG_PMCSETR 0x04
52#define SYSCFG_IOCTRLSETR 0x18
53#define SYSCFG_ICNR 0x1C
54#define SYSCFG_CMPCR 0x20
55#define SYSCFG_CMPENSETR 0x24
56#define SYSCFG_PMCCLRR 0x44
57
58#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
59#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
60
61#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
62#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
63#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
64#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
65#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
66
67#define SYSCFG_CMPCR_SW_CTRL BIT(1)
68#define SYSCFG_CMPCR_READY BIT(8)
69
70#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
71
72#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
73#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
74
75#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
76
77#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020078#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
79#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
80#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010081
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010082/*
83 * Get a global data pointer
84 */
85DECLARE_GLOBAL_DATA_PTR;
86
Patrice Chotardcded32f2019-04-30 18:09:38 +020087#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010088#define USB_WARNING_LOW_THRESHOLD_UV 660000
89#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020090#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010091
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020092int board_early_init_f(void)
93{
94 /* nothing to do, only used in SPL */
95 return 0;
96}
97
Patrick Delaunay92dc1022019-02-12 11:44:41 +010098int checkboard(void)
99{
100 int ret;
101 char *mode;
102 u32 otp;
103 struct udevice *dev;
104 const char *fdt_compat;
105 int fdt_compat_len;
106
Patrick Delaunay472407a2020-03-18 09:22:49 +0100107 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100108 mode = "trusted";
109 else
110 mode = "basic";
111
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100112 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
113 &fdt_compat_len);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100114
115 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
116 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100117
Patrick Delaunay52163d92020-03-24 09:05:00 +0100118 /* display the STMicroelectronics board identification */
Patrick Delaunay0885c232020-02-12 19:37:42 +0100119 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
120 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700121 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay0885c232020-02-12 19:37:42 +0100122 &dev);
123 if (!ret)
124 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
125 &otp, sizeof(otp));
126 if (ret > 0 && otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100127 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
128 otp >> 16,
129 (otp >> 12) & 0xF,
130 (otp >> 4) & 0xF,
131 ((otp >> 8) & 0xF) - 1 + 'A',
132 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100133 }
134
135 return 0;
136}
137
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100138static void board_key_check(void)
139{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100140 ofnode node;
141 struct gpio_desc gpio;
142 enum forced_boot_mode boot_mode = BOOT_NORMAL;
143
Patrick Delaunayf6604852020-07-31 16:31:42 +0200144 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
145 return;
146
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100147 node = ofnode_path("/config");
148 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100149 log_debug("no /config node?\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100150 return;
151 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200152 if (IS_ENABLED(CONFIG_FASTBOOT)) {
153 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
154 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100155 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200156 } else {
157 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100158 log_notice("Fastboot key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200159 boot_mode = BOOT_FASTBOOT;
160 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100161
Patrick Delaunayf6604852020-07-31 16:31:42 +0200162 dm_gpio_free(NULL, &gpio);
163 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100164 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200165 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
166 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
167 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100168 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200169 } else {
170 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100171 log_notice("STM32Programmer key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200172 boot_mode = BOOT_STM32PROG;
173 }
174 dm_gpio_free(NULL, &gpio);
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100175 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100176 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100177 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100178 log_notice("entering download mode...\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100179 clrsetbits_le32(TAMP_BOOT_CONTEXT,
180 TAMP_BOOT_FORCED_MASK,
181 boot_mode);
182 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100183}
184
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100185int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200186{
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100187 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200188 int ret;
189
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200190 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
191 return -ENODEV;
192
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +0200193 /* if typec stusb160x is present, means DK1 or DK2 board */
194 ret = stusb160x_cable_connected();
195 if (ret >= 0)
196 return ret;
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100197
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100198 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700199 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100200 &dwc2_udc_otg);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100201 if (ret) {
202 log_debug("dwc2_udc_otg init failed\n");
203 return ret;
204 }
Patrice Chotard204079b2018-08-10 17:12:14 +0200205
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100206 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100207}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200208
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200209#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200210#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
211#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
212
213int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
214{
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200215 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
216 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200217 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200218 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
219 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200220 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
221 &dev->idProduct);
222 else
223 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
224
225 return 0;
226}
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200227#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard879cde52019-02-12 16:50:40 +0100228
229static int get_led(struct udevice **dev, char *led_string)
230{
231 char *led_name;
232 int ret;
233
234 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
235 if (!led_name) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100236 log_debug("could not find %s config string\n", led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100237 return -ENOENT;
238 }
239 ret = led_get_by_label(led_name, dev);
240 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100241 log_debug("get=%d\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100242 return ret;
243 }
244
245 return 0;
246}
247
248static int setup_led(enum led_state_t cmd)
249{
250 struct udevice *dev;
251 int ret;
252
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200253 if (!CONFIG_IS_ENABLED(LED))
254 return 0;
255
Patrice Chotard879cde52019-02-12 16:50:40 +0100256 ret = get_led(&dev, "u-boot,boot-led");
257 if (ret)
258 return ret;
259
260 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200261 return ret;
262}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200263
264static void __maybe_unused led_error_blink(u32 nb_blink)
265{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200266 int ret;
267 struct udevice *led;
268 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200269
270 if (!nb_blink)
271 return;
272
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200273 if (CONFIG_IS_ENABLED(LED)) {
274 ret = get_led(&led, "u-boot,error-led");
275 if (!ret) {
276 /* make u-boot,error-led blinking */
277 /* if U32_MAX and 125ms interval, for 17.02 years */
278 for (i = 0; i < 2 * nb_blink; i++) {
279 led_set_state(led, LEDST_TOGGLE);
280 mdelay(125);
281 WATCHDOG_RESET();
282 }
283 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200284 }
285 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200286
287 /* infinite: the boot process must be stopped */
288 if (nb_blink == U32_MAX)
289 hang();
290}
Patrice Chotard204079b2018-08-10 17:12:14 +0200291
Patrice Chotard879cde52019-02-12 16:50:40 +0100292static int board_check_usb_power(void)
293{
294 struct ofnode_phandle_args adc_args;
295 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100296 ofnode node;
297 unsigned int raw;
298 int max_uV = 0;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200299 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100300 int ret, uV, adc_count;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200301 u32 nb_blink;
302 u8 i;
Patrick Delaunay5fe55082020-07-31 16:31:44 +0200303
304 if (!IS_ENABLED(CONFIG_ADC))
305 return -ENODEV;
306
Patrice Chotard879cde52019-02-12 16:50:40 +0100307 node = ofnode_path("/config");
308 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100309 log_debug("no /config node?\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100310 return -ENOENT;
311 }
312
313 /*
314 * Retrieve the ADC channels devices and get measurement
315 * for each of them
316 */
317 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
Patrick Delaunayd776a842020-09-25 09:41:14 +0200318 "#io-channel-cells", 0);
Patrice Chotard879cde52019-02-12 16:50:40 +0100319 if (adc_count < 0) {
320 if (adc_count == -ENOENT)
321 return 0;
322
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100323 log_err("can't find adc channel (%d)\n", adc_count);
Patrice Chotard879cde52019-02-12 16:50:40 +0100324
325 return adc_count;
326 }
327
328 for (i = 0; i < adc_count; i++) {
329 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
330 "#io-channel-cells", 0, i,
331 &adc_args)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100332 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100333 return 0;
334 }
335
336 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
337 &adc);
338
339 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100340 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100341 return ret;
342 }
343
344 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
345 &raw);
346 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100347 log_err("single shot failed for %s[%d]!\n",
348 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100349 return ret;
350 }
351 /* Convert to uV */
352 if (!adc_raw_to_uV(adc, raw, &uV)) {
353 if (uV > max_uV)
354 max_uV = uV;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200355 if (uV < min_uV)
356 min_uV = uV;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100357 log_debug("%s[%02d] = %u, %d uV\n",
358 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard879cde52019-02-12 16:50:40 +0100359 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100360 log_err("Can't get uV value for %s[%d]\n",
361 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100362 }
363 }
364
365 /*
366 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
367 * board is plugged on an USB-C 3A power supply and boot process can
368 * continue.
369 */
370 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotardcded32f2019-04-30 18:09:38 +0200371 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
372 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100373 return 0;
374
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100375 log_notice("****************************************************\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200376
377 /*
378 * If highest and lowest value are either both below
379 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
380 * means USB TYPE-C is in unattached mode, this is an issue, make
381 * u-boot,error-led blinking and stop boot process.
382 */
383 if ((max_uV > USB_LOW_THRESHOLD_UV &&
384 min_uV > USB_LOW_THRESHOLD_UV) ||
385 (max_uV <= USB_LOW_THRESHOLD_UV &&
386 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100387 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
388 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200389 /* with 125ms interval, led will blink for 17.02 years ....*/
390 nb_blink = U32_MAX;
391 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100392
Patrice Chotardcded32f2019-04-30 18:09:38 +0200393 if (max_uV > USB_LOW_THRESHOLD_UV &&
394 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
395 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100396 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100397 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200398 }
399
400 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
401 max_uV <= USB_START_LOW_THRESHOLD_UV &&
402 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100403 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100404 nb_blink = 3;
405 }
406
Patrice Chotardcded32f2019-04-30 18:09:38 +0200407 /*
408 * If highest value is above 2.15 Volts that means that the USB TypeC
409 * supplies more than 3 Amp, this is not compliant with TypeC specification
410 */
411 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100412 log_notice("* USB TYPE-C charger not compliant with *\n");
413 log_notice("* specification *\n");
414 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200415 /* with 125ms interval, led will blink for 17.02 years ....*/
416 nb_blink = U32_MAX;
417 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100418 log_notice("* Current too low, use a 3A power supply! *\n");
419 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200420 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100421
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200422 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100423
424 return 0;
425}
426
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100427static void sysconf_init(void)
428{
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100429 u8 *syscfg;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100430 struct udevice *pwr_dev;
431 struct udevice *pwr_reg;
432 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100433 u32 otp = 0;
Patrick Delaunay181298e2020-04-22 14:29:16 +0200434 int ret;
435 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100436
437 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
438
439 /* interconnect update : select master using the port 1 */
440 /* LTDC = AXI_M9 */
441 /* GPU = AXI_M8 */
442 /* today information is hardcoded in U-Boot */
443 writel(BIT(9), syscfg + SYSCFG_ICNR);
444
445 /* disable Pull-Down for boot pin connected to VDD */
446 bootr = readl(syscfg + SYSCFG_BOOTR);
447 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
448 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
449 writel(bootr, syscfg + SYSCFG_BOOTR);
450
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100451 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
452 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
453 * The customer will have to disable this for low frequencies
454 * or if AFMUX is selected but the function not used, typically for
455 * TRACE. Otherwise, impact on power consumption.
456 *
457 * WARNING:
458 * enabling High Speed mode while VDD>2.7V
459 * with the OTP product_below_2v5 (OTP 18, BIT 13)
460 * erroneously set to 1 can damage the IC!
461 * => U-Boot set the register only if VDD < 2.7V (in DT)
462 * but this value need to be consistent with board design
463 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200464 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700465 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200466 &pwr_dev);
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200467 if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100468 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700469 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100470 &dev);
471 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100472 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100473 return;
474 }
475
476 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200477 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100478 otp = otp & BIT(13);
479
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200480 /* get VDD = vdd-supply */
481 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100482 &pwr_reg);
483
484 /* check if VDD is Low Voltage */
485 if (!ret) {
486 if (regulator_get_value(pwr_reg) < 2700000) {
487 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
488 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
489 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
490 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
491 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
492 syscfg + SYSCFG_IOCTRLSETR);
493
494 if (!otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100495 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100496 } else {
497 if (otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100498 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100499 }
500 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100501 log_debug("VDD unknown");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100502 }
503 }
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100504
505 /* activate automatic I/O compensation
506 * warning: need to ensure CSI enabled and ready in clock driver
507 */
508 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
509
Patrick Delaunay181298e2020-04-22 14:29:16 +0200510 /* poll until ready (1s timeout) */
511 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
512 val & SYSCFG_CMPCR_READY,
513 1000000);
514 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100515 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay181298e2020-04-22 14:29:16 +0200516 led_error_blink(10);
517 }
518
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100519 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100520}
521
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200522/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
523static int dk2_i2c1_fix(void)
524{
525 ofnode node;
526 struct gpio_desc hdmi, audio;
527 int ret = 0;
528
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200529 if (!IS_ENABLED(CONFIG_DM_REGULATOR))
530 return -ENODEV;
531
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200532 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
533 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100534 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200535 return -ENOENT;
536 }
537
538 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
539 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100540 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200541 return -ENOENT;
542 }
543
544 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
545 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100546 log_debug("no cs42l51@4a ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200547 return -ENOENT;
548 }
549
550 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
551 &audio, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100552 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200553 return -ENOENT;
554 }
555
556 /* before power up, insure that HDMI and AUDIO IC is under reset */
557 ret = dm_gpio_set_value(&hdmi, 1);
558 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100559 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200560 goto error;
561 }
562 ret = dm_gpio_set_value(&audio, 1);
563 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100564 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200565 goto error;
566 }
567
568 /* power-up audio IC */
569 regulator_autoset_by_name("v1v8_audio", NULL);
570
571 /* power-up HDMI IC */
572 regulator_autoset_by_name("v1v2_hdmi", NULL);
573 regulator_autoset_by_name("v3v3_hdmi", NULL);
574
575error:
576 return ret;
577}
578
579static bool board_is_dk2(void)
580{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100581 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200582 of_machine_is_compatible("st,stm32mp157c-dk2"))
583 return true;
584
585 return false;
586}
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200587
Patrick Delaunay486ae962020-04-22 14:29:13 +0200588static bool board_is_ev1(void)
589{
590 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
591 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
592 of_machine_is_compatible("st,stm32mp157c-ev1") ||
593 of_machine_is_compatible("st,stm32mp157d-ev1") ||
594 of_machine_is_compatible("st,stm32mp157f-ev1")))
595 return true;
596
597 return false;
598}
599
600/* touchscreen driver: only used for pincontrol configuration */
601static const struct udevice_id goodix_ids[] = {
602 { .compatible = "goodix,gt9147", },
603 { }
604};
605
606U_BOOT_DRIVER(goodix) = {
607 .name = "goodix",
608 .id = UCLASS_NOP,
609 .of_match = goodix_ids,
610};
611
612static void board_ev1_init(void)
613{
614 struct udevice *dev;
615
616 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65130cd2020-12-28 20:34:56 -0700617 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay486ae962020-04-22 14:29:13 +0200618}
619
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100620/* board dependent setup after realloc */
621int board_init(void)
622{
623 /* address of boot parameters */
624 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
625
Patrick Delaunay97896402020-06-04 14:30:24 +0200626 if (CONFIG_IS_ENABLED(DM_GPIO_HOG))
627 gpio_hog_probe_all();
Patrice Chotard972723a2019-03-11 11:13:17 +0100628
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100629 board_key_check();
630
Patrick Delaunay486ae962020-04-22 14:29:13 +0200631 if (board_is_ev1())
632 board_ev1_init();
633
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200634 if (board_is_dk2())
635 dk2_i2c1_fix();
636
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200637 if (IS_ENABLED(CONFIG_DM_REGULATOR))
638 regulators_enable_boot_on(_DEBUG);
Patrick Delaunay6519e442019-07-05 17:20:09 +0200639
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200640 if (!IS_ENABLED(CONFIG_TFABOOT))
641 sysconf_init();
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100642
Patrick Delaunay78f68f22020-04-10 19:14:01 +0200643 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200644 led_default_state();
645
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200646 setup_led(LEDST_ON);
647
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100648 return 0;
649}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100650
651int board_late_init(void)
652{
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100653 const void *fdt_compat;
654 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200655 int ret;
656 u32 otp;
657 struct udevice *dev;
658 char buf[10];
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200659 char dtb_name[256];
660 int buf_len;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100661
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200662 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
663 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
664 &fdt_compat_len);
665 if (fdt_compat && fdt_compat_len) {
666 if (strncmp(fdt_compat, "st,", 3) != 0) {
667 env_set("board_name", fdt_compat);
668 } else {
669 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200670
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200671 buf_len = sizeof(dtb_name);
672 strncpy(dtb_name, fdt_compat + 3, buf_len);
673 buf_len -= strlen(fdt_compat + 3);
674 strncat(dtb_name, ".dtb", buf_len);
675 env_set("fdtfile", dtb_name);
676 }
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200677 }
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200678 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700679 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200680 &dev);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200681
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200682 if (!ret)
683 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
684 &otp, sizeof(otp));
685 if (ret > 0 && otp) {
686 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
687 env_set("board_id", buf);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200688
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200689 snprintf(buf, sizeof(buf), "0x%04x",
690 ((otp >> 8) & 0xF) - 1 + 0xA);
691 env_set("board_rev", buf);
692 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200693 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100694
Patrice Chotard879cde52019-02-12 16:50:40 +0100695 /* for DK1/DK2 boards */
696 board_check_usb_power();
697
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100698 return 0;
699}
Patrice Chotard879cde52019-02-12 16:50:40 +0100700
701void board_quiesce_devices(void)
702{
703 setup_led(LEDST_OFF);
704}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200705
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200706/* eth init function : weak called in eqos driver */
707int board_interface_eth_init(struct udevice *dev,
708 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200709{
710 u8 *syscfg;
711 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200712 bool eth_clk_sel_reg = false;
713 bool eth_ref_clk_sel_reg = false;
714
715 /* Gigabit Ethernet 125MHz clock selection. */
716 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
717
718 /* Ethernet 50Mhz RMII clock selection */
719 eth_ref_clk_sel_reg =
720 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200721
722 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
723
724 if (!syscfg)
725 return -ENODEV;
726
727 switch (interface_type) {
728 case PHY_INTERFACE_MODE_MII:
729 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
730 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100731 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200732 break;
733 case PHY_INTERFACE_MODE_GMII:
734 if (eth_clk_sel_reg)
735 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
736 SYSCFG_PMCSETR_ETH_CLK_SEL;
737 else
738 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100739 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200740 break;
741 case PHY_INTERFACE_MODE_RMII:
742 if (eth_ref_clk_sel_reg)
743 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
744 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
745 else
746 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100747 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200748 break;
749 case PHY_INTERFACE_MODE_RGMII:
750 case PHY_INTERFACE_MODE_RGMII_ID:
751 case PHY_INTERFACE_MODE_RGMII_RXID:
752 case PHY_INTERFACE_MODE_RGMII_TXID:
753 if (eth_clk_sel_reg)
754 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
755 SYSCFG_PMCSETR_ETH_CLK_SEL;
756 else
757 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100758 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200759 break;
760 default:
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100761 log_debug("Do not manage %d interface\n",
762 interface_type);
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200763 /* Do not manage others interfaces */
764 return -EINVAL;
765 }
766
767 /* clear and set ETH configuration bits */
768 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
769 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
770 syscfg + SYSCFG_PMCCLRR);
771 writel(value, syscfg + SYSCFG_PMCSETR);
772
773 return 0;
774}
775
Patrice Chotard34320372019-05-02 18:28:05 +0200776enum env_location env_get_location(enum env_operation op, int prio)
777{
778 u32 bootmode = get_bootmode();
779
780 if (prio)
781 return ENVL_UNKNOWN;
782
783 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunay455b0652020-06-15 11:18:22 +0200784 case BOOT_FLASH_SD:
785 case BOOT_FLASH_EMMC:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200786 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
787 return ENVL_MMC;
788 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
789 return ENVL_EXT4;
790 else
791 return ENVL_NOWHERE;
792
Patrice Chotard34320372019-05-02 18:28:05 +0200793 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100794 case BOOT_FLASH_SPINAND:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200795 if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
796 return ENVL_UBI;
797 else
798 return ENVL_NOWHERE;
799
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200800 case BOOT_FLASH_NOR:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200801 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
802 return ENVL_SPI_FLASH;
803 else
804 return ENVL_NOWHERE;
805
Patrice Chotard34320372019-05-02 18:28:05 +0200806 default:
807 return ENVL_NOWHERE;
808 }
809}
810
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200811const char *env_ext4_get_intf(void)
812{
813 u32 bootmode = get_bootmode();
814
815 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
816 case BOOT_FLASH_SD:
817 case BOOT_FLASH_EMMC:
818 return "mmc";
819 default:
820 return "";
821 }
822}
823
824const char *env_ext4_get_dev_part(void)
825{
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000826 static char *const env_dev_part =
827#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
828 CONFIG_ENV_EXT4_DEVICE_AND_PART;
829#else
830 "";
831#endif
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200832 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000833
834 if (strlen(env_dev_part) > 0)
835 return env_dev_part;
836
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200837 u32 bootmode = get_bootmode();
838
839 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
840}
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000841
Patrick Delaunay455b0652020-06-15 11:18:22 +0200842int mmc_get_env_dev(void)
843{
844 u32 bootmode = get_bootmode();
845
846 return (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1;
847}
Patrick Delaunay455b0652020-06-15 11:18:22 +0200848
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200849#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900850int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200851{
Patrick Delaunaya8a67ed2020-07-29 13:24:52 +0200852 static const struct node_info nodes[] = {
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200853 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100854 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200855 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
Christophe Kerello15359e42020-07-31 09:53:42 +0200856 { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200857 };
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200858 char *boot_device;
Patrick Delaunay9d96e902020-07-31 16:31:50 +0200859
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200860 /* Check the boot-source and don't update MTD for serial or usb boot */
861 boot_device = env_get("boot_device");
862 if (!boot_device ||
863 (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
864 if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
865 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200866
867 return 0;
868}
869#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200870
871static void board_copro_image_process(ulong fw_image, size_t fw_size)
872{
873 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
874
875 if (!rproc_is_initialized())
876 if (rproc_init()) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100877 log_err("Remote Processor %d initialization failed\n",
878 id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200879 return;
880 }
881
882 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100883 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
884 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200885
Fabien Dessennead6cc942019-10-30 14:38:32 +0100886 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200887 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200888}
889
890U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);