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git01.mediatek.com / filogic / uboot / 7d831829fafc92557b8573f525f7f2c2f8160d54 / . / arch / arm / dts / uniphier-ph1-pro4-ref.dts
blob: b4b7f61e5c9dc9a98349714102187855a13f7595 [file] [log] [blame]
Masahiro Yamada53f6ec62014-11-26 18:33:59 +0900[diff] [blame]1/*
2 * Device Tree Source for UniPhier PH1-Pro4 Reference Board
3 *
Masahiro Yamada68a730e2015-02-05 14:30:25 +0900[diff] [blame]4 * Copyright (C) 2014-2015 Panasonic Corporation
Masahiro Yamadad5f83a42015-03-11 15:54:46 +0900[diff] [blame]5 * Copyright (C) 2015 Socionext Inc.
6 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada53f6ec62014-11-26 18:33:59 +0900[diff] [blame]7 *
Masahiro Yamada7bfb0a22015-06-30 18:27:01 +0900[diff] [blame]8 * SPDX-License-Identifier: GPL-2.0+ X11
Masahiro Yamada53f6ec62014-11-26 18:33:59 +0900[diff] [blame]9 */
10
11/dts-v1/;
12/include/ "uniphier-ph1-pro4.dtsi"
Masahiro Yamada68a730e2015-02-05 14:30:25 +0900[diff] [blame]13/include/ "uniphier-ref-daughter.dtsi"
Masahiro Yamada53f6ec62014-11-26 18:33:59 +0900[diff] [blame]14
15/ {
Masahiro Yamadad5f83a42015-03-11 15:54:46 +0900[diff] [blame]16 model = "UniPhier PH1-Pro4 Reference Board";
17 compatible = "socionext,ph1-pro4-ref", "socionext,ph1-pro4";
Masahiro Yamada53f6ec62014-11-26 18:33:59 +0900[diff] [blame]18
19 memory {
20 device_type = "memory";
21 reg = <0x80000000 0x40000000>;
22 };
23
24 chosen {
25 bootargs = "console=ttyPS0,115200 earlyprintk";
Masahiro Yamadaf8cd9b02014-11-26 18:34:00 +0900[diff] [blame]26 stdout-path = &uart0;
Masahiro Yamada53f6ec62014-11-26 18:33:59 +0900[diff] [blame]27 };
Masahiro Yamadaff7bf562014-12-06 00:03:23 +0900[diff] [blame]28
29 aliases {
Masahiro Yamada6225fad2014-12-18 19:11:00 +0900[diff] [blame]30 serial0 = &uart0;
31 serial1 = &uart1;
32 serial2 = &uart2;
33 serial3 = &uart3;
Masahiro Yamadaff7bf562014-12-06 00:03:23 +0900[diff] [blame]34 i2c0 = &i2c0;
35 i2c1 = &i2c1;
36 i2c2 = &i2c2;
37 i2c3 = &i2c3;
38 i2c5 = &i2c5;
39 i2c6 = &i2c6;
Masahiro Yamada73e8efc2015-02-27 02:26:59 +0900[diff] [blame]40 usb0 = &usb0;
Masahiro Yamadaff7bf562014-12-06 00:03:23 +0900[diff] [blame]41 };
Masahiro Yamada53f6ec62014-11-26 18:33:59 +0900[diff] [blame]42};
Masahiro Yamadaf8cd9b02014-11-26 18:34:00 +0900[diff] [blame]43
44&uart0 {
Masahiro Yamadaff7bf562014-12-06 00:03:23 +0900[diff] [blame]45 status = "okay";
Masahiro Yamadaf8cd9b02014-11-26 18:34:00 +0900[diff] [blame]46};
47
48&uart1 {
Masahiro Yamadaff7bf562014-12-06 00:03:23 +0900[diff] [blame]49 status = "okay";
50};
51
52&i2c0 {
53 status = "okay";
Masahiro Yamadaf8cd9b02014-11-26 18:34:00 +0900[diff] [blame]54};
Masahiro Yamada9a724622014-11-26 18:34:01 +0900[diff] [blame]55
56&usb0 {
Masahiro Yamadaff7bf562014-12-06 00:03:23 +0900[diff] [blame]57 status = "okay";
Masahiro Yamada9a724622014-11-26 18:34:01 +0900[diff] [blame]58};