wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 1 | /* |
| 2 | * rtl8169.c : U-Boot driver for the RealTek RTL8169 |
| 3 | * |
| 4 | * Masami Komiya (mkomiya@sonare.it) |
| 5 | * |
| 6 | * Most part is taken from r8169.c of etherboot |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | /************************************************************************** |
| 11 | * r8169.c: Etherboot device driver for the RealTek RTL-8169 Gigabit |
| 12 | * Written 2003 by Timothy Legge <tlegge@rogers.com> |
| 13 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 14 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 15 | * |
| 16 | * Portions of this code based on: |
| 17 | * r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver |
| 18 | * for Linux kernel 2.4.x. |
| 19 | * |
| 20 | * Written 2002 ShuChen <shuchen@realtek.com.tw> |
| 21 | * See Linux Driver for full information |
| 22 | * |
| 23 | * Linux Driver Version 1.27a, 10.02.2002 |
| 24 | * |
| 25 | * Thanks to: |
| 26 | * Jean Chen of RealTek Semiconductor Corp. for |
| 27 | * providing the evaluation NIC used to develop |
| 28 | * this driver. RealTek's support for Etherboot |
| 29 | * is appreciated. |
| 30 | * |
| 31 | * REVISION HISTORY: |
| 32 | * ================ |
| 33 | * |
| 34 | * v1.0 11-26-2003 timlegge Initial port of Linux driver |
| 35 | * v1.5 01-17-2004 timlegge Initial driver output cleanup |
| 36 | * |
| 37 | * Indent Options: indent -kr -i8 |
| 38 | ***************************************************************************/ |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 39 | /* |
| 40 | * 26 August 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk> |
| 41 | * Modified to use le32_to_cpu and cpu_to_le32 properly |
| 42 | */ |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 43 | #include <common.h> |
| 44 | #include <malloc.h> |
| 45 | #include <net.h> |
Ben Warren | 26425a6 | 2008-08-31 09:49:42 -0700 | [diff] [blame] | 46 | #include <netdev.h> |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 47 | #include <asm/io.h> |
| 48 | #include <pci.h> |
| 49 | |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 50 | #undef DEBUG_RTL8169 |
| 51 | #undef DEBUG_RTL8169_TX |
| 52 | #undef DEBUG_RTL8169_RX |
| 53 | |
| 54 | #define drv_version "v1.5" |
| 55 | #define drv_date "01-17-2004" |
| 56 | |
| 57 | static u32 ioaddr; |
| 58 | |
| 59 | /* Condensed operations for readability. */ |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 60 | #define currticks() get_timer(0) |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 61 | |
| 62 | /* media options */ |
| 63 | #define MAX_UNITS 8 |
| 64 | static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 }; |
| 65 | |
| 66 | /* MAC address length*/ |
| 67 | #define MAC_ADDR_LEN 6 |
| 68 | |
| 69 | /* max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4).*/ |
| 70 | #define MAX_ETH_FRAME_SIZE 1536 |
| 71 | |
| 72 | #define TX_FIFO_THRESH 256 /* In bytes */ |
| 73 | |
| 74 | #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */ |
| 75 | #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
| 76 | #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
| 77 | #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */ |
| 78 | #define RxPacketMaxSize 0x0800 /* Maximum size supported is 16K-1 */ |
| 79 | #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ |
| 80 | |
| 81 | #define NUM_TX_DESC 1 /* Number of Tx descriptor registers */ |
| 82 | #define NUM_RX_DESC 4 /* Number of Rx descriptor registers */ |
| 83 | #define RX_BUF_SIZE 1536 /* Rx Buffer size */ |
| 84 | #define RX_BUF_LEN 8192 |
| 85 | |
| 86 | #define RTL_MIN_IO_SIZE 0x80 |
| 87 | #define TX_TIMEOUT (6*HZ) |
| 88 | |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 89 | /* write/read MMIO register. Notice: {read,write}[wl] do the necessary swapping */ |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 90 | #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) |
| 91 | #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) |
| 92 | #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) |
| 93 | #define RTL_R8(reg) readb (ioaddr + (reg)) |
| 94 | #define RTL_R16(reg) readw (ioaddr + (reg)) |
| 95 | #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) |
| 96 | |
| 97 | #define ETH_FRAME_LEN MAX_ETH_FRAME_SIZE |
| 98 | #define ETH_ALEN MAC_ADDR_LEN |
| 99 | #define ETH_ZLEN 60 |
| 100 | |
Yoshihiro Shimoda | 2b90494 | 2009-02-25 14:27:29 +0900 | [diff] [blame] | 101 | #define bus_to_phys(a) pci_mem_to_phys((pci_dev_t)dev->priv, (pci_addr_t)a) |
| 102 | #define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, (phys_addr_t)a) |
| 103 | |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 104 | enum RTL8169_registers { |
| 105 | MAC0 = 0, /* Ethernet hardware address. */ |
| 106 | MAR0 = 8, /* Multicast filter. */ |
Yoshihiro Shimoda | 2877a11 | 2008-07-09 21:07:34 +0900 | [diff] [blame] | 107 | TxDescStartAddrLow = 0x20, |
| 108 | TxDescStartAddrHigh = 0x24, |
| 109 | TxHDescStartAddrLow = 0x28, |
| 110 | TxHDescStartAddrHigh = 0x2c, |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 111 | FLASH = 0x30, |
| 112 | ERSR = 0x36, |
| 113 | ChipCmd = 0x37, |
| 114 | TxPoll = 0x38, |
| 115 | IntrMask = 0x3C, |
| 116 | IntrStatus = 0x3E, |
| 117 | TxConfig = 0x40, |
| 118 | RxConfig = 0x44, |
| 119 | RxMissed = 0x4C, |
| 120 | Cfg9346 = 0x50, |
| 121 | Config0 = 0x51, |
| 122 | Config1 = 0x52, |
| 123 | Config2 = 0x53, |
| 124 | Config3 = 0x54, |
| 125 | Config4 = 0x55, |
| 126 | Config5 = 0x56, |
| 127 | MultiIntr = 0x5C, |
| 128 | PHYAR = 0x60, |
| 129 | TBICSR = 0x64, |
| 130 | TBI_ANAR = 0x68, |
| 131 | TBI_LPAR = 0x6A, |
| 132 | PHYstatus = 0x6C, |
| 133 | RxMaxSize = 0xDA, |
| 134 | CPlusCmd = 0xE0, |
Yoshihiro Shimoda | 2877a11 | 2008-07-09 21:07:34 +0900 | [diff] [blame] | 135 | RxDescStartAddrLow = 0xE4, |
| 136 | RxDescStartAddrHigh = 0xE8, |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 137 | EarlyTxThres = 0xEC, |
| 138 | FuncEvent = 0xF0, |
| 139 | FuncEventMask = 0xF4, |
| 140 | FuncPresetState = 0xF8, |
| 141 | FuncForceEvent = 0xFC, |
| 142 | }; |
| 143 | |
| 144 | enum RTL8169_register_content { |
| 145 | /*InterruptStatusBits */ |
| 146 | SYSErr = 0x8000, |
| 147 | PCSTimeout = 0x4000, |
| 148 | SWInt = 0x0100, |
| 149 | TxDescUnavail = 0x80, |
| 150 | RxFIFOOver = 0x40, |
| 151 | RxUnderrun = 0x20, |
| 152 | RxOverflow = 0x10, |
| 153 | TxErr = 0x08, |
| 154 | TxOK = 0x04, |
| 155 | RxErr = 0x02, |
| 156 | RxOK = 0x01, |
| 157 | |
| 158 | /*RxStatusDesc */ |
| 159 | RxRES = 0x00200000, |
| 160 | RxCRC = 0x00080000, |
| 161 | RxRUNT = 0x00100000, |
| 162 | RxRWT = 0x00400000, |
| 163 | |
| 164 | /*ChipCmdBits */ |
| 165 | CmdReset = 0x10, |
| 166 | CmdRxEnb = 0x08, |
| 167 | CmdTxEnb = 0x04, |
| 168 | RxBufEmpty = 0x01, |
| 169 | |
| 170 | /*Cfg9346Bits */ |
| 171 | Cfg9346_Lock = 0x00, |
| 172 | Cfg9346_Unlock = 0xC0, |
| 173 | |
| 174 | /*rx_mode_bits */ |
| 175 | AcceptErr = 0x20, |
| 176 | AcceptRunt = 0x10, |
| 177 | AcceptBroadcast = 0x08, |
| 178 | AcceptMulticast = 0x04, |
| 179 | AcceptMyPhys = 0x02, |
| 180 | AcceptAllPhys = 0x01, |
| 181 | |
| 182 | /*RxConfigBits */ |
| 183 | RxCfgFIFOShift = 13, |
| 184 | RxCfgDMAShift = 8, |
| 185 | |
| 186 | /*TxConfigBits */ |
| 187 | TxInterFrameGapShift = 24, |
| 188 | TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ |
| 189 | |
| 190 | /*rtl8169_PHYstatus */ |
| 191 | TBI_Enable = 0x80, |
| 192 | TxFlowCtrl = 0x40, |
| 193 | RxFlowCtrl = 0x20, |
| 194 | _1000bpsF = 0x10, |
| 195 | _100bps = 0x08, |
| 196 | _10bps = 0x04, |
| 197 | LinkStatus = 0x02, |
| 198 | FullDup = 0x01, |
| 199 | |
| 200 | /*GIGABIT_PHY_registers */ |
| 201 | PHY_CTRL_REG = 0, |
| 202 | PHY_STAT_REG = 1, |
| 203 | PHY_AUTO_NEGO_REG = 4, |
| 204 | PHY_1000_CTRL_REG = 9, |
| 205 | |
| 206 | /*GIGABIT_PHY_REG_BIT */ |
| 207 | PHY_Restart_Auto_Nego = 0x0200, |
| 208 | PHY_Enable_Auto_Nego = 0x1000, |
| 209 | |
| 210 | /* PHY_STAT_REG = 1; */ |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 211 | PHY_Auto_Nego_Comp = 0x0020, |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 212 | |
| 213 | /* PHY_AUTO_NEGO_REG = 4; */ |
| 214 | PHY_Cap_10_Half = 0x0020, |
| 215 | PHY_Cap_10_Full = 0x0040, |
| 216 | PHY_Cap_100_Half = 0x0080, |
| 217 | PHY_Cap_100_Full = 0x0100, |
| 218 | |
| 219 | /* PHY_1000_CTRL_REG = 9; */ |
| 220 | PHY_Cap_1000_Full = 0x0200, |
| 221 | |
| 222 | PHY_Cap_Null = 0x0, |
| 223 | |
| 224 | /*_MediaType*/ |
| 225 | _10_Half = 0x01, |
| 226 | _10_Full = 0x02, |
| 227 | _100_Half = 0x04, |
| 228 | _100_Full = 0x08, |
| 229 | _1000_Full = 0x10, |
| 230 | |
| 231 | /*_TBICSRBit*/ |
| 232 | TBILinkOK = 0x02000000, |
| 233 | }; |
| 234 | |
| 235 | static struct { |
| 236 | const char *name; |
| 237 | u8 version; /* depend on RTL8169 docs */ |
| 238 | u32 RxConfigMask; /* should clear the bits supported by this chip */ |
| 239 | } rtl_chip_info[] = { |
| 240 | {"RTL-8169", 0x00, 0xff7e1880,}, |
| 241 | {"RTL-8169", 0x04, 0xff7e1880,}, |
Nobuhiro Iwamatsu | 1338d1f | 2008-03-08 09:25:49 +0900 | [diff] [blame] | 242 | {"RTL-8169", 0x00, 0xff7e1880,}, |
| 243 | {"RTL-8169s/8110s", 0x02, 0xff7e1880,}, |
| 244 | {"RTL-8169s/8110s", 0x04, 0xff7e1880,}, |
| 245 | {"RTL-8169sb/8110sb", 0x10, 0xff7e1880,}, |
| 246 | {"RTL-8169sc/8110sc", 0x18, 0xff7e1880,}, |
| 247 | {"RTL-8168b/8111sb", 0x30, 0xff7e1880,}, |
| 248 | {"RTL-8168b/8111sb", 0x38, 0xff7e1880,}, |
| 249 | {"RTL-8101e", 0x34, 0xff7e1880,}, |
| 250 | {"RTL-8100e", 0x32, 0xff7e1880,}, |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 251 | }; |
| 252 | |
| 253 | enum _DescStatusBit { |
| 254 | OWNbit = 0x80000000, |
| 255 | EORbit = 0x40000000, |
| 256 | FSbit = 0x20000000, |
| 257 | LSbit = 0x10000000, |
| 258 | }; |
| 259 | |
| 260 | struct TxDesc { |
| 261 | u32 status; |
| 262 | u32 vlan_tag; |
| 263 | u32 buf_addr; |
| 264 | u32 buf_Haddr; |
| 265 | }; |
| 266 | |
| 267 | struct RxDesc { |
| 268 | u32 status; |
| 269 | u32 vlan_tag; |
| 270 | u32 buf_addr; |
| 271 | u32 buf_Haddr; |
| 272 | }; |
| 273 | |
| 274 | /* Define the TX Descriptor */ |
| 275 | static u8 tx_ring[NUM_TX_DESC * sizeof(struct TxDesc) + 256]; |
| 276 | /* __attribute__ ((aligned(256))); */ |
| 277 | |
| 278 | /* Create a static buffer of size RX_BUF_SZ for each |
| 279 | TX Descriptor. All descriptors point to a |
| 280 | part of this buffer */ |
| 281 | static unsigned char txb[NUM_TX_DESC * RX_BUF_SIZE]; |
| 282 | |
| 283 | /* Define the RX Descriptor */ |
| 284 | static u8 rx_ring[NUM_RX_DESC * sizeof(struct TxDesc) + 256]; |
| 285 | /* __attribute__ ((aligned(256))); */ |
| 286 | |
| 287 | /* Create a static buffer of size RX_BUF_SZ for each |
| 288 | RX Descriptor All descriptors point to a |
| 289 | part of this buffer */ |
| 290 | static unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE]; |
| 291 | |
| 292 | struct rtl8169_private { |
| 293 | void *mmio_addr; /* memory map physical address */ |
| 294 | int chipset; |
| 295 | unsigned long cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */ |
| 296 | unsigned long cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ |
| 297 | unsigned long dirty_tx; |
| 298 | unsigned char *TxDescArrays; /* Index of Tx Descriptor buffer */ |
| 299 | unsigned char *RxDescArrays; /* Index of Rx Descriptor buffer */ |
| 300 | struct TxDesc *TxDescArray; /* Index of 256-alignment Tx Descriptor buffer */ |
| 301 | struct RxDesc *RxDescArray; /* Index of 256-alignment Rx Descriptor buffer */ |
| 302 | unsigned char *RxBufferRings; /* Index of Rx Buffer */ |
| 303 | unsigned char *RxBufferRing[NUM_RX_DESC]; /* Index of Rx Buffer array */ |
| 304 | unsigned char *Tx_skbuff[NUM_TX_DESC]; |
| 305 | } tpx; |
| 306 | |
| 307 | static struct rtl8169_private *tpc; |
| 308 | |
| 309 | static const u16 rtl8169_intr_mask = |
| 310 | SYSErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | TxErr | |
| 311 | TxOK | RxErr | RxOK; |
| 312 | static const unsigned int rtl8169_rx_config = |
| 313 | (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift); |
| 314 | |
| 315 | static struct pci_device_id supported[] = { |
Nobuhiro Iwamatsu | 1338d1f | 2008-03-08 09:25:49 +0900 | [diff] [blame] | 316 | {PCI_VENDOR_ID_REALTEK, 0x8167}, |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 317 | {PCI_VENDOR_ID_REALTEK, 0x8169}, |
| 318 | {} |
| 319 | }; |
| 320 | |
| 321 | void mdio_write(int RegAddr, int value) |
| 322 | { |
| 323 | int i; |
| 324 | |
| 325 | RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value); |
| 326 | udelay(1000); |
| 327 | |
| 328 | for (i = 2000; i > 0; i--) { |
| 329 | /* Check if the RTL8169 has completed writing to the specified MII register */ |
| 330 | if (!(RTL_R32(PHYAR) & 0x80000000)) { |
| 331 | break; |
| 332 | } else { |
| 333 | udelay(100); |
| 334 | } |
| 335 | } |
| 336 | } |
| 337 | |
| 338 | int mdio_read(int RegAddr) |
| 339 | { |
| 340 | int i, value = -1; |
| 341 | |
| 342 | RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16); |
| 343 | udelay(1000); |
| 344 | |
| 345 | for (i = 2000; i > 0; i--) { |
| 346 | /* Check if the RTL8169 has completed retrieving data from the specified MII register */ |
| 347 | if (RTL_R32(PHYAR) & 0x80000000) { |
| 348 | value = (int) (RTL_R32(PHYAR) & 0xFFFF); |
| 349 | break; |
| 350 | } else { |
| 351 | udelay(100); |
| 352 | } |
| 353 | } |
| 354 | return value; |
| 355 | } |
| 356 | |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 357 | static int rtl8169_init_board(struct eth_device *dev) |
| 358 | { |
| 359 | int i; |
| 360 | u32 tmp; |
| 361 | |
| 362 | #ifdef DEBUG_RTL8169 |
| 363 | printf ("%s\n", __FUNCTION__); |
| 364 | #endif |
| 365 | ioaddr = dev->iobase; |
| 366 | |
| 367 | /* Soft reset the chip. */ |
| 368 | RTL_W8(ChipCmd, CmdReset); |
| 369 | |
| 370 | /* Check that the chip has finished the reset. */ |
| 371 | for (i = 1000; i > 0; i--) |
| 372 | if ((RTL_R8(ChipCmd) & CmdReset) == 0) |
| 373 | break; |
| 374 | else |
| 375 | udelay(10); |
| 376 | |
| 377 | /* identify chip attached to board */ |
| 378 | tmp = RTL_R32(TxConfig); |
| 379 | tmp = ((tmp & 0x7c000000) + ((tmp & 0x00800000) << 2)) >> 24; |
| 380 | |
| 381 | for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--){ |
| 382 | if (tmp == rtl_chip_info[i].version) { |
| 383 | tpc->chipset = i; |
| 384 | goto match; |
| 385 | } |
| 386 | } |
| 387 | |
| 388 | /* if unknown chip, assume array element #0, original RTL-8169 in this case */ |
| 389 | printf("PCI device %s: unknown chip version, assuming RTL-8169\n", dev->name); |
Wolfgang Denk | 8d54188 | 2008-07-10 13:16:09 +0200 | [diff] [blame] | 390 | printf("PCI device: TxConfig = 0x%lX\n", (unsigned long) RTL_R32(TxConfig)); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 391 | tpc->chipset = 0; |
| 392 | |
| 393 | match: |
| 394 | return 0; |
| 395 | } |
| 396 | |
| 397 | /************************************************************************** |
| 398 | RECV - Receive a frame |
| 399 | ***************************************************************************/ |
| 400 | static int rtl_recv(struct eth_device *dev) |
| 401 | { |
| 402 | /* return true if there's an ethernet packet ready to read */ |
| 403 | /* nic->packet should contain data on return */ |
| 404 | /* nic->packetlen should contain length of data */ |
| 405 | int cur_rx; |
| 406 | int length = 0; |
| 407 | |
| 408 | #ifdef DEBUG_RTL8169_RX |
| 409 | printf ("%s\n", __FUNCTION__); |
| 410 | #endif |
| 411 | ioaddr = dev->iobase; |
| 412 | |
| 413 | cur_rx = tpc->cur_rx; |
Yoshihiro Shimoda | 4a46566 | 2009-02-25 14:27:24 +0900 | [diff] [blame] | 414 | flush_cache((unsigned long)&tpc->RxDescArray[cur_rx], |
| 415 | sizeof(struct RxDesc)); |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 416 | if ((le32_to_cpu(tpc->RxDescArray[cur_rx].status) & OWNbit) == 0) { |
| 417 | if (!(le32_to_cpu(tpc->RxDescArray[cur_rx].status) & RxRES)) { |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 418 | unsigned char rxdata[RX_BUF_LEN]; |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 419 | length = (int) (le32_to_cpu(tpc->RxDescArray[cur_rx]. |
| 420 | status) & 0x00001FFF) - 4; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 421 | |
| 422 | memcpy(rxdata, tpc->RxBufferRing[cur_rx], length); |
| 423 | NetReceive(rxdata, length); |
| 424 | |
| 425 | if (cur_rx == NUM_RX_DESC - 1) |
| 426 | tpc->RxDescArray[cur_rx].status = |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 427 | cpu_to_le32((OWNbit | EORbit) + RX_BUF_SIZE); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 428 | else |
| 429 | tpc->RxDescArray[cur_rx].status = |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 430 | cpu_to_le32(OWNbit + RX_BUF_SIZE); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 431 | tpc->RxDescArray[cur_rx].buf_addr = |
Yoshihiro Shimoda | 2b90494 | 2009-02-25 14:27:29 +0900 | [diff] [blame] | 432 | cpu_to_le32(bus_to_phys(tpc->RxBufferRing[cur_rx])); |
Yoshihiro Shimoda | 4a46566 | 2009-02-25 14:27:24 +0900 | [diff] [blame] | 433 | flush_cache((unsigned long)tpc->RxBufferRing[cur_rx], |
| 434 | RX_BUF_SIZE); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 435 | } else { |
| 436 | puts("Error Rx"); |
| 437 | } |
| 438 | cur_rx = (cur_rx + 1) % NUM_RX_DESC; |
| 439 | tpc->cur_rx = cur_rx; |
| 440 | return 1; |
| 441 | |
Nobuhiro Iwamatsu | 1338d1f | 2008-03-08 09:25:49 +0900 | [diff] [blame] | 442 | } else { |
| 443 | ushort sts = RTL_R8(IntrStatus); |
| 444 | RTL_W8(IntrStatus, sts & ~(TxErr | RxErr | SYSErr)); |
| 445 | udelay(100); /* wait */ |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 446 | } |
| 447 | tpc->cur_rx = cur_rx; |
| 448 | return (0); /* initially as this is called to flush the input */ |
| 449 | } |
| 450 | |
| 451 | #define HZ 1000 |
| 452 | /************************************************************************** |
| 453 | SEND - Transmit a frame |
| 454 | ***************************************************************************/ |
Joe Hershberger | d8836d1 | 2012-05-22 18:09:57 +0000 | [diff] [blame] | 455 | static int rtl_send(struct eth_device *dev, void *packet, int length) |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 456 | { |
| 457 | /* send the packet to destination */ |
| 458 | |
| 459 | u32 to; |
| 460 | u8 *ptxb; |
| 461 | int entry = tpc->cur_tx % NUM_TX_DESC; |
| 462 | u32 len = length; |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 463 | int ret; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 464 | |
| 465 | #ifdef DEBUG_RTL8169_TX |
| 466 | int stime = currticks(); |
| 467 | printf ("%s\n", __FUNCTION__); |
| 468 | printf("sending %d bytes\n", len); |
| 469 | #endif |
| 470 | |
| 471 | ioaddr = dev->iobase; |
| 472 | |
| 473 | /* point to the current txb incase multiple tx_rings are used */ |
| 474 | ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE]; |
| 475 | memcpy(ptxb, (char *)packet, (int)length); |
Yoshihiro Shimoda | 4a46566 | 2009-02-25 14:27:24 +0900 | [diff] [blame] | 476 | flush_cache((unsigned long)ptxb, length); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 477 | |
| 478 | while (len < ETH_ZLEN) |
| 479 | ptxb[len++] = '\0'; |
| 480 | |
Yoshihiro Shimoda | 2877a11 | 2008-07-09 21:07:34 +0900 | [diff] [blame] | 481 | tpc->TxDescArray[entry].buf_Haddr = 0; |
Yoshihiro Shimoda | 2b90494 | 2009-02-25 14:27:29 +0900 | [diff] [blame] | 482 | tpc->TxDescArray[entry].buf_addr = cpu_to_le32(bus_to_phys(ptxb)); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 483 | if (entry != (NUM_TX_DESC - 1)) { |
| 484 | tpc->TxDescArray[entry].status = |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 485 | cpu_to_le32((OWNbit | FSbit | LSbit) | |
| 486 | ((len > ETH_ZLEN) ? len : ETH_ZLEN)); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 487 | } else { |
| 488 | tpc->TxDescArray[entry].status = |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 489 | cpu_to_le32((OWNbit | EORbit | FSbit | LSbit) | |
| 490 | ((len > ETH_ZLEN) ? len : ETH_ZLEN)); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 491 | } |
| 492 | RTL_W8(TxPoll, 0x40); /* set polling bit */ |
| 493 | |
| 494 | tpc->cur_tx++; |
| 495 | to = currticks() + TX_TIMEOUT; |
Yoshihiro Shimoda | 4a46566 | 2009-02-25 14:27:24 +0900 | [diff] [blame] | 496 | do { |
| 497 | flush_cache((unsigned long)&tpc->TxDescArray[entry], |
| 498 | sizeof(struct TxDesc)); |
| 499 | } while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit) |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 500 | && (currticks() < to)); /* wait */ |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 501 | |
| 502 | if (currticks() >= to) { |
| 503 | #ifdef DEBUG_RTL8169_TX |
| 504 | puts ("tx timeout/error\n"); |
| 505 | printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime); |
| 506 | #endif |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 507 | ret = 0; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 508 | } else { |
| 509 | #ifdef DEBUG_RTL8169_TX |
| 510 | puts("tx done\n"); |
| 511 | #endif |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 512 | ret = length; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 513 | } |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 514 | /* Delay to make net console (nc) work properly */ |
| 515 | udelay(20); |
| 516 | return ret; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 517 | } |
| 518 | |
| 519 | static void rtl8169_set_rx_mode(struct eth_device *dev) |
| 520 | { |
| 521 | u32 mc_filter[2]; /* Multicast hash filter */ |
| 522 | int rx_mode; |
| 523 | u32 tmp = 0; |
| 524 | |
| 525 | #ifdef DEBUG_RTL8169 |
| 526 | printf ("%s\n", __FUNCTION__); |
| 527 | #endif |
| 528 | |
| 529 | /* IFF_ALLMULTI */ |
| 530 | /* Too many to filter perfectly -- accept all multicasts. */ |
| 531 | rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; |
| 532 | mc_filter[1] = mc_filter[0] = 0xffffffff; |
| 533 | |
| 534 | tmp = rtl8169_rx_config | rx_mode | (RTL_R32(RxConfig) & |
| 535 | rtl_chip_info[tpc->chipset].RxConfigMask); |
| 536 | |
| 537 | RTL_W32(RxConfig, tmp); |
| 538 | RTL_W32(MAR0 + 0, mc_filter[0]); |
| 539 | RTL_W32(MAR0 + 4, mc_filter[1]); |
| 540 | } |
| 541 | |
| 542 | static void rtl8169_hw_start(struct eth_device *dev) |
| 543 | { |
| 544 | u32 i; |
| 545 | |
| 546 | #ifdef DEBUG_RTL8169 |
| 547 | int stime = currticks(); |
| 548 | printf ("%s\n", __FUNCTION__); |
| 549 | #endif |
| 550 | |
| 551 | #if 0 |
| 552 | /* Soft reset the chip. */ |
| 553 | RTL_W8(ChipCmd, CmdReset); |
| 554 | |
| 555 | /* Check that the chip has finished the reset. */ |
| 556 | for (i = 1000; i > 0; i--) { |
| 557 | if ((RTL_R8(ChipCmd) & CmdReset) == 0) |
| 558 | break; |
| 559 | else |
| 560 | udelay(10); |
| 561 | } |
| 562 | #endif |
| 563 | |
| 564 | RTL_W8(Cfg9346, Cfg9346_Unlock); |
Yoshihiro Shimoda | 2877a11 | 2008-07-09 21:07:34 +0900 | [diff] [blame] | 565 | |
| 566 | /* RTL-8169sb/8110sb or previous version */ |
| 567 | if (tpc->chipset <= 5) |
| 568 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); |
| 569 | |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 570 | RTL_W8(EarlyTxThres, EarlyTxThld); |
| 571 | |
| 572 | /* For gigabit rtl8169 */ |
| 573 | RTL_W16(RxMaxSize, RxPacketMaxSize); |
| 574 | |
| 575 | /* Set Rx Config register */ |
| 576 | i = rtl8169_rx_config | (RTL_R32(RxConfig) & |
| 577 | rtl_chip_info[tpc->chipset].RxConfigMask); |
| 578 | RTL_W32(RxConfig, i); |
| 579 | |
| 580 | /* Set DMA burst size and Interframe Gap Time */ |
| 581 | RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) | |
| 582 | (InterFrameGap << TxInterFrameGapShift)); |
| 583 | |
| 584 | |
| 585 | tpc->cur_rx = 0; |
| 586 | |
Yoshihiro Shimoda | 2b90494 | 2009-02-25 14:27:29 +0900 | [diff] [blame] | 587 | RTL_W32(TxDescStartAddrLow, bus_to_phys(tpc->TxDescArray)); |
Yoshihiro Shimoda | 2877a11 | 2008-07-09 21:07:34 +0900 | [diff] [blame] | 588 | RTL_W32(TxDescStartAddrHigh, (unsigned long)0); |
Yoshihiro Shimoda | 2b90494 | 2009-02-25 14:27:29 +0900 | [diff] [blame] | 589 | RTL_W32(RxDescStartAddrLow, bus_to_phys(tpc->RxDescArray)); |
Yoshihiro Shimoda | 2877a11 | 2008-07-09 21:07:34 +0900 | [diff] [blame] | 590 | RTL_W32(RxDescStartAddrHigh, (unsigned long)0); |
| 591 | |
| 592 | /* RTL-8169sc/8110sc or later version */ |
| 593 | if (tpc->chipset > 5) |
| 594 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); |
| 595 | |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 596 | RTL_W8(Cfg9346, Cfg9346_Lock); |
| 597 | udelay(10); |
| 598 | |
| 599 | RTL_W32(RxMissed, 0); |
| 600 | |
| 601 | rtl8169_set_rx_mode(dev); |
| 602 | |
| 603 | /* no early-rx interrupts */ |
| 604 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000); |
| 605 | |
| 606 | #ifdef DEBUG_RTL8169 |
| 607 | printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime); |
| 608 | #endif |
| 609 | } |
| 610 | |
| 611 | static void rtl8169_init_ring(struct eth_device *dev) |
| 612 | { |
| 613 | int i; |
| 614 | |
| 615 | #ifdef DEBUG_RTL8169 |
| 616 | int stime = currticks(); |
| 617 | printf ("%s\n", __FUNCTION__); |
| 618 | #endif |
| 619 | |
| 620 | tpc->cur_rx = 0; |
| 621 | tpc->cur_tx = 0; |
| 622 | tpc->dirty_tx = 0; |
| 623 | memset(tpc->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); |
| 624 | memset(tpc->RxDescArray, 0x0, NUM_RX_DESC * sizeof(struct RxDesc)); |
| 625 | |
| 626 | for (i = 0; i < NUM_TX_DESC; i++) { |
| 627 | tpc->Tx_skbuff[i] = &txb[i]; |
| 628 | } |
| 629 | |
| 630 | for (i = 0; i < NUM_RX_DESC; i++) { |
| 631 | if (i == (NUM_RX_DESC - 1)) |
| 632 | tpc->RxDescArray[i].status = |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 633 | cpu_to_le32((OWNbit | EORbit) + RX_BUF_SIZE); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 634 | else |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 635 | tpc->RxDescArray[i].status = |
| 636 | cpu_to_le32(OWNbit + RX_BUF_SIZE); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 637 | |
| 638 | tpc->RxBufferRing[i] = &rxb[i * RX_BUF_SIZE]; |
| 639 | tpc->RxDescArray[i].buf_addr = |
Yoshihiro Shimoda | 2b90494 | 2009-02-25 14:27:29 +0900 | [diff] [blame] | 640 | cpu_to_le32(bus_to_phys(tpc->RxBufferRing[i])); |
Yoshihiro Shimoda | 4a46566 | 2009-02-25 14:27:24 +0900 | [diff] [blame] | 641 | flush_cache((unsigned long)tpc->RxBufferRing[i], RX_BUF_SIZE); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 642 | } |
| 643 | |
| 644 | #ifdef DEBUG_RTL8169 |
| 645 | printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime); |
| 646 | #endif |
| 647 | } |
| 648 | |
| 649 | /************************************************************************** |
| 650 | RESET - Finish setting up the ethernet interface |
| 651 | ***************************************************************************/ |
Ben Warren | de9fcb5 | 2008-01-09 18:15:53 -0500 | [diff] [blame] | 652 | static int rtl_reset(struct eth_device *dev, bd_t *bis) |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 653 | { |
| 654 | int i; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 655 | |
| 656 | #ifdef DEBUG_RTL8169 |
| 657 | int stime = currticks(); |
| 658 | printf ("%s\n", __FUNCTION__); |
| 659 | #endif |
| 660 | |
| 661 | tpc->TxDescArrays = tx_ring; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 662 | /* Tx Desscriptor needs 256 bytes alignment; */ |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 663 | tpc->TxDescArray = (struct TxDesc *) ((unsigned long)(tpc->TxDescArrays + |
| 664 | 255) & ~255); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 665 | |
| 666 | tpc->RxDescArrays = rx_ring; |
| 667 | /* Rx Desscriptor needs 256 bytes alignment; */ |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 668 | tpc->RxDescArray = (struct RxDesc *) ((unsigned long)(tpc->RxDescArrays + |
| 669 | 255) & ~255); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 670 | |
| 671 | rtl8169_init_ring(dev); |
| 672 | rtl8169_hw_start(dev); |
| 673 | /* Construct a perfect filter frame with the mac address as first match |
| 674 | * and broadcast for all others */ |
| 675 | for (i = 0; i < 192; i++) |
| 676 | txb[i] = 0xFF; |
| 677 | |
| 678 | txb[0] = dev->enetaddr[0]; |
| 679 | txb[1] = dev->enetaddr[1]; |
| 680 | txb[2] = dev->enetaddr[2]; |
| 681 | txb[3] = dev->enetaddr[3]; |
| 682 | txb[4] = dev->enetaddr[4]; |
| 683 | txb[5] = dev->enetaddr[5]; |
| 684 | |
| 685 | #ifdef DEBUG_RTL8169 |
| 686 | printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime); |
| 687 | #endif |
Ben Warren | de9fcb5 | 2008-01-09 18:15:53 -0500 | [diff] [blame] | 688 | return 0; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 689 | } |
| 690 | |
| 691 | /************************************************************************** |
| 692 | HALT - Turn off ethernet interface |
| 693 | ***************************************************************************/ |
| 694 | static void rtl_halt(struct eth_device *dev) |
| 695 | { |
| 696 | int i; |
| 697 | |
| 698 | #ifdef DEBUG_RTL8169 |
| 699 | printf ("%s\n", __FUNCTION__); |
| 700 | #endif |
| 701 | |
| 702 | ioaddr = dev->iobase; |
| 703 | |
| 704 | /* Stop the chip's Tx and Rx DMA processes. */ |
| 705 | RTL_W8(ChipCmd, 0x00); |
| 706 | |
| 707 | /* Disable interrupts by clearing the interrupt mask. */ |
| 708 | RTL_W16(IntrMask, 0x0000); |
| 709 | |
| 710 | RTL_W32(RxMissed, 0); |
| 711 | |
| 712 | tpc->TxDescArrays = NULL; |
| 713 | tpc->RxDescArrays = NULL; |
| 714 | tpc->TxDescArray = NULL; |
| 715 | tpc->RxDescArray = NULL; |
| 716 | for (i = 0; i < NUM_RX_DESC; i++) { |
| 717 | tpc->RxBufferRing[i] = NULL; |
| 718 | } |
| 719 | } |
| 720 | |
| 721 | /************************************************************************** |
| 722 | INIT - Look for an adapter, this routine's visible to the outside |
| 723 | ***************************************************************************/ |
| 724 | |
| 725 | #define board_found 1 |
| 726 | #define valid_link 0 |
| 727 | static int rtl_init(struct eth_device *dev, bd_t *bis) |
| 728 | { |
| 729 | static int board_idx = -1; |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 730 | int i, rc; |
| 731 | int option = -1, Cap10_100 = 0, Cap1000 = 0; |
| 732 | |
| 733 | #ifdef DEBUG_RTL8169 |
| 734 | printf ("%s\n", __FUNCTION__); |
| 735 | #endif |
| 736 | |
| 737 | ioaddr = dev->iobase; |
| 738 | |
| 739 | board_idx++; |
| 740 | |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 741 | /* point to private storage */ |
| 742 | tpc = &tpx; |
| 743 | |
| 744 | rc = rtl8169_init_board(dev); |
| 745 | if (rc) |
| 746 | return rc; |
| 747 | |
| 748 | /* Get MAC address. FIXME: read EEPROM */ |
| 749 | for (i = 0; i < MAC_ADDR_LEN; i++) |
Mike Frysinger | b203965 | 2009-02-11 19:01:26 -0500 | [diff] [blame] | 750 | dev->enetaddr[i] = RTL_R8(MAC0 + i); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 751 | |
| 752 | #ifdef DEBUG_RTL8169 |
Yoshihiro Shimoda | 2877a11 | 2008-07-09 21:07:34 +0900 | [diff] [blame] | 753 | printf("chipset = %d\n", tpc->chipset); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 754 | printf("MAC Address"); |
| 755 | for (i = 0; i < MAC_ADDR_LEN; i++) |
| 756 | printf(":%02x", dev->enetaddr[i]); |
| 757 | putc('\n'); |
| 758 | #endif |
| 759 | |
| 760 | #ifdef DEBUG_RTL8169 |
| 761 | /* Print out some hardware info */ |
| 762 | printf("%s: at ioaddr 0x%x\n", dev->name, ioaddr); |
| 763 | #endif |
| 764 | |
| 765 | /* if TBI is not endbled */ |
| 766 | if (!(RTL_R8(PHYstatus) & TBI_Enable)) { |
| 767 | int val = mdio_read(PHY_AUTO_NEGO_REG); |
| 768 | |
| 769 | option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; |
| 770 | /* Force RTL8169 in 10/100/1000 Full/Half mode. */ |
| 771 | if (option > 0) { |
| 772 | #ifdef DEBUG_RTL8169 |
| 773 | printf("%s: Force-mode Enabled.\n", dev->name); |
| 774 | #endif |
| 775 | Cap10_100 = 0, Cap1000 = 0; |
| 776 | switch (option) { |
| 777 | case _10_Half: |
| 778 | Cap10_100 = PHY_Cap_10_Half; |
| 779 | Cap1000 = PHY_Cap_Null; |
| 780 | break; |
| 781 | case _10_Full: |
| 782 | Cap10_100 = PHY_Cap_10_Full; |
| 783 | Cap1000 = PHY_Cap_Null; |
| 784 | break; |
| 785 | case _100_Half: |
| 786 | Cap10_100 = PHY_Cap_100_Half; |
| 787 | Cap1000 = PHY_Cap_Null; |
| 788 | break; |
| 789 | case _100_Full: |
| 790 | Cap10_100 = PHY_Cap_100_Full; |
| 791 | Cap1000 = PHY_Cap_Null; |
| 792 | break; |
| 793 | case _1000_Full: |
| 794 | Cap10_100 = PHY_Cap_Null; |
| 795 | Cap1000 = PHY_Cap_1000_Full; |
| 796 | break; |
| 797 | default: |
| 798 | break; |
| 799 | } |
| 800 | mdio_write(PHY_AUTO_NEGO_REG, Cap10_100 | (val & 0x1F)); /* leave PHY_AUTO_NEGO_REG bit4:0 unchanged */ |
| 801 | mdio_write(PHY_1000_CTRL_REG, Cap1000); |
| 802 | } else { |
| 803 | #ifdef DEBUG_RTL8169 |
| 804 | printf("%s: Auto-negotiation Enabled.\n", |
| 805 | dev->name); |
| 806 | #endif |
| 807 | /* enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged */ |
| 808 | mdio_write(PHY_AUTO_NEGO_REG, |
| 809 | PHY_Cap_10_Half | PHY_Cap_10_Full | |
| 810 | PHY_Cap_100_Half | PHY_Cap_100_Full | |
| 811 | (val & 0x1F)); |
| 812 | |
| 813 | /* enable 1000 Full Mode */ |
| 814 | mdio_write(PHY_1000_CTRL_REG, PHY_Cap_1000_Full); |
| 815 | |
| 816 | } |
| 817 | |
| 818 | /* Enable auto-negotiation and restart auto-nigotiation */ |
| 819 | mdio_write(PHY_CTRL_REG, |
| 820 | PHY_Enable_Auto_Nego | PHY_Restart_Auto_Nego); |
| 821 | udelay(100); |
| 822 | |
| 823 | /* wait for auto-negotiation process */ |
| 824 | for (i = 10000; i > 0; i--) { |
| 825 | /* check if auto-negotiation complete */ |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 826 | if (mdio_read(PHY_STAT_REG) & PHY_Auto_Nego_Comp) { |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 827 | udelay(100); |
| 828 | option = RTL_R8(PHYstatus); |
| 829 | if (option & _1000bpsF) { |
| 830 | #ifdef DEBUG_RTL8169 |
| 831 | printf("%s: 1000Mbps Full-duplex operation.\n", |
| 832 | dev->name); |
| 833 | #endif |
| 834 | } else { |
| 835 | #ifdef DEBUG_RTL8169 |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 836 | printf("%s: %sMbps %s-duplex operation.\n", |
| 837 | dev->name, |
| 838 | (option & _100bps) ? "100" : |
| 839 | "10", |
| 840 | (option & FullDup) ? "Full" : |
| 841 | "Half"); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 842 | #endif |
| 843 | } |
| 844 | break; |
| 845 | } else { |
| 846 | udelay(100); |
| 847 | } |
| 848 | } /* end for-loop to wait for auto-negotiation process */ |
| 849 | |
| 850 | } else { |
| 851 | udelay(100); |
| 852 | #ifdef DEBUG_RTL8169 |
| 853 | printf |
| 854 | ("%s: 1000Mbps Full-duplex operation, TBI Link %s!\n", |
| 855 | dev->name, |
| 856 | (RTL_R32(TBICSR) & TBILinkOK) ? "OK" : "Failed"); |
| 857 | #endif |
| 858 | } |
| 859 | |
| 860 | return 1; |
| 861 | } |
| 862 | |
| 863 | int rtl8169_initialize(bd_t *bis) |
| 864 | { |
| 865 | pci_dev_t devno; |
| 866 | int card_number = 0; |
| 867 | struct eth_device *dev; |
| 868 | u32 iobase; |
| 869 | int idx=0; |
| 870 | |
| 871 | while(1){ |
| 872 | /* Find RTL8169 */ |
| 873 | if ((devno = pci_find_devices(supported, idx++)) < 0) |
| 874 | break; |
| 875 | |
| 876 | pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); |
| 877 | iobase &= ~0xf; |
| 878 | |
| 879 | debug ("rtl8169: REALTEK RTL8169 @0x%x\n", iobase); |
| 880 | |
| 881 | dev = (struct eth_device *)malloc(sizeof *dev); |
Nobuhiro Iwamatsu | c834e44 | 2010-10-19 14:03:38 +0900 | [diff] [blame] | 882 | if (!dev) { |
| 883 | printf("Can not allocate memory of rtl8169\n"); |
| 884 | break; |
| 885 | } |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 886 | |
Nobuhiro Iwamatsu | c834e44 | 2010-10-19 14:03:38 +0900 | [diff] [blame] | 887 | memset(dev, 0, sizeof(*dev)); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 888 | sprintf (dev->name, "RTL8169#%d", card_number); |
| 889 | |
| 890 | dev->priv = (void *) devno; |
Guennadi Liakhovetski | de20a4f | 2007-11-20 13:14:20 +0100 | [diff] [blame] | 891 | dev->iobase = (int)pci_mem_to_phys(devno, iobase); |
wdenk | a627048 | 2004-04-18 22:03:42 +0000 | [diff] [blame] | 892 | |
| 893 | dev->init = rtl_reset; |
| 894 | dev->halt = rtl_halt; |
| 895 | dev->send = rtl_send; |
| 896 | dev->recv = rtl_recv; |
| 897 | |
| 898 | eth_register (dev); |
| 899 | |
| 900 | rtl_init(dev, bis); |
| 901 | |
| 902 | card_number++; |
| 903 | } |
| 904 | return card_number; |
| 905 | } |