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Stelian Pop78379932008-03-26 18:52:33 +01001/*
Stelian Popd57846e2008-05-08 22:52:10 +02002 * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260_matrix.h]
3 *
4 * Copyright (C) 2007 Atmel Corporation.
Stelian Pop78379932008-03-26 18:52:33 +01005 *
6 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
7 * Based on AT91SAM9260 datasheet revision B.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#ifndef AT91SAM9260_MATRIX_H
16#define AT91SAM9260_MATRIX_H
17
Reinhard Meyer7d6287c2010-11-07 12:38:43 +010018#ifndef __ASSEMBLY__
Stelian Pop78379932008-03-26 18:52:33 +010019
Reinhard Meyer7d6287c2010-11-07 12:38:43 +010020/*
21 * This struct defines access to the matrix' maximum of
22 * 16 masters and 16 slaves.
23 * However, on the AT91SAM9260/9G20/9XE there exist only
24 * 6 Masters and 5 Slaves!
25 */
26struct at91_matrix {
27 u32 mcfg[16]; /* Master Configuration Registers */
28 u32 scfg[16]; /* Slave Configuration Registers */
29 u32 pras[16][2]; /* Priority Assignment Slave Registers */
30 u32 mrcr; /* Master Remap Control Register */
31 u32 filler[0x06];
32 u32 ebicsa; /* EBI Chip Select Assignment Register */
33};
Stelian Pop78379932008-03-26 18:52:33 +010034
Reinhard Meyer7d6287c2010-11-07 12:38:43 +010035#endif /* __ASSEMBLY__ */
Stelian Pop78379932008-03-26 18:52:33 +010036
Reinhard Meyer7d6287c2010-11-07 12:38:43 +010037#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
38#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
39#define AT91_MATRIX_ULBT_FOUR (2 << 0)
40#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
41#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
42
43#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
44#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
45#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
46#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18
47#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
48#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
49
50#define AT91_MATRIX_M0PR_SHIFT 0
51#define AT91_MATRIX_M1PR_SHIFT 4
52#define AT91_MATRIX_M2PR_SHIFT 8
53#define AT91_MATRIX_M3PR_SHIFT 12
54#define AT91_MATRIX_M4PR_SHIFT 16
55#define AT91_MATRIX_M5PR_SHIFT 20
56
57#define AT91_MATRIX_RCB0 (1 << 0)
58#define AT91_MATRIX_RCB1 (1 << 1)
Stelian Pop78379932008-03-26 18:52:33 +010059
Reinhard Meyer7d6287c2010-11-07 12:38:43 +010060#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
61#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
62#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
63#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
64#define AT91_MATRIX_DBPUC (1 << 8)
65#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
66#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
Stelian Pop78379932008-03-26 18:52:33 +010067
68#endif