blob: dd3b8eaf578141fce961b27e3212f3b26ca8a33a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Pali Rohár248ef0a2012-10-29 07:54:01 +00002/*
3 * (C) Copyright 2011-2012
Pali Rohár10a953d2020-04-01 00:35:08 +02004 * Pali Rohár <pali@kernel.org>
Pali Rohár248ef0a2012-10-29 07:54:01 +00005 *
6 * (C) Copyright 2010
7 * Alistair Buxton <a.j.buxton@gmail.com>
8 *
9 * Derived from Beagle Board code:
10 * (C) Copyright 2006-2008
11 * Texas Instruments.
12 * Richard Woodruff <r-woodruff2@ti.com>
13 * Syed Mohammed Khasim <x0khasim@ti.com>
14 *
15 * Configuration settings for the Nokia RX-51 aka N900.
Pali Rohár248ef0a2012-10-29 07:54:01 +000016 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21/*
22 * High Level Configuration Options
23 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000024#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
25
26#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
27
Pali Rohár248ef0a2012-10-29 07:54:01 +000028#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050029#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000030#include <asm/arch/mem.h>
31#include <linux/stringify.h>
32
Pali Rohár248ef0a2012-10-29 07:54:01 +000033/* Clock Defines */
34#define V_OSCK 26000000 /* Clock output from T2 */
35#define V_SCLK (V_OSCK >> 1)
36
Pali Rohár248ef0a2012-10-29 07:54:01 +000037#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
38
39#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
40#define CONFIG_INITRD_TAG /* enable passing initrd */
41#define CONFIG_REVISION_TAG /* enable passing revision tag*/
42#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
43
44/*
45 * Size of malloc() pool
46 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000047#define CONFIG_UBI_SIZE (512 << 10)
48#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
49 (128 << 10))
50
51/*
52 * Hardware drivers
53 */
54
55/*
56 * NS16550 Configuration
57 */
58#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
59
Pali Rohár248ef0a2012-10-29 07:54:01 +000060#define CONFIG_SYS_NS16550_SERIAL
61#define CONFIG_SYS_NS16550_REG_SIZE (-4)
62#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
63
64/*
65 * select serial console configuration
66 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000067#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Pali Rohár248ef0a2012-10-29 07:54:01 +000068
69/* allow to overwrite serial and ethaddr */
70#define CONFIG_ENV_OVERWRITE
Pali Rohár248ef0a2012-10-29 07:54:01 +000071#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000072
Pali Rohár248ef0a2012-10-29 07:54:01 +000073/* USB device configuration */
74#define CONFIG_USB_DEVICE
75#define CONFIG_USBD_VENDORID 0x0421
76#define CONFIG_USBD_PRODUCTID 0x01c8
77#define CONFIG_USBD_MANUFACTURER "Nokia"
78#define CONFIG_USBD_PRODUCT_NAME "N900"
79
Pali Rohár248ef0a2012-10-29 07:54:01 +000080/* commands to include */
Pali Rohár248ef0a2012-10-29 07:54:01 +000081
Heiko Schocherf53f2b82013-10-22 11:03:18 +020082#define CONFIG_SYS_I2C
Pali Rohár248ef0a2012-10-29 07:54:01 +000083
84/*
85 * TWL4030
86 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000087
Pali Rohár248ef0a2012-10-29 07:54:01 +000088#define GPIO_SLIDE 71
89
90/*
91 * Board ONENAND Info.
92 */
93
Pali Rohár248ef0a2012-10-29 07:54:01 +000094#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000095
Pali Rohár248ef0a2012-10-29 07:54:01 +000096/* Watchdog support */
97#define CONFIG_HW_WATCHDOG
98
99/*
100 * Framebuffer
101 */
102/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000103#define CONFIG_VIDEO_LOGO
104#define VIDEO_FB_16BPP_PIXEL_SWAP
105#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +0000106#define CONFIG_SPLASH_SCREEN
107
108/* functions for cfb_console */
109#define VIDEO_KBD_INIT_FCT rx51_kp_init()
110#define VIDEO_TSTC_FCT rx51_kp_tstc
111#define VIDEO_GETC_FCT rx51_kp_getc
112#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600113struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000114int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600115int rx51_kp_tstc(struct stdio_dev *sdev);
116int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000117#endif
118
Pali Rohár248ef0a2012-10-29 07:54:01 +0000119/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000120#define CONFIG_EXTRA_ENV_SETTINGS \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000121 "usbtty=cdc_acm\0" \
122 "stdin=vga\0" \
123 "stdout=vga\0" \
124 "stderr=vga\0" \
125 "setcon=setenv stdin ${con};" \
126 "setenv stdout ${con};" \
127 "setenv stderr ${con}\0" \
128 "sercon=setenv con serial; run setcon\0" \
129 "usbcon=setenv con usbtty; run setcon\0" \
130 "vgacon=setenv con vga; run setcon\0" \
131 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
132 "switchmmc=mmc dev ${mmcnum}\0" \
133 "kernaddr=0x82008000\0" \
134 "initrdaddr=0x84008000\0" \
135 "scriptaddr=0x86008000\0" \
136 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
137 "${loadaddr} ${mmcfile}\0" \
138 "kernload=setenv loadaddr ${kernaddr};" \
139 "setenv mmcfile ${mmckernfile};" \
140 "run fileload\0" \
141 "initrdload=setenv loadaddr ${initrdaddr};" \
142 "setenv mmcfile ${mmcinitrdfile};" \
143 "run fileload\0" \
144 "scriptload=setenv loadaddr ${scriptaddr};" \
145 "setenv mmcfile ${mmcscriptfile};" \
146 "run fileload\0" \
147 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
148 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
149 "kernboot=echo Booting ${mmckernfile} from mmc " \
150 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
151 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
152 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
153 "attachboot=echo Booting attached kernel image ...;" \
154 "setenv setup_omap_atag 1;" \
155 "bootm ${attkernaddr};" \
156 "setenv setup_omap_atag\0" \
157 "trymmcscriptboot=if run switchmmc; then " \
158 "if run scriptload; then " \
159 "run scriptboot;" \
160 "fi;" \
161 "fi\0" \
162 "trymmckernboot=if run switchmmc; then " \
163 "if run kernload; then " \
164 "run kernboot;" \
165 "fi;" \
166 "fi\0" \
167 "trymmckerninitrdboot=if run switchmmc; then " \
168 "if run initrdload; then " \
169 "if run kernload; then " \
170 "run kerninitrdboot;" \
171 "fi;" \
172 "fi; " \
173 "fi\0" \
174 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
175 "setenv mmckernfile uImage; run trymmckernboot\0" \
176 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
177 "setenv mmcpart 2; run trymmcpartboot;" \
178 "setenv mmcpart 3; run trymmcpartboot;" \
179 "setenv mmcpart 4; run trymmcpartboot\0" \
180 "trymmcboot=if run switchmmc; then " \
181 "setenv mmctype fat;" \
182 "run trymmcallpartboot;" \
183 "setenv mmctype ext2;" \
184 "run trymmcallpartboot;" \
185 "setenv mmctype ext4;" \
186 "run trymmcallpartboot;" \
187 "fi\0" \
188 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
189 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár6f52aee2020-04-01 00:35:11 +0200190 "preboot=setenv mmcnum 1; setenv mmcpart 1;" \
191 "setenv mmcscriptfile bootmenu.scr;" \
192 "if run switchmmc; then " \
193 "setenv mmcdone true;" \
194 "setenv mmctype fat;" \
195 "if run scriptload; then true; else " \
196 "setenv mmctype ext2;" \
197 "if run scriptload; then true; else " \
198 "setenv mmctype ext4;" \
199 "if run scriptload; then true; else " \
200 "setenv mmcdone false;" \
201 "fi;" \
202 "fi;" \
203 "fi;" \
204 "if ${mmcdone}; then " \
205 "run scriptboot;" \
206 "fi;" \
207 "fi;" \
208 "if run slide; then true; else " \
209 "setenv bootmenu_delay 0;" \
210 "setenv bootdelay 0;" \
211 "fi\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000212 "menucmd=bootmenu\0" \
213 "bootmenu_0=Attached kernel=run attachboot\0" \
214 "bootmenu_1=Internal eMMC=run emmcboot\0" \
215 "bootmenu_2=External SD card=run sdboot\0" \
216 "bootmenu_3=U-Boot boot order=boot\0" \
217 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000218 ""
219
Pali Rohár13eb3e42013-03-07 05:15:19 +0000220#define CONFIG_POSTBOOTMENU \
221 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000222 "echo Extra commands:;" \
223 "echo run sercon - Use serial port for control.;" \
224 "echo run usbcon - Use usbtty for control.;" \
225 "echo run vgacon - Use framebuffer/keyboard.;" \
226 "echo run sdboot - Boot from SD card slot.;" \
227 "echo run emmcboot - Boot internal eMMC memory.;" \
228 "echo run attachboot - Boot attached kernel image.;" \
229 "echo"
230
231#define CONFIG_BOOTCOMMAND \
232 "run sdboot;" \
233 "run emmcboot;" \
234 "run attachboot;" \
235 "echo"
236
Pali Rohár248ef0a2012-10-29 07:54:01 +0000237/*
238 * Miscellaneous configurable options
239 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000240
Pali Rohár248ef0a2012-10-29 07:54:01 +0000241/* default load address */
242#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
243
244/*
245 * OMAP3 has 12 GP timers, they can be driven by the system clock
246 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
247 * This rate is divided by a local divisor.
248 */
249#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
250#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000251
252/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000253 * Physical Memory Map
254 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000255#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
256
257/*
258 * FLASH and environment organization
259 */
260
Pali Rohár248ef0a2012-10-29 07:54:01 +0000261#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
262#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
263#define CONFIG_SYS_INIT_RAM_SIZE 0x800
264#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
265 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
266
267/*
268 * Attached kernel image
269 */
270
271#define SDRAM_SIZE 0x10000000 /* 256 MB */
272#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
273
274#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
275#define KERNEL_OFFSET 0x40000 /* 256 kB */
276#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
277#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
278
279/* Reserve protected RAM for attached kernel */
280#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
281
282#endif /* __CONFIG_H */