| Patrick Rudolph | 7cda00a | 2024-10-23 15:20:04 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2019 Broadcom. |
| 4 | */ |
| 5 | #include <dm.h> |
| 6 | #include <irq.h> |
| 7 | #include <asm/gic.h> |
| 8 | #include <asm/acpi_table.h> |
| 9 | #include <cpu_func.h> |
| 10 | #include <dm/acpi.h> |
| 11 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 12 | |
| 13 | #ifdef CONFIG_ACPIGEN |
| 14 | /** |
| 15 | * acpi_gicv2_fill_madt() - Fill out the body of the MADT |
| 16 | * |
| 17 | * Write GICD and GICR tables based on collected devicetree data. |
| 18 | * |
| 19 | * @dev: Device to write ACPI tables for |
| 20 | * @ctx: ACPI context to write MADT sub-tables to |
| 21 | * Return: 0 if OK |
| 22 | */ |
| 23 | static int acpi_gicv2_fill_madt(const struct udevice *dev, struct acpi_ctx *ctx) |
| 24 | { |
| 25 | struct acpi_madt_gicd *gicd; |
| 26 | fdt_addr_t addr; |
| 27 | |
| 28 | addr = dev_read_addr_index(dev, 0); |
| 29 | if (addr == FDT_ADDR_T_NONE) { |
| 30 | pr_err("%s: failed to get GICD address\n", __func__); |
| 31 | return -EINVAL; |
| 32 | } |
| 33 | |
| 34 | gicd = ctx->current; |
| 35 | acpi_write_madt_gicd(gicd, dev_seq(dev), addr, 2); |
| 36 | acpi_inc(ctx, gicd->length); |
| 37 | |
| 38 | return 0; |
| 39 | } |
| 40 | |
| 41 | static struct acpi_ops gic_v2_acpi_ops = { |
| 42 | .fill_madt = acpi_gicv2_fill_madt, |
| 43 | }; |
| 44 | #endif |
| 45 | |
| 46 | static const struct udevice_id gic_v2_ids[] = { |
| 47 | { .compatible = "arm,arm11mp-gic" }, |
| 48 | { .compatible = "arm,cortex-a15-gic" }, |
| 49 | { .compatible = "arm,cortex-a7-gic" }, |
| 50 | { .compatible = "arm,cortex-a5-gic" }, |
| 51 | { .compatible = "arm,cortex-a9-gic" }, |
| 52 | { .compatible = "arm,eb11mp-gic" }, |
| 53 | { .compatible = "arm,gic-400" }, |
| 54 | { .compatible = "arm,pl390" }, |
| 55 | { .compatible = "arm,tc11mp-gic" }, |
| 56 | { .compatible = "qcom,msm-8660-qgic" }, |
| 57 | { .compatible = "qcom,msm-qgic2" }, |
| 58 | {} |
| 59 | }; |
| 60 | |
| 61 | static int arm_gic_v2_of_xlate(struct irq *irq, struct ofnode_phandle_args *args) |
| 62 | { |
| 63 | if (args->args_count != 3) { |
| 64 | log_debug("Invalid args_count: %d\n", args->args_count); |
| 65 | return -EINVAL; |
| 66 | } |
| 67 | |
| 68 | /* ARM Generic Interrupt Controller v1 and v2 */ |
| 69 | if (args->args[0] == GIC_SPI) |
| 70 | irq->id = args->args[1] + 32; |
| 71 | else |
| 72 | irq->id = args->args[1] + 16; |
| 73 | |
| 74 | irq->flags = args->args[2]; |
| 75 | |
| 76 | return 0; |
| 77 | } |
| 78 | |
| 79 | static const struct irq_ops arm_gic_v2_ops = { |
| 80 | .of_xlate = arm_gic_v2_of_xlate, |
| 81 | }; |
| 82 | |
| 83 | U_BOOT_DRIVER(arm_gic_v2) = { |
| 84 | .name = "gic-v2", |
| 85 | .id = UCLASS_IRQ, |
| 86 | .of_match = gic_v2_ids, |
| 87 | .ops = &arm_gic_v2_ops, |
| 88 | ACPI_OPS_PTR(&gic_v2_acpi_ops) |
| 89 | }; |