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Stefan Agner7152f342018-06-22 17:19:46 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * NXP GPMI NAND flash driver
4 *
5 * Copyright (C) 2018 Toradex
6 * Authors:
7 * Stefan Agner <stefan.agner@toradex.com>
8 */
9
Stefan Agner19f90512018-06-22 18:06:16 +020010#include <linux/mtd/mtd.h>
Tom Rini3bde7e22021-09-22 14:50:35 -040011#include <linux/mtd/rawnand.h>
Stefan Agner19f90512018-06-22 18:06:16 +020012#include <asm/cache.h>
13#include <nand.h>
14#include <asm/mach-imx/dma.h>
15
16/**
17 * @gf_len: The length of Galois Field. (e.g., 13 or 14)
18 * @ecc_strength: A number that describes the strength of the ECC
19 * algorithm.
Ye Li94547442020-05-04 22:08:50 +080020 * @ecc_chunk0_size: The size, in bytes, of a first ECC chunk.
21 * @ecc_chunkn_size: The size, in bytes, of a single ECC chunk after
22 * the first chunk in the page.
Stefan Agner19f90512018-06-22 18:06:16 +020023 * @ecc_chunk_count: The number of ECC chunks in the page,
24 * @block_mark_byte_offset: The byte offset in the ECC-based page view at
25 * which the underlying physical block mark appears.
26 * @block_mark_bit_offset: The bit offset into the ECC-based page view at
27 * which the underlying physical block mark appears.
Ye Li94547442020-05-04 22:08:50 +080028 * @ecc_for_meta: The flag to indicate if there is a dedicate ecc
29 * for meta.
Stefan Agner19f90512018-06-22 18:06:16 +020030 */
31struct bch_geometry {
32 unsigned int gf_len;
33 unsigned int ecc_strength;
Ye Li94547442020-05-04 22:08:50 +080034 unsigned int ecc_chunk0_size;
35 unsigned int ecc_chunkn_size;
Stefan Agner19f90512018-06-22 18:06:16 +020036 unsigned int ecc_chunk_count;
37 unsigned int block_mark_byte_offset;
38 unsigned int block_mark_bit_offset;
Ye Li94547442020-05-04 22:08:50 +080039 unsigned int ecc_for_meta; /* ECC for meta data */
Stefan Agner19f90512018-06-22 18:06:16 +020040};
41
42struct mxs_nand_info {
43 struct nand_chip chip;
44 struct udevice *dev;
45 unsigned int max_ecc_strength_supported;
46 bool use_minimum_ecc;
47 int cur_chip;
48
49 uint32_t cmd_queue_len;
50 uint32_t data_buf_size;
51 struct bch_geometry bch_geometry;
52
53 uint8_t *cmd_buf;
54 uint8_t *data_buf;
55 uint8_t *oob_buf;
56
57 uint8_t marking_block_bad;
58 uint8_t raw_oob_mode;
59
60 struct mxs_gpmi_regs *gpmi_regs;
61 struct mxs_bch_regs *bch_regs;
62
63 /* Functions with altered behaviour */
64 int (*hooked_read_oob)(struct mtd_info *mtd,
65 loff_t from, struct mtd_oob_ops *ops);
66 int (*hooked_write_oob)(struct mtd_info *mtd,
67 loff_t to, struct mtd_oob_ops *ops);
68 int (*hooked_block_markbad)(struct mtd_info *mtd,
69 loff_t ofs);
70
71 /* DMA descriptors */
72 struct mxs_dma_desc **desc;
73 uint32_t desc_index;
Igor Opaniukc55401372019-11-03 16:49:43 +010074
75 /* Hardware BCH interface and randomizer */
76 u32 en_randomizer;
77 u32 writesize;
78 u32 oobsize;
79 u32 bch_flash0layout0;
80 u32 bch_flash0layout1;
81};
82
83struct mxs_nand_layout {
84 u32 nblocks;
85 u32 meta_size;
86 u32 data0_size;
87 u32 ecc0;
88 u32 datan_size;
89 u32 eccn;
Han Xu33543b52020-05-04 22:08:58 +080090 u32 gf_len;
Stefan Agner19f90512018-06-22 18:06:16 +020091};
92
93int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info);
Stefan Agner7152f342018-06-22 17:19:46 +020094int mxs_nand_init_spl(struct nand_chip *nand);
Stefan Agner5883e552018-06-22 17:19:47 +020095int mxs_nand_setup_ecc(struct mtd_info *mtd);
Igor Opaniukc55401372019-11-03 16:49:43 +010096
Han Xuafed2a12020-05-06 20:59:19 +080097void mxs_nand_mode_fcb_62bit(struct mtd_info *mtd);
98void mxs_nand_mode_fcb_40bit(struct mtd_info *mtd);
Igor Opaniukc55401372019-11-03 16:49:43 +010099void mxs_nand_mode_normal(struct mtd_info *mtd);
100u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd);
101u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd);
102void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l);