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wdenkaffae2b2002-08-17 09:36:01 +00001/*
2 * (C) Copyright 2002 SIXNET, dge@sixnetio.com.
3 *
wdenkc0bc2e12004-02-09 23:12:24 +00004 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
5 * Stephan Linz <linz@li-pro.net>
6 *
wdenkaffae2b2002-08-17 09:36:01 +00007 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26/*
wdenkc0bc2e12004-02-09 23:12:24 +000027 * Date & Time support for DS1306 RTC using SPI:
28 *
29 * - SXNI855T: it uses its own soft SPI here in this file
30 * - all other: use the external spi_xfer() function
31 * (see include/spi.h)
wdenkaffae2b2002-08-17 09:36:01 +000032 */
33
34#include <common.h>
35#include <command.h>
36#include <rtc.h>
wdenkc0bc2e12004-02-09 23:12:24 +000037#include <spi.h>
wdenkaffae2b2002-08-17 09:36:01 +000038
39#if defined(CONFIG_RTC_DS1306) && (CONFIG_COMMANDS & CFG_CMD_DATE)
40
wdenkc0bc2e12004-02-09 23:12:24 +000041#define RTC_SECONDS 0x00
42#define RTC_MINUTES 0x01
43#define RTC_HOURS 0x02
44#define RTC_DAY_OF_WEEK 0x03
45#define RTC_DATE_OF_MONTH 0x04
46#define RTC_MONTH 0x05
47#define RTC_YEAR 0x06
48
49#define RTC_SECONDS_ALARM0 0x07
50#define RTC_MINUTES_ALARM0 0x08
51#define RTC_HOURS_ALARM0 0x09
52#define RTC_DAY_OF_WEEK_ALARM0 0x0a
53
54#define RTC_SECONDS_ALARM1 0x0b
55#define RTC_MINUTES_ALARM1 0x0c
56#define RTC_HOURS_ALARM1 0x0d
57#define RTC_DAY_OF_WEEK_ALARM1 0x0e
58
59#define RTC_CONTROL 0x0f
60#define RTC_STATUS 0x10
61#define RTC_TRICKLE_CHARGER 0x11
62
63#define RTC_USER_RAM_BASE 0x20
64
65/*
66 * External table of chip select functions (see the appropriate board
67 * support for the actual definition of the table).
68 */
69extern spi_chipsel_type spi_chipsel[];
70extern int spi_chipsel_cnt;
71
72static unsigned int bin2bcd (unsigned int n);
73static unsigned char bcd2bin (unsigned char c);
74static unsigned char rtc_read (unsigned char reg);
75static void rtc_write (unsigned char reg, unsigned char val);
76
wdenkc0bc2e12004-02-09 23:12:24 +000077/* ************************************************************************* */
78#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
79
80static void soft_spi_send (unsigned char n);
81static unsigned char soft_spi_read (void);
82static void init_spi (void);
wdenkaffae2b2002-08-17 09:36:01 +000083
84/*-----------------------------------------------------------------------
85 * Definitions
86 */
87
88#define PB_SPISCK 0x00000002 /* PB 30 */
89#define PB_SPIMOSI 0x00000004 /* PB 29 */
90#define PB_SPIMISO 0x00000008 /* PB 28 */
91#define PB_SPI_CE 0x00010000 /* PB 15 */
92
93/* ------------------------------------------------------------------------- */
94
95/* read clock time from DS1306 and return it in *tmp */
wdenkc0bc2e12004-02-09 23:12:24 +000096void rtc_get (struct rtc_time *tmp)
wdenkaffae2b2002-08-17 09:36:01 +000097{
wdenkc0bc2e12004-02-09 23:12:24 +000098 volatile immap_t *immap = (immap_t *) CFG_IMMR;
99 unsigned char spi_byte; /* Data Byte */
wdenkaffae2b2002-08-17 09:36:01 +0000100
wdenkc0bc2e12004-02-09 23:12:24 +0000101 init_spi (); /* set port B for software SPI */
wdenkaffae2b2002-08-17 09:36:01 +0000102
wdenkc0bc2e12004-02-09 23:12:24 +0000103 /* Now we can enable the DS1306 RTC */
104 immap->im_cpm.cp_pbdat |= PB_SPI_CE;
105 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000106
wdenkc0bc2e12004-02-09 23:12:24 +0000107 /* Shift out the address (0) of the time in the Clock Chip */
108 soft_spi_send (0);
wdenkaffae2b2002-08-17 09:36:01 +0000109
wdenkc0bc2e12004-02-09 23:12:24 +0000110 /* Put the clock readings into the rtc_time structure */
111 tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
112 tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
wdenkaffae2b2002-08-17 09:36:01 +0000113
wdenkc0bc2e12004-02-09 23:12:24 +0000114 /* Hours are trickier */
115 spi_byte = soft_spi_read (); /* Read Hours into temporary value */
116 if (spi_byte & 0x40) {
117 /* 12 hour mode bit is set (time is in 1-12 format) */
118 if (spi_byte & 0x20) {
119 /* since PM we add 11 to get 0-23 for hours */
120 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
121 } else {
122 /* since AM we subtract 1 to get 0-23 for hours */
123 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
124 }
125 } else {
126 /* Otherwise, 0-23 hour format */
127 tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
wdenkaffae2b2002-08-17 09:36:01 +0000128 }
wdenkaffae2b2002-08-17 09:36:01 +0000129
wdenkc0bc2e12004-02-09 23:12:24 +0000130 soft_spi_read (); /* Read and discard Day of week */
131 tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
132 tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
wdenkaffae2b2002-08-17 09:36:01 +0000133
wdenkc0bc2e12004-02-09 23:12:24 +0000134 /* Read Year and convert to this century */
135 tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
wdenkaffae2b2002-08-17 09:36:01 +0000136
wdenkc0bc2e12004-02-09 23:12:24 +0000137 /* Now we can disable the DS1306 RTC */
138 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
139 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000140
wdenkc0bc2e12004-02-09 23:12:24 +0000141 GregorianDay (tmp); /* Determine the day of week */
wdenkaffae2b2002-08-17 09:36:01 +0000142
wdenkc0bc2e12004-02-09 23:12:24 +0000143 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
144 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
145 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
wdenkaffae2b2002-08-17 09:36:01 +0000146}
147
148/* ------------------------------------------------------------------------- */
149
150/* set clock time in DS1306 RTC and in MPC8xx RTC */
wdenkc0bc2e12004-02-09 23:12:24 +0000151void rtc_set (struct rtc_time *tmp)
wdenkaffae2b2002-08-17 09:36:01 +0000152{
wdenkc0bc2e12004-02-09 23:12:24 +0000153 volatile immap_t *immap = (immap_t *) CFG_IMMR;
wdenkaffae2b2002-08-17 09:36:01 +0000154
wdenkc0bc2e12004-02-09 23:12:24 +0000155 init_spi (); /* set port B for software SPI */
wdenkaffae2b2002-08-17 09:36:01 +0000156
wdenkc0bc2e12004-02-09 23:12:24 +0000157 /* Now we can enable the DS1306 RTC */
158 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
159 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000160
wdenkc0bc2e12004-02-09 23:12:24 +0000161 /* First disable write protect in the clock chip control register */
162 soft_spi_send (0x8F); /* send address of the control register */
163 soft_spi_send (0x00); /* send control register contents */
wdenkaffae2b2002-08-17 09:36:01 +0000164
wdenkc0bc2e12004-02-09 23:12:24 +0000165 /* Now disable the DS1306 to terminate the write */
166 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
167 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000168
wdenkc0bc2e12004-02-09 23:12:24 +0000169 /* Now enable the DS1306 to initiate a new write */
170 immap->im_cpm.cp_pbdat |= PB_SPI_CE;
171 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000172
wdenkc0bc2e12004-02-09 23:12:24 +0000173 /* Next, send the address of the clock time write registers */
174 soft_spi_send (0x80); /* send address of the first time register */
wdenkaffae2b2002-08-17 09:36:01 +0000175
wdenkc0bc2e12004-02-09 23:12:24 +0000176 /* Use Burst Mode to send all of the time data to the clock */
177 bin2bcd (tmp->tm_sec);
178 soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
179 soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
180 soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
181 soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
182 soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
183 soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
184 soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
wdenkaffae2b2002-08-17 09:36:01 +0000185
wdenkc0bc2e12004-02-09 23:12:24 +0000186 /* Now we can disable the Clock chip to terminate the burst write */
187 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
188 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000189
wdenkc0bc2e12004-02-09 23:12:24 +0000190 /* Now we can enable the Clock chip to initiate a new write */
191 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
192 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000193
wdenkc0bc2e12004-02-09 23:12:24 +0000194 /* First we Enable write protect in the clock chip control register */
195 soft_spi_send (0x8F); /* send address of the control register */
196 soft_spi_send (0x40); /* send out Control Register contents */
wdenkaffae2b2002-08-17 09:36:01 +0000197
wdenkc0bc2e12004-02-09 23:12:24 +0000198 /* Now disable the DS1306 */
199 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
200 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000201
wdenkc0bc2e12004-02-09 23:12:24 +0000202 /* Set standard MPC8xx clock to the same time so Linux will
203 * see the time even if it doesn't have a DS1306 clock driver.
204 * This helps with experimenting with standard kernels.
205 */
206 {
207 ulong tim;
wdenkaffae2b2002-08-17 09:36:01 +0000208
wdenkc0bc2e12004-02-09 23:12:24 +0000209 tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
210 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
wdenkaffae2b2002-08-17 09:36:01 +0000211
wdenkc0bc2e12004-02-09 23:12:24 +0000212 immap->im_sitk.sitk_rtck = KAPWR_KEY;
213 immap->im_sit.sit_rtc = tim;
214 }
wdenkaffae2b2002-08-17 09:36:01 +0000215
wdenkc0bc2e12004-02-09 23:12:24 +0000216 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
217 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
218 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
wdenkaffae2b2002-08-17 09:36:01 +0000219}
220
221/* ------------------------------------------------------------------------- */
222
wdenkc0bc2e12004-02-09 23:12:24 +0000223/* Initialize Port B for software SPI */
224static void init_spi (void)
wdenkaffae2b2002-08-17 09:36:01 +0000225{
wdenkc0bc2e12004-02-09 23:12:24 +0000226 volatile immap_t *immap = (immap_t *) CFG_IMMR;
227
228 /* Force output pins to begin at logic 0 */
229 immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
230
231 /* Set these 3 signals as outputs */
232 immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
233
234 immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
235 udelay (10);
wdenkaffae2b2002-08-17 09:36:01 +0000236}
237
238/* ------------------------------------------------------------------------- */
239
wdenkc0bc2e12004-02-09 23:12:24 +0000240/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
241static void soft_spi_send (unsigned char n)
wdenkaffae2b2002-08-17 09:36:01 +0000242{
wdenkc0bc2e12004-02-09 23:12:24 +0000243 volatile immap_t *immap = (immap_t *) CFG_IMMR;
244 unsigned char bitpos; /* bit position to receive */
245 unsigned char i; /* Loop Control */
246
247 /* bit position to send, start with most significant bit */
248 bitpos = 0x80;
249
250 /* Send 8 bits to software SPI */
251 for (i = 0; i < 8; i++) { /* Loop for 8 bits */
252 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
253
254 if (n & bitpos)
255 immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */
256 else
257 immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
258 udelay (10);
259
260 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
261 udelay (10);
262
263 bitpos >>= 1; /* Shift for next bit position */
264 }
wdenkaffae2b2002-08-17 09:36:01 +0000265}
266
267/* ------------------------------------------------------------------------- */
268
wdenkc0bc2e12004-02-09 23:12:24 +0000269/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
270static unsigned char soft_spi_read (void)
wdenkaffae2b2002-08-17 09:36:01 +0000271{
wdenkc0bc2e12004-02-09 23:12:24 +0000272 volatile immap_t *immap = (immap_t *) CFG_IMMR;
273
274 unsigned char spi_byte = 0; /* Return value, assume success */
275 unsigned char bitpos; /* bit position to receive */
276 unsigned char i; /* Loop Control */
277
278 /* bit position to receive, start with most significant bit */
279 bitpos = 0x80;
280
281 /* Read 8 bits here */
282 for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
283 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
284 udelay (10);
285 if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
286 spi_byte |= bitpos; /* Set data accordingly */
287 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
288 udelay (10);
289 bitpos >>= 1; /* Shift for next bit position */
290 }
291
292 return spi_byte; /* Return the byte read */
wdenkaffae2b2002-08-17 09:36:01 +0000293}
294
295/* ------------------------------------------------------------------------- */
296
wdenkc0bc2e12004-02-09 23:12:24 +0000297void rtc_reset (void)
298{
299 return; /* nothing to do */
300}
wdenkaffae2b2002-08-17 09:36:01 +0000301
wdenkc0bc2e12004-02-09 23:12:24 +0000302#else /* not CONFIG_SXNI855T */
303/* ************************************************************************* */
wdenkaffae2b2002-08-17 09:36:01 +0000304
wdenkc0bc2e12004-02-09 23:12:24 +0000305/* read clock time from DS1306 and return it in *tmp */
306void rtc_get (struct rtc_time *tmp)
307{
308 unsigned char sec, min, hour, mday, wday, mon, year;
309
310 sec = rtc_read (RTC_SECONDS);
311 min = rtc_read (RTC_MINUTES);
312 hour = rtc_read (RTC_HOURS);
313 mday = rtc_read (RTC_DATE_OF_MONTH);
314 wday = rtc_read (RTC_DAY_OF_WEEK);
315 mon = rtc_read (RTC_MONTH);
316 year = rtc_read (RTC_YEAR);
317
318 debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
319 "hr: %02x min: %02x sec: %02x\n",
320 year, mon, mday, wday, hour, min, sec);
321 debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
322 rtc_read (RTC_DAY_OF_WEEK_ALARM0),
323 rtc_read (RTC_HOURS_ALARM0),
324 rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
325 debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
326 rtc_read (RTC_DAY_OF_WEEK_ALARM1),
327 rtc_read (RTC_HOURS_ALARM1),
328 rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
329
330 tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
331 tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
332
333 /* convert Hours */
334 tmp->tm_hour = (hour & 0x40)
335 ? ((hour & 0x20) /* 12 hour mode */
336 ? bcd2bin (hour & 0x1F) + 11 /* PM */
337 : bcd2bin (hour & 0x1F) - 1 /* AM */
338 )
339 : bcd2bin (hour & 0x3F); /* 24 hour mode */
340
341 tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
342 tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
343 tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
344 tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
345 tmp->tm_yday = 0;
346 tmp->tm_isdst = 0;
347
348 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
349 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
350 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
wdenkaffae2b2002-08-17 09:36:01 +0000351}
352
353/* ------------------------------------------------------------------------- */
354
wdenkc0bc2e12004-02-09 23:12:24 +0000355/* set clock time from *tmp in DS1306 RTC */
356void rtc_set (struct rtc_time *tmp)
357{
358 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
359 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
360 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
361
362 rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
363 rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
364 rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
365 rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
366 rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
367 rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
368 rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
369}
370
371/* ------------------------------------------------------------------------- */
372
373/* reset the DS1306 */
374void rtc_reset (void)
wdenkaffae2b2002-08-17 09:36:01 +0000375{
wdenkc0bc2e12004-02-09 23:12:24 +0000376 /* clear the control register */
377 rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
378 rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
wdenkaffae2b2002-08-17 09:36:01 +0000379
wdenkc0bc2e12004-02-09 23:12:24 +0000380 /* reset all alarms */
381 rtc_write (RTC_SECONDS_ALARM0, 0x00);
382 rtc_write (RTC_SECONDS_ALARM1, 0x00);
383 rtc_write (RTC_MINUTES_ALARM0, 0x00);
384 rtc_write (RTC_MINUTES_ALARM1, 0x00);
385 rtc_write (RTC_HOURS_ALARM0, 0x00);
386 rtc_write (RTC_HOURS_ALARM1, 0x00);
387 rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
388 rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
389}
wdenkaffae2b2002-08-17 09:36:01 +0000390
wdenkc0bc2e12004-02-09 23:12:24 +0000391/* ------------------------------------------------------------------------- */
wdenkaffae2b2002-08-17 09:36:01 +0000392
wdenkc0bc2e12004-02-09 23:12:24 +0000393static unsigned char rtc_read (unsigned char reg)
394{
395 unsigned char dout[2]; /* SPI Output Data Bytes */
396 unsigned char din[2]; /* SPI Input Data Bytes */
wdenkaffae2b2002-08-17 09:36:01 +0000397
wdenkc0bc2e12004-02-09 23:12:24 +0000398 dout[0] = reg;
wdenkaffae2b2002-08-17 09:36:01 +0000399
wdenkc0bc2e12004-02-09 23:12:24 +0000400 if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) {
401 return 0;
402 } else {
403 return din[1];
404 }
wdenkaffae2b2002-08-17 09:36:01 +0000405}
406
407/* ------------------------------------------------------------------------- */
408
wdenkc0bc2e12004-02-09 23:12:24 +0000409static void rtc_write (unsigned char reg, unsigned char val)
wdenkaffae2b2002-08-17 09:36:01 +0000410{
wdenkc0bc2e12004-02-09 23:12:24 +0000411 unsigned char dout[2]; /* SPI Output Data Bytes */
412 unsigned char din[2]; /* SPI Input Data Bytes */
wdenkaffae2b2002-08-17 09:36:01 +0000413
wdenkc0bc2e12004-02-09 23:12:24 +0000414 dout[0] = 0x80 | reg;
415 dout[1] = val;
wdenkaffae2b2002-08-17 09:36:01 +0000416
wdenkc0bc2e12004-02-09 23:12:24 +0000417 spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din);
418}
419
420#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
wdenkaffae2b2002-08-17 09:36:01 +0000421
wdenkc0bc2e12004-02-09 23:12:24 +0000422/* ------------------------------------------------------------------------- */
wdenkaffae2b2002-08-17 09:36:01 +0000423
wdenkc0bc2e12004-02-09 23:12:24 +0000424static unsigned char bcd2bin (unsigned char n)
425{
426 return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
wdenkaffae2b2002-08-17 09:36:01 +0000427}
428
429/* ------------------------------------------------------------------------- */
430
wdenkc0bc2e12004-02-09 23:12:24 +0000431static unsigned int bin2bcd (unsigned int n)
432{
433 return (((n / 10) << 4) | (n % 10));
434}
435/* ------------------------------------------------------------------------- */
436
wdenkaffae2b2002-08-17 09:36:01 +0000437#endif