Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2017 Rockchip Electronics Co., Ltd |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 7 | #include <dm.h> |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 8 | #include <spl.h> |
| 9 | #include <asm/io.h> |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 10 | #include <asm/arch-rockchip/hardware.h> |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 11 | |
| 12 | u32 spl_boot_device(void) |
| 13 | { |
| 14 | return BOOT_DEVICE_MMC1; |
| 15 | } |
Kever Yang | a65d5fa | 2017-07-27 12:53:59 +0800 | [diff] [blame] | 16 | |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 17 | u32 spl_boot_mode(const u32 boot_device) |
| 18 | { |
| 19 | return MMCSD_MODE_RAW; |
| 20 | } |
| 21 | |
Kever Yang | c84ba5d | 2019-07-09 22:00:23 +0800 | [diff] [blame] | 22 | #define TIMER_LOAD_COUNT_L 0x00 |
| 23 | #define TIMER_LOAD_COUNT_H 0x04 |
| 24 | #define TIMER_CONTROL_REG 0x10 |
| 25 | #define TIMER_EN 0x1 |
| 26 | #define TIMER_FMODE BIT(0) |
| 27 | #define TIMER_RMODE BIT(1) |
| 28 | |
| 29 | void rockchip_stimer_init(void) |
| 30 | { |
| 31 | /* If Timer already enabled, don't re-init it */ |
| 32 | u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); |
| 33 | |
| 34 | if (reg & TIMER_EN) |
| 35 | return; |
| 36 | |
| 37 | asm volatile("mcr p15, 0, %0, c14, c0, 0" |
| 38 | : : "r"(COUNTER_FREQUENCY)); |
| 39 | |
| 40 | writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); |
| 41 | writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); |
| 42 | writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); |
| 43 | writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + |
| 44 | TIMER_CONTROL_REG); |
| 45 | } |
| 46 | |
Kever Yang | a65d5fa | 2017-07-27 12:53:59 +0800 | [diff] [blame] | 47 | #define SGRF_DDR_CON0 0x10150000 |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 48 | void board_init_f(ulong dummy) |
| 49 | { |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 50 | int ret; |
| 51 | |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 52 | ret = spl_early_init(); |
| 53 | if (ret) { |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 54 | printf("spl_early_init() failed: %d\n", ret); |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 55 | hang(); |
| 56 | } |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 57 | preloader_console_init(); |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 58 | |
Kever Yang | c84ba5d | 2019-07-09 22:00:23 +0800 | [diff] [blame] | 59 | /* Init secure timer */ |
| 60 | rockchip_stimer_init(); |
| 61 | /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ |
| 62 | timer_init(); |
| 63 | |
Kever Yang | a65d5fa | 2017-07-27 12:53:59 +0800 | [diff] [blame] | 64 | /* Disable the ddr secure region setting to make it non-secure */ |
| 65 | rk_clrreg(SGRF_DDR_CON0, 0x4000); |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | #ifdef CONFIG_SPL_LOAD_FIT |
| 69 | int board_fit_config_name_match(const char *name) |
| 70 | { |
| 71 | /* Just empty function now - can't decide what to choose */ |
| 72 | debug("%s: %s\n", __func__, name); |
| 73 | |
| 74 | return 0; |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 75 | } |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 76 | #endif |