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git01.mediatek.com / filogic / uboot / 7bfca979ed16aa6fa7771b1047948a26e8ce4484 / . / include / asm-avr32 / arch-at32ap700x / gpio-impl.h
blob: 8801bd006caf83705c59c3f1b26d09a3682489ed [file] [log] [blame]
Gunnar Rangoye14f8dd2009-01-23 12:56:29 +0100[diff] [blame]1#ifndef __ASM_AVR32_ARCH_GPIO_IMPL_H__
2#define __ASM_AVR32_ARCH_GPIO_IMPL_H__
3
4/* Register offsets */
5struct gpio_regs {
6 u32 GPER;
7 u32 GPERS;
8 u32 GPERC;
9 u32 GPERT;
10 u32 PMR0;
11 u32 PMR0S;
12 u32 PMR0C;
13 u32 PMR0T;
14 u32 PMR1;
15 u32 PMR1S;
16 u32 PMR1C;
17 u32 PMR1T;
18 u32 __reserved0[4];
19 u32 ODER;
20 u32 ODERS;
21 u32 ODERC;
22 u32 ODERT;
23 u32 OVR;
24 u32 OVRS;
25 u32 OVRC;
26 u32 OVRT;
27 u32 PVR;
28 u32 __reserved_PVRS;
29 u32 __reserved_PVRC;
30 u32 __reserved_PVRT;
31 u32 PUER;
32 u32 PUERS;
33 u32 PUERC;
34 u32 PUERT;
35 u32 PDER;
36 u32 PDERS;
37 u32 PDERC;
38 u32 PDERT;
39 u32 IER;
40 u32 IERS;
41 u32 IERC;
42 u32 IERT;
43 u32 IMR0;
44 u32 IMR0S;
45 u32 IMR0C;
46 u32 IMR0T;
47 u32 IMR1;
48 u32 IMR1S;
49 u32 IMR1C;
50 u32 IMR1T;
51 u32 GFER;
52 u32 GFERS;
53 u32 GFERC;
54 u32 GFERT;
55 u32 IFR;
56 u32 __reserved_IFRS;
57 u32 IFRC;
58 u32 __reserved_IFRT;
59 u32 ODMER;
60 u32 ODMERS;
61 u32 ODMERC;
62 u32 ODMERT;
63 u32 __reserved1[4];
64 u32 ODCR0;
65 u32 ODCR0S;
66 u32 ODCR0C;
67 u32 ODCR0T;
68 u32 ODCR1;
69 u32 ODCR1S;
70 u32 ODCR1C;
71 u32 ODCR1T;
72 u32 __reserved2[4];
73 u32 OSRR0;
74 u32 OSRR0S;
75 u32 OSRR0C;
76 u32 OSRR0T;
77 u32 __reserved3[8];
78 u32 STER;
79 u32 STERS;
80 u32 STERC;
81 u32 STERT;
82 u32 __reserved4[35];
83 u32 VERSION;
84};
85
86#endif /* __ASM_AVR32_ARCH_GPIO_IMPL_H__ */