blob: 2032f1e5c2105815fde9d99eaf40e91b2d8a6f46 [file] [log] [blame]
Sean Andersond11b5822020-06-24 06:41:23 -04001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4 */
5
6#include <dt-bindings/clock/k210-sysctl.h>
7#include <dt-bindings/mfd/k210-sysctl.h>
Sean Anderson68705562020-09-14 11:02:04 -04008#include <dt-bindings/pinctrl/k210-pinctrl.h>
Sean Andersond11b5822020-06-24 06:41:23 -04009#include <dt-bindings/reset/k210-sysctl.h>
10
11/ {
12 /*
13 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
14 * wide, and the upper half of all addresses is ignored.
15 */
16 #address-cells = <1>;
17 #size-cells = <1>;
18 compatible = "kendryte,k210";
19
20 aliases {
Sean Andersonc6d0ef82020-09-28 10:52:28 -040021 cpu0 = &cpu0;
22 cpu1 = &cpu1;
Sean Andersond11b5822020-06-24 06:41:23 -040023 dma0 = &dmac0;
24 gpio0 = &gpio0;
25 gpio1 = &gpio1_0;
26 i2c0 = &i2c0;
27 i2c1 = &i2c1;
28 i2c2 = &i2c2;
29 pinctrl0 = &fpioa;
30 serial0 = &uarths0;
31 serial1 = &uart1;
32 serial2 = &uart2;
33 serial3 = &uart3;
34 spi0 = &spi0;
35 spi1 = &spi1;
36 spi2 = &spi2;
37 spi3 = &spi3;
38 timer0 = &timer0;
39 timer1 = &timer1;
40 timer2 = &timer2;
41 };
42
43 cpus {
44 #address-cells = <1>;
45 #size-cells = <0>;
46 timebase-frequency = <7800000>;
47 cpu0: cpu@0 {
48 device_type = "cpu";
49 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
50 reg = <0>;
51 riscv,isa = "rv64imafdgc";
52 mmu-type = "sv39";
53 i-cache-block-size = <64>;
54 i-cache-size = <0x8000>;
55 d-cache-block-size = <64>;
56 d-cache-size = <0x8000>;
57 clocks = <&sysclk K210_CLK_CPU>;
58 cpu0_intc: interrupt-controller {
59 #interrupt-cells = <1>;
60 interrupt-controller;
61 compatible = "riscv,cpu-intc";
62 };
63 };
64 cpu1: cpu@1 {
65 device_type = "cpu";
66 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
67 reg = <1>;
68 riscv,isa = "rv64imafdgc";
69 mmu-type = "sv39";
70 i-cache-block-size = <64>;
71 i-cache-size = <0x8000>;
72 d-cache-block-size = <64>;
73 d-cache-size = <0x8000>;
74 clocks = <&sysclk K210_CLK_CPU>;
75 cpu1_intc: interrupt-controller {
76 #interrupt-cells = <1>;
77 interrupt-controller;
78 compatible = "riscv,cpu-intc";
79 };
80 };
81 };
82
83 sram: memory@80000000 {
84 device_type = "memory";
85 compatible = "kendryte,k210-sram";
86 reg = <0x80000000 0x400000>,
87 <0x80400000 0x200000>,
88 <0x80600000 0x200000>;
Sean Anderson7be6d2b2021-04-08 22:13:11 -040089 reg-names = "sram0", "sram1", "aisram";
Sean Andersond11b5822020-06-24 06:41:23 -040090 clocks = <&sysclk K210_CLK_SRAM0>,
91 <&sysclk K210_CLK_SRAM1>,
92 <&sysclk K210_CLK_PLL1>;
Sean Anderson7be6d2b2021-04-08 22:13:11 -040093 clock-names = "sram0", "sram1", "aisram";
Sean Andersone8d9e3a2021-04-08 22:13:09 -040094 u-boot,dm-pre-reloc;
Sean Andersond11b5822020-06-24 06:41:23 -040095 };
96
97 reserved-memory {
98 #address-cells = <1>;
99 #size-cells = <1>;
100 ranges;
101
102 ai_reserved: ai@80600000 {
103 reg = <0x80600000 0x200000>;
104 reusable;
105 };
106 };
107
108 clocks {
109 in0: osc {
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
112 clock-frequency = <26000000>;
Sean Andersone8d9e3a2021-04-08 22:13:09 -0400113 u-boot,dm-pre-reloc;
Sean Andersond11b5822020-06-24 06:41:23 -0400114 };
115 };
116
117 soc {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 compatible = "kendryte,k210-soc", "simple-bus";
121 ranges;
122 interrupt-parent = <&plic0>;
123
124 debug0: debug@0 {
125 compatible = "kendryte,k210-debug", "riscv,debug";
126 reg = <0x0 0x1000>;
127 };
128
129 rom0: nvmem@1000 {
130 reg = <0x1000 0x1000>;
131 read-only;
132 };
133
Sean Andersonc6d0ef82020-09-28 10:52:28 -0400134 clint0: clint@2000000 {
Sean Andersond11b5822020-06-24 06:41:23 -0400135 #interrupt-cells = <1>;
136 compatible = "kendryte,k210-clint", "riscv,clint0";
137 reg = <0x2000000 0xC000>;
Sean Andersond11b5822020-06-24 06:41:23 -0400138 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
139 <&cpu1_intc 3>, <&cpu1_intc 7>;
Sean Andersonc6d0ef82020-09-28 10:52:28 -0400140 clocks = <&sysclk K210_CLK_CLINT>;
Sean Andersond11b5822020-06-24 06:41:23 -0400141 };
142
143 plic0: interrupt-controller@C000000 {
144 #interrupt-cells = <1>;
145 compatible = "kendryte,k210-plic", "riscv,plic0";
146 reg = <0xC000000 0x4000000>;
147 interrupt-controller;
148 interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
149 <&cpu1_intc 9>, <&cpu1_intc 11>;
150 riscv,ndev = <65>;
151 riscv,max-priority = <7>;
152 };
153
154 uarths0: serial@38000000 {
155 compatible = "kendryte,k210-uarths", "sifive,uart0";
156 reg = <0x38000000 0x1000>;
157 interrupts = <33>;
158 clocks = <&sysclk K210_CLK_CPU>;
159 status = "disabled";
160 };
161
162 gpio0: gpio-controller@38001000 {
163 #interrupt-cells = <2>;
164 #gpio-cells = <2>;
165 compatible = "kendryte,k210-gpiohs", "sifive,gpio0";
166 reg = <0x38001000 0x1000>;
167 interrupt-controller;
168 interrupts = <34 35 36 37 38 39 40 41
169 42 43 44 45 46 47 48 49
170 50 51 52 53 54 55 56 57
171 58 59 60 61 62 63 64 65>;
172 gpio-controller;
173 ngpios = <32>;
174 status = "disabled";
175 };
176
177 kpu0: kpu@40800000 {
178 compatible = "kendryte,k210-kpu";
179 reg = <0x40800000 0xc00000>;
180 interrupts = <25>;
181 clocks = <&sysclk K210_CLK_AI>;
182 memory-region = <&ai_reserved>;
183 status = "disabled";
184 };
185
186 fft0: fft@42000000 {
187 compatible = "kendryte,k210-fft";
188 reg = <0x42000000 0x400000>;
189 interrupts = <26>;
190 clocks = <&sysclk K210_CLK_FFT>;
191 resets = <&sysrst K210_RST_FFT>;
192 status = "disabled";
193 };
194
195 dmac0: dma-controller@50000000 {
196 compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a";
197 reg = <0x50000000 0x1000>;
198 interrupts = <27 28 29 30 31 32>;
199 clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
200 clock-names = "core-clk", "cfgr-clk";
201 resets = <&sysrst K210_RST_DMA>;
202 dma-channels = <6>;
203 snps,dma-masters = <2>;
204 snps,data-width = <5>;
Sean Andersond1b33212020-10-12 14:18:15 -0400205 snps,block-size = <0x200000 0x200000 0x200000
206 0x200000 0x200000 0x200000>;
Sean Andersond11b5822020-06-24 06:41:23 -0400207 snps,axi-max-burst-len = <256>;
208 status = "disabled";
209 };
210
211 apb0: bus@50200000 {
212 #address-cells = <1>;
213 #size-cells = <1>;
214 compatible = "kendryte,k210-apb", "simple-pm-bus";
215 ranges;
216 clocks = <&sysclk K210_CLK_APB0>;
217
218 gpio1: gpio-controller@50200000 {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 compatible = "kendryte,k210-gpio",
222 "snps,dw-apb-gpio";
223 reg = <0x50200000 0x80>;
224 clocks = <&sysclk K210_CLK_GPIO>;
225 resets = <&sysrst K210_RST_GPIO>;
226 status = "disabled";
227
228 gpio1_0: gpio1@0 {
229 #gpio-cells = <2>;
230 #interrupt-cells = <2>;
231 compatible = "snps,dw-apb-gpio-port";
232 reg = <0>;
233 interrupt-controller;
234 interrupts = <23>;
235 gpio-controller;
236 snps,nr-gpios = <8>;
237 };
238 };
239
240 uart1: serial@50210000 {
241 compatible = "kendryte,k210-uart",
242 "snps,dw-apb-uart";
243 reg = <0x50210000 0x100>;
244 interrupts = <11>;
245 clocks = <&sysclk K210_CLK_UART1>;
246 resets = <&sysrst K210_RST_UART1>;
247 reg-io-width = <4>;
248 reg-shift = <2>;
249 dcd-override;
250 dsr-override;
251 cts-override;
252 ri-override;
253 status = "disabled";
254 };
255
256 uart2: serial@50220000 {
257 compatible = "kendryte,k210-uart",
258 "snps,dw-apb-uart";
259 reg = <0x50220000 0x100>;
260 interrupts = <12>;
261 clocks = <&sysclk K210_CLK_UART2>;
262 resets = <&sysrst K210_RST_UART2>;
263 reg-io-width = <4>;
264 reg-shift = <2>;
265 dcd-override;
266 dsr-override;
267 cts-override;
268 ri-override;
269 status = "disabled";
270 };
271
272 uart3: serial@50230000 {
273 compatible = "kendryte,k210-uart",
274 "snps,dw-apb-uart";
275 reg = <0x50230000 0x100>;
276 interrupts = <13>;
277 clocks = <&sysclk K210_CLK_UART3>;
278 resets = <&sysrst K210_RST_UART3>;
279 reg-io-width = <4>;
280 reg-shift = <2>;
281 dcd-override;
282 dsr-override;
283 cts-override;
284 ri-override;
285 status = "disabled";
286 };
287
288 spi2: spi@50240000 {
Sean Andersonfd9571a2020-10-16 18:57:50 -0400289 compatible = "canaan,kendryte-k210-spi",
290 "snps,dw-apb-ssi-4.01",
Sean Andersond11b5822020-06-24 06:41:23 -0400291 "snps,dw-apb-ssi";
292 spi-slave;
293 reg = <0x50240000 0x100>;
294 interrupts = <2>;
295 clocks = <&sysclk K210_CLK_SPI2>;
296 resets = <&sysrst K210_RST_SPI2>;
297 spi-max-frequency = <25000000>;
298 status = "disabled";
299 };
300
301 i2s0: i2s@50250000 {
302 compatible = "kendryte,k210-i2s",
303 "snps,designware-i2s";
304 reg = <0x50250000 0x200>;
305 interrupts = <5>;
306 clocks = <&sysclk K210_CLK_I2S0>;
307 clock-names = "i2sclk";
308 resets = <&sysrst K210_RST_I2S0>;
309 status = "disabled";
310 };
311
312 apu0: sound@520250200 {
313 compatible = "kendryte,k210-apu";
314 reg = <0x50250200 0x200>;
315 status = "disabled";
316 };
317
318 i2s1: i2s@50260000 {
319 compatible = "kendryte,k210-i2s",
320 "snps,designware-i2s";
321 reg = <0x50260000 0x200>;
322 interrupts = <6>;
323 clocks = <&sysclk K210_CLK_I2S1>;
324 clock-names = "i2sclk";
325 resets = <&sysrst K210_RST_I2S1>;
326 status = "disabled";
327 };
328
329 i2s2: i2s@50270000 {
330 compatible = "kendryte,k210-i2s",
331 "snps,designware-i2s";
332 reg = <0x50270000 0x200>;
333 interrupts = <7>;
334 clocks = <&sysclk K210_CLK_I2S2>;
335 clock-names = "i2sclk";
336 resets = <&sysrst K210_RST_I2S2>;
337 status = "disabled";
338 };
339
340 i2c0: i2c@50280000 {
341 compatible = "kendryte,k210-i2c",
342 "snps,designware-i2c";
343 reg = <0x50280000 0x100>;
344 interrupts = <8>;
345 clocks = <&sysclk K210_CLK_I2C0>;
346 resets = <&sysrst K210_RST_I2C0>;
347 status = "disabled";
348 };
349
350 i2c1: i2c@50290000 {
351 compatible = "kendryte,k210-i2c",
352 "snps,designware-i2c";
353 reg = <0x50290000 0x100>;
354 interrupts = <9>;
355 clocks = <&sysclk K210_CLK_I2C1>;
356 resets = <&sysrst K210_RST_I2C1>;
357 status = "disabled";
358 };
359
360 i2c2: i2c@502A0000 {
361 compatible = "kendryte,k210-i2c",
362 "snps,designware-i2c";
363 reg = <0x502A0000 0x100>;
364 interrupts = <10>;
365 clocks = <&sysclk K210_CLK_I2C2>;
366 resets = <&sysrst K210_RST_I2C2>;
367 status = "disabled";
368 };
369
370 fpioa: pinmux@502B0000 {
371 compatible = "kendryte,k210-fpioa";
372 reg = <0x502B0000 0x100>;
373 clocks = <&sysclk K210_CLK_FPIOA>;
374 resets = <&sysrst K210_RST_FPIOA>;
Sean Anderson68705562020-09-14 11:02:04 -0400375 kendryte,sysctl = <&sysctl>;
376 kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
377 pinctrl-0 = <&fpioa_jtag>;
378 pinctrl-names = "default";
Sean Andersond11b5822020-06-24 06:41:23 -0400379 status = "disabled";
Sean Anderson68705562020-09-14 11:02:04 -0400380
381 fpioa_jtag: jtag {
382 pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
383 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
384 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
385 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
386 };
Sean Andersond11b5822020-06-24 06:41:23 -0400387 };
388
389 sha256: sha256@502C0000 {
390 compatible = "kendryte,k210-sha256";
391 reg = <0x502C0000 0x100>;
392 clocks = <&sysclk K210_CLK_SHA>;
393 resets = <&sysrst K210_RST_SHA>;
394 status = "disabled";
395 };
396
397 timer0: timer@502D0000 {
398 compatible = "kendryte,k210-timer",
399 "snps,dw-apb-timer";
400 reg = <0x502D0000 0x100>;
401 interrupts = <14 15>;
402 clocks = <&sysclk K210_CLK_TIMER0>;
403 clock-names = "timer";
404 resets = <&sysrst K210_RST_TIMER0>;
405 status = "disabled";
406 };
407
408 timer1: timer@502E0000 {
409 compatible = "kendryte,k210-timer",
410 "snps,dw-apb-timer";
411 reg = <0x502E0000 0x100>;
412 interrupts = <16 17>;
413 clocks = <&sysclk K210_CLK_TIMER1>;
414 clock-names = "timer";
415 resets = <&sysrst K210_RST_TIMER1>;
416 status = "disabled";
417 };
418
419 timer2: timer@502F0000 {
420 compatible = "kendryte,k210-timer",
421 "snps,dw-apb-timer";
422 reg = <0x502F0000 0x100>;
423 interrupts = <18 19>;
424 clocks = <&sysclk K210_CLK_TIMER2>;
425 clock-names = "timer";
426 resets = <&sysrst K210_RST_TIMER2>;
427 status = "disabled";
428 };
429 };
430
431 apb1: bus@50400000 {
432 #address-cells = <1>;
433 #size-cells = <1>;
434 compatible = "kendryte,k210-apb", "simple-pm-bus";
435 ranges;
436 clocks = <&sysclk K210_CLK_APB1>;
437
438 wdt0: watchdog@50400000 {
439 compatible = "kendryte,k210-wdt", "snps,dw-wdt";
440 reg = <0x50400000 0x100>;
441 interrupts = <21>;
442 clocks = <&sysclk K210_CLK_WDT0>;
443 resets = <&sysrst K210_RST_WDT0>;
Sean Andersond11b5822020-06-24 06:41:23 -0400444 };
445
446 wdt1: watchdog@50410000 {
447 compatible = "kendryte,k210-wdt", "snps,dw-wdt";
448 reg = <0x50410000 0x100>;
449 interrupts = <22>;
450 clocks = <&sysclk K210_CLK_WDT1>;
451 resets = <&sysrst K210_RST_WDT1>;
452 status = "disabled";
453 };
454
455 otp0: nvmem@50420000 {
456 #address-cells = <1>;
457 #size-cells = <1>;
458 compatible = "kendryte,k210-otp";
459 reg = <0x50420000 0x100>,
460 <0x88000000 0x20000>;
461 reg-names = "reg", "mem";
462 clocks = <&sysclk K210_CLK_ROM>;
463 resets = <&sysrst K210_RST_ROM>;
464 read-only;
465 status = "disabled";
466
467 /* Bootloader */
468 firmware@00000 {
469 reg = <0x00000 0xC200>;
470 };
471
472 /*
473 * config string as described in RISC-V
474 * privileged spec 1.9
475 */
476 config-1-9@1c000 {
477 reg = <0x1C000 0x1000>;
478 };
479
480 /*
481 * Device tree containing only registers,
482 * interrupts, and cpus
483 */
484 fdt@1d000 {
485 reg = <0x1D000 0x2000>;
486 };
487
488 /* CPU/ROM credits */
489 credits@1f000 {
490 reg = <0x1F000 0x1000>;
491 };
492 };
493
494 dvp0: camera@50430000 {
495 compatible = "kendryte,k210-dvp";
496 reg = <0x50430000 0x100>;
497 interrupts = <24>;
498 clocks = <&sysclk K210_CLK_DVP>;
499 resets = <&sysrst K210_RST_DVP>;
Sean Anderson2ddd3e02020-10-16 18:57:54 -0400500 kendryte,sysctl = <&sysctl>;
501 kendryte,misc-offset = <K210_SYSCTL_MISC>;
Sean Andersond11b5822020-06-24 06:41:23 -0400502 status = "disabled";
503 };
504
505 sysctl: syscon@50440000 {
506 compatible = "kendryte,k210-sysctl",
507 "syscon", "simple-mfd";
508 reg = <0x50440000 0x100>;
509 reg-io-width = <4>;
Sean Andersone8d9e3a2021-04-08 22:13:09 -0400510 u-boot,dm-pre-reloc;
Sean Andersond11b5822020-06-24 06:41:23 -0400511
512 sysclk: clock-controller {
513 #clock-cells = <1>;
514 compatible = "kendryte,k210-clk";
515 clocks = <&in0>;
Sean Andersone8d9e3a2021-04-08 22:13:09 -0400516 u-boot,dm-pre-reloc;
Sean Andersond11b5822020-06-24 06:41:23 -0400517 };
518
519 sysrst: reset-controller {
520 compatible = "kendryte,k210-rst",
521 "syscon-reset";
522 #reset-cells = <1>;
523 regmap = <&sysctl>;
524 offset = <K210_SYSCTL_PERI_RESET>;
525 mask = <0x27FFFFFF>;
526 assert-high = <1>;
527 };
528
529 reboot {
530 compatible = "syscon-reboot";
531 regmap = <&sysctl>;
532 offset = <K210_SYSCTL_SOFT_RESET>;
533 mask = <1>;
534 value = <1>;
535 };
536 };
537
538 aes0: aes@50450000 {
539 compatible = "kendryte,k210-aes";
540 reg = <0x50450000 0x100>;
541 clocks = <&sysclk K210_CLK_AES>;
542 resets = <&sysrst K210_RST_AES>;
543 status = "disabled";
544 };
545
546 rtc: rtc@50460000 {
547 compatible = "kendryte,k210-rtc";
548 reg = <0x50460000 0x100>;
549 clocks = <&in0>;
550 resets = <&sysrst K210_RST_RTC>;
551 interrupts = <20>;
552 status = "disabled";
553 };
554 };
555
556 apb2: bus@52000000 {
557 #address-cells = <1>;
558 #size-cells = <1>;
559 compatible = "kendryte,k210-apb", "simple-pm-bus";
560 ranges;
561 clocks = <&sysclk K210_CLK_APB2>;
562
563 spi0: spi@52000000 {
564 #address-cells = <1>;
565 #size-cells = <0>;
Sean Andersonfd9571a2020-10-16 18:57:50 -0400566 compatible = "canaan,kendryte-k210-spi",
567 "snps,dw-apb-ssi-4.01",
Sean Andersond11b5822020-06-24 06:41:23 -0400568 "snps,dw-apb-ssi";
569 reg = <0x52000000 0x100>;
570 interrupts = <1>;
571 clocks = <&sysclk K210_CLK_SPI0>;
572 clock-names = "ssi_clk";
573 resets = <&sysrst K210_RST_SPI0>;
574 spi-max-frequency = <25000000>;
575 num-cs = <4>;
576 reg-io-width = <4>;
577 status = "disabled";
578 };
579
580 spi1: spi@53000000 {
581 #address-cells = <1>;
582 #size-cells = <0>;
Sean Andersonfd9571a2020-10-16 18:57:50 -0400583 compatible = "canaan,kendryte-k210-spi",
584 "snps,dw-apb-ssi-4.01",
Sean Andersond11b5822020-06-24 06:41:23 -0400585 "snps,dw-apb-ssi";
586 reg = <0x53000000 0x100>;
587 interrupts = <2>;
588 clocks = <&sysclk K210_CLK_SPI1>;
589 clock-names = "ssi_clk";
590 resets = <&sysrst K210_RST_SPI1>;
591 spi-max-frequency = <25000000>;
592 num-cs = <4>;
593 reg-io-width = <4>;
594 status = "disabled";
595 };
596
597 spi3: spi@54000000 {
598 #address-cells = <1>;
599 #size-cells = <0>;
Sean Andersonfd9571a2020-10-16 18:57:50 -0400600 compatible = "canaan,kendryte-k210-ssi",
601 "snps,dwc-ssi-1.01a";
Sean Andersond11b5822020-06-24 06:41:23 -0400602 reg = <0x54000000 0x200>;
603 interrupts = <4>;
604 clocks = <&sysclk K210_CLK_SPI3>;
605 clock-names = "ssi_clk";
606 resets = <&sysrst K210_RST_SPI3>;
607 /* Could possibly go up to 200 MHz */
608 spi-max-frequency = <100000000>;
609 num-cs = <4>;
610 reg-io-width = <4>;
611 status = "disabled";
612 };
613 };
614 };
615};