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git01.mediatek.com / filogic / uboot / 7ba3bf61a156710f898c257916dff14f3256951c / . / arch / arm / dts / k3-am65-wakeup.dtsi
blob: fd2b998ebddc4c0dc88dcea0c81a08a9f2a38046 [file] [log] [blame]
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
4 *
Lokesh Vutla462275c2021-02-01 11:26:39 +0530[diff] [blame]5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]6 */
7
8&cbass_wakeup {
Tom Rinif8276452021-09-10 17:37:43 -0400[diff] [blame]9 dmsc: system-controller@44083000 {
Grygorii Strashkod64c5b22019-02-05 17:31:21 +0530[diff] [blame]10 compatible = "ti,am654-sci";
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]11 ti,host-id = <12>;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]12
13 mbox-names = "rx", "tx";
14
Bryan Brattloffd1fe632023-12-29 11:47:01 -0600[diff] [blame]15 mboxes = <&secure_proxy_main 11>,
16 <&secure_proxy_main 13>;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]17
Tom Rinif8276452021-09-10 17:37:43 -0400[diff] [blame]18 reg-names = "debug_messages";
19 reg = <0x44083000 0x1000>;
20
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
Lokesh Vutla61ff6a32019-06-07 19:24:47 +0530[diff] [blame]23 #power-domain-cells = <2>;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]24 };
25
Tom Rinif8276452021-09-10 17:37:43 -0400[diff] [blame]26 k3_clks: clock-controller {
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]27 compatible = "ti,k2g-sci-clk";
28 #clock-cells = <2>;
29 };
30
31 k3_reset: reset-controller {
32 compatible = "ti,sci-reset";
33 #reset-cells = <2>;
34 };
35 };
36
Lokesh Vutla462275c2021-02-01 11:26:39 +0530[diff] [blame]37 chipid@43000014 {
38 compatible = "ti,am654-chipid";
39 reg = <0x43000014 0x4>;
40 };
41
42 wkup_pmx0: pinctrl@4301c000 {
Andreas Dannenberg9976b862019-06-04 18:08:13 -0500[diff] [blame]43 compatible = "pinctrl-single";
44 reg = <0x4301c000 0x118>;
45 #pinctrl-cells = <1>;
46 pinctrl-single,register-width = <32>;
47 pinctrl-single,function-mask = <0xffffffff>;
48 };
49
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]50 wkup_uart0: serial@42300000 {
51 compatible = "ti,am654-uart";
52 reg = <0x42300000 0x100>;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]53 interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
54 clock-frequency = <48000000>;
55 current-speed = <115200>;
Lokesh Vutla462275c2021-02-01 11:26:39 +0530[diff] [blame]56 power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
Bryan Brattloffd1fe632023-12-29 11:47:01 -0600[diff] [blame]57 status = "disabled";
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]58 };
Andreas Dannenberge3179be2019-06-04 18:08:14 -0500[diff] [blame]59
60 wkup_i2c0: i2c@42120000 {
61 compatible = "ti,am654-i2c", "ti,omap4-i2c";
62 reg = <0x42120000 0x100>;
63 interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
64 #address-cells = <1>;
65 #size-cells = <0>;
66 clock-names = "fck";
67 clocks = <&k3_clks 115 1>;
Lokesh Vutla61ff6a32019-06-07 19:24:47 +0530[diff] [blame]68 power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
Bryan Brattloffd1fe632023-12-29 11:47:01 -0600[diff] [blame]69 status = "disabled";
Andreas Dannenberge3179be2019-06-04 18:08:14 -0500[diff] [blame]70 };
Dave Gerlachc70c4962020-07-15 23:40:00 -0500[diff] [blame]71
Tom Rinif8276452021-09-10 17:37:43 -0400[diff] [blame]72 intr_wkup_gpio: interrupt-controller@42200000 {
Lokesh Vutla462275c2021-02-01 11:26:39 +0530[diff] [blame]73 compatible = "ti,sci-intr";
Tom Rinif8276452021-09-10 17:37:43 -0400[diff] [blame]74 reg = <0x42200000 0x200>;
Lokesh Vutla462275c2021-02-01 11:26:39 +0530[diff] [blame]75 ti,intr-trigger-type = <1>;
76 interrupt-controller;
77 interrupt-parent = <&gic500>;
78 #interrupt-cells = <1>;
79 ti,sci = <&dmsc>;
80 ti,sci-dev-id = <156>;
81 ti,interrupt-ranges = <0 712 16>;
82 };
83
84 wkup_gpio0: gpio@42110000 {
85 compatible = "ti,am654-gpio", "ti,keystone-gpio";
86 reg = <0x42110000 0x100>;
87 gpio-controller;
88 #gpio-cells = <2>;
89 interrupt-parent = <&intr_wkup_gpio>;
90 interrupts = <60>, <61>, <62>, <63>;
91 interrupt-controller;
92 #interrupt-cells = <2>;
93 ti,ngpio = <56>;
94 ti,davinci-gpio-unbanked = <0>;
95 clocks = <&k3_clks 59 0>;
96 clock-names = "gpio";
97 };
98
99 wkup_vtm0: temperature-sensor@42050000 {
100 compatible = "ti,am654-vtm";
101 reg = <0x42050000 0x25c>;
102 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
103 #thermal-sensor-cells = <1>;
104 };
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame]105};