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git01.mediatek.com / filogic / uboot / 7b38e310e77598bfe9f951293b904e286944c9e0 / . / configs / axs101_defconfig
blob: 8ab5addf90efac813e09032cee407799bf4238d0 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARC=y
Vlad Zakharova7a67492017-03-21 14:49:48 +0300[diff] [blame]2CONFIG_TARGET_AXS101=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]3CONFIG_TEXT_BASE=0x81000000
Tom Rinie065fb12021-08-28 21:34:49 -0400[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x0200000
Tom Rini324cf142022-04-07 12:33:23 -0400[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x400
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]6CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
7CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]8CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="axs101"
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]10CONFIG_SYS_BOOTM_LEN=0x8000000
11CONFIG_SYS_LOAD_ADDR=0x82000000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]12CONFIG_DEBUG_UART_BASE=0xe0022000
13CONFIG_DEBUG_UART_CLOCK=33333333
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]14CONFIG_SYS_CLK_FREQ=750000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]15CONFIG_DEBUG_UART=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]16CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]17CONFIG_USE_BOOTARGS=y
18CONFIG_BOOTARGS="console=ttyS3,115200n8"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]19CONFIG_SYS_CBSIZE=256
20CONFIG_SYS_PBSIZE=278
Simon Glasscb2d4322019-01-11 18:37:06 -0700[diff] [blame]21CONFIG_BOARD_TYPES=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]22CONFIG_BOARD_EARLY_INIT_F=y
Eugeniy Paltseva90b8cc2018-04-17 17:15:31 +0300[diff] [blame]23CONFIG_HUSH_PARSER=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]24CONFIG_SYS_PROMPT="AXS# "
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]25CONFIG_CMD_MMC=y
Eugeniy Paltsevc96cafb2018-06-08 18:52:14 +0300[diff] [blame]26CONFIG_CMD_SPI=y
Alexey Brodkine4125bd2015-11-30 20:53:25 +0300[diff] [blame]27CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]28# CONFIG_CMD_SETEXPR is not set
Alexey Brodkin56d9cb12015-11-10 19:16:25 +0300[diff] [blame]29CONFIG_CMD_DHCP=y
30CONFIG_CMD_PING=y
Alexey Brodkin95ab5e72017-04-18 21:24:14 +0300[diff] [blame]31CONFIG_CMD_EXT2=y
32CONFIG_CMD_EXT4=y
33CONFIG_CMD_EXT4_WRITE=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]34CONFIG_CMD_FAT=y
Alexey Brodkin56d9cb12015-11-10 19:16:25 +0300[diff] [blame]35CONFIG_OF_CONTROL=y
36CONFIG_OF_EMBED=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]37CONFIG_ENV_IS_IN_FAT=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]38CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]39CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]40CONFIG_USE_BOOTFILE=y
41CONFIG_BOOTFILE="uImage"
Alexey Brodkin56d9cb12015-11-10 19:16:25 +0300[diff] [blame]42CONFIG_NET_RANDOM_ETHADDR=y
Eugeniy Paltsevc96cafb2018-06-08 18:52:14 +0300[diff] [blame]43CONFIG_HSDK_CREG_GPIO=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]44CONFIG_MMC=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]45CONFIG_MMC_DW=y
Eugeniy Paltsev5b56b222019-10-08 19:45:01 +0300[diff] [blame]46CONFIG_MMC_DW_SNPS=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]47CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]48CONFIG_DM_SPI_FLASH=y
Eugeniy Paltsevc96cafb2018-06-08 18:52:14 +0300[diff] [blame]49CONFIG_SPI_FLASH_STMICRO=y
50CONFIG_SPI_FLASH_MTD=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]51CONFIG_PHY_GIGE=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]52CONFIG_ETH_DESIGNWARE=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]53CONFIG_MII=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]54CONFIG_DM_SERIAL=y
Eugeniy Paltsev1ee6a7c2018-05-03 15:01:59 +0300[diff] [blame]55CONFIG_DEBUG_UART_SHIFT=2
56CONFIG_DEBUG_UART_ANNOUNCE=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]57CONFIG_SYS_NS16550=y
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]58CONFIG_SYS_NS16550_MEM32=y
Eugeniy Paltsevc96cafb2018-06-08 18:52:14 +0300[diff] [blame]59CONFIG_SPI=y
60CONFIG_DM_SPI=y
61CONFIG_DESIGNWARE_SPI=y
Alexey Brodkine4125bd2015-11-30 20:53:25 +0300[diff] [blame]62CONFIG_USB=y
Alexey Brodkine4125bd2015-11-30 20:53:25 +0300[diff] [blame]63CONFIG_USB_EHCI_HCD=y
64CONFIG_USB_EHCI_GENERIC=y
65CONFIG_USB_STORAGE=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]66CONFIG_USE_PRIVATE_LIBGCC=y