blob: 1af7f169893247a7e6dfe4e899e65ada0bae2813 [file] [log] [blame]
Michael Schwingend9fe6cc2011-05-23 00:00:09 +02001/*
2 * (C) Copyright 2009
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the
6 * dLAN200 AV Wireless G ("dvlhost") board.
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Michael Schwingend9fe6cc2011-05-23 00:00:09 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#define CONFIG_IXP425 1
15#define CONFIG_DVLHOST 1
16
Marek Vasutf0ed2fb2012-03-06 00:45:35 +010017#define CONFIG_MACH_TYPE 1343
18
Michael Schwingend9fe6cc2011-05-23 00:00:09 +020019#define CONFIG_DISPLAY_CPUINFO 1
20#define CONFIG_DISPLAY_BOARDINFO 1
21
22#define CONFIG_IXP_SERIAL
23#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
24#define CONFIG_BAUDRATE 115200
25#define CONFIG_BOOTDELAY 3
26#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
27#define CONFIG_BOARD_EARLY_INIT_F 1
28#define CONFIG_SYS_LDSCRIPT "board/dvlhost/u-boot.lds"
29
30/***************************************************************
31 * U-boot generic defines start here.
32 ***************************************************************/
33/* Size of malloc() pool */
34#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
35
36/* allow to overwrite serial and ethaddr */
37#define CONFIG_ENV_OVERWRITE
38
39/* Command line configuration. */
40#include <config_cmd_default.h>
41
42#define CONFIG_CMD_ELF
43#define CONFIG_PCI
44#ifdef CONFIG_PCI
45#define CONFIG_CMD_PCI
46#define CONFIG_PCI_PNP
47#define CONFIG_IXP_PCI
48#define CONFIG_PCI_SCAN_SHOW
49#define CONFIG_CMD_PCI_ENUM
50#endif
51
52#define CONFIG_BOOTCOMMAND "run boot_flash"
53/* enable passing of ATAGs */
54#define CONFIG_CMDLINE_TAG 1
55#define CONFIG_SETUP_MEMORY_TAGS 1
56#define CONFIG_INITRD_TAG 1
57
58#if defined(CONFIG_CMD_KGDB)
59# define CONFIG_KGDB_BAUDRATE 230400
Michael Schwingend9fe6cc2011-05-23 00:00:09 +020060#endif
61
62/* Miscellaneous configurable options */
63#define CONFIG_SYS_LONGHELP
Michael Schwingend9fe6cc2011-05-23 00:00:09 +020064/* Console I/O Buffer Size */
65#define CONFIG_SYS_CBSIZE 256
66/* Print Buffer Size */
67#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
68/* max number of command args */
69#define CONFIG_SYS_MAXARGS 16
70/* Boot Argument Buffer Size */
71#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
72
73#define CONFIG_SYS_MEMTEST_START 0x00000000
74#define CONFIG_SYS_MEMTEST_END 0x01D80000
75
76/* timer clock - 2* OSC_IN system clock */
77#define CONFIG_IXP425_TIMER_CLK 66666666
Michael Schwingend9fe6cc2011-05-23 00:00:09 +020078
79/* default load address */
80#define CONFIG_SYS_LOAD_ADDR 0x00010000
81
82/* valid baudrates */
83#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
84 115200, 230400 }
85#define CONFIG_SERIAL_RTS_ACTIVE 1
86
Michael Schwingend9fe6cc2011-05-23 00:00:09 +020087/* Expansion bus settings */
88#define CONFIG_SYS_EXP_CS0 0xbd113442
89
90/* SDRAM settings */
91#define CONFIG_NR_DRAM_BANKS 1
92#define PHYS_SDRAM_1 0x00000000
93#define CONFIG_SYS_SDRAM_BASE 0x00000000
94
95/* 32MB SDRAM: 2* 8Mx16, CL3 */
96#define CONFIG_SYS_SDR_CONFIG 0x18
97#define PHYS_SDRAM_1_SIZE 0x02000000
98#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x800
99#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
100#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE
101
102/* FLASH organization: one Spansion S29AL032D-04 Flash */
103#define CONFIG_SYS_TEXT_BASE 0x50000000
104#define CONFIG_SYS_MAX_FLASH_BANKS 1
105/* max number of sectors on one chip */
106#define CONFIG_SYS_MAX_FLASH_SECT 140
107#define PHYS_FLASH_1 0x50000000
108#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
109
110#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
111#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
112#define CONFIG_SYS_MONITOR_LEN (256 << 10)
113#define CONFIG_BOARD_SIZE_LIMIT 262144
114
115/* Use common CFI driver */
116#define CONFIG_SYS_FLASH_CFI
117#define CONFIG_FLASH_CFI_DRIVER
118/* no byte writes on IXP4xx */
119#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
120
121/* print 'E' for empty sector on flinfo */
122#define CONFIG_SYS_FLASH_EMPTY_INFO
123
124/* Ethernet */
125
126/* include IXP4xx NPE support */
127#define CONFIG_IXP4XX_NPE 1
128
Michael Schwingend9fe6cc2011-05-23 00:00:09 +0200129/* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */
130#define CONFIG_PHY_ADDR 0x18
131/* NPE1 PHY: MII IP175 switch, port 5 is host port */
132#define CONFIG_PHY1_ADDR 0x05
133/* MII PHY management */
134#define CONFIG_MII 1
135/* fixed-speed powerline modem without standard PHY registers on MII */
136#define CONFIG_MII_NPE0_FIXEDLINK 1
137#define CONFIG_MII_NPE0_SPEED 100
138#define CONFIG_MII_NPE0_FULLDUPLEX 1
139/* fixed-speed switch without standard PHY registers on MII */
140#define CONFIG_MII_NPE1_FIXEDLINK 1
141#define CONFIG_MII_NPE1_SPEED 100
142#define CONFIG_MII_NPE1_FULLDUPLEX 1
143
144/* Number of ethernet rx buffers & descriptors */
145#define CONFIG_SYS_RX_ETH_BUFFER 16
146#define CONFIG_RESET_PHY_R 1
147/* ethernet switch connected to MII port */
148#define CONFIG_MII_ETHSWITCH 1
149#define CONFIG_HAS_ETH1 1
150
151#define CONFIG_CMD_DHCP
152#define CONFIG_CMD_NET
153#define CONFIG_CMD_MII
154#define CONFIG_CMD_PING
155#undef CONFIG_CMD_NFS
156
157/* BOOTP options */
158#define CONFIG_BOOTP_BOOTFILESIZE
159#define CONFIG_BOOTP_BOOTPATH
160#define CONFIG_BOOTP_GATEWAY
161#define CONFIG_BOOTP_HOSTNAME
162
163/* Cache Configuration */
164#define CONFIG_SYS_CACHELINE_SIZE 32
165
166/*
167 * environment organization:
168 * one flash sector, embedded in uboot area (bottom bootblock flash)
169 */
170#define CONFIG_ENV_IS_IN_FLASH 1
171#define CONFIG_ENV_SIZE 0x2000
172#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
173#define CONFIG_SYS_USE_PPCENV 1
174
175#define CONFIG_EXTRA_ENV_SETTINGS \
176 "npe_ucode=50040000\0" \
177 "ethprime=NPE1\0" \
178 "ethrotate=no\0" \
179 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \
180 "kerneladdr=50050000\0" \
181 "kernelfile=dvlhost/uImage\0" \
182 "rootfile=dvlhost/rootfs\0" \
183 "rootaddr=50170000\0" \
184 "loadaddr=10000\0" \
185 "updateboot_ser=mw.b 10000 ff 40000;" \
186 " loady ${loadaddr};" \
187 " run eraseboot writeboot\0" \
188 "updateboot_net=mw.b 10000 ff 40000;" \
189 " tftp ${loadaddr} dvlhost/u-boot.bin;" \
190 " run eraseboot writeboot\0" \
191 "eraseboot=protect off 50000000 50003fff;" \
192 " protect off 50006000 5003ffff;" \
193 " erase 50000000 50003fff;" \
194 " erase 50006000 5003ffff\0" \
195 "writeboot=cp.b 10000 50000000 4000;" \
196 " cp.b 16000 50006000 3a000\0" \
197 "updateucode=loady;" \
198 " era ${npe_ucode} +${filesize};" \
199 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
200 "updateroot=tftp ${loadaddr} ${rootfile};" \
201 " era ${rootaddr} +${filesize};" \
202 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
203 "updatekern=tftp ${loadaddr} ${kernelfile};" \
204 " era ${kerneladdr} +${filesize};" \
205 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
206 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
207 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
208 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
209 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
210 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
211 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
212 "boot_flash=run flashargs addtty addeth;" \
213 " bootm ${kerneladdr}\0" \
214 "boot_net=run netargs addtty addeth;" \
215 " tftpboot ${loadaddr} ${kernelfile};" \
216 " bootm\0"
217
218/* additions for new relocation code, must be added to all boards */
219#define CONFIG_SYS_INIT_SP_ADDR \
220 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
221
222#endif /* __CONFIG_H */