blob: 77f6aafe3d937d737e339b51941993692f37e337 [file] [log] [blame]
York Sun7b08d212014-06-23 15:15:56 -07001/*
2 * Copyright 2014 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __DDR_H__
8#define __DDR_H__
9struct board_specific_parameters {
10 u32 n_ranks;
11 u32 datarate_mhz_high;
12 u32 rank_gb;
13 u32 clk_adjust;
14 u32 wrlvl_start;
15 u32 wrlvl_ctl_2;
16 u32 wrlvl_ctl_3;
17};
18
19/*
20 * These tables contain all valid speeds we want to override with board
21 * specific parameters. datarate_mhz_high values need to be in ascending order
22 * for each n_ranks group.
23 */
24
25static const struct board_specific_parameters udimm0[] = {
26 /*
27 * memory controller 0
28 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
29 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
30 */
31 {2, 2140, 0, 4, 4, 0x0, 0x0},
32 {1, 2140, 0, 4, 4, 0x0, 0x0},
33 {}
34};
35
36static const struct board_specific_parameters rdimm0[] = {
37 /*
38 * memory controller 0
39 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
40 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
41 */
42 {4, 2140, 0, 5, 4, 0x0, 0x0},
43 {2, 2140, 0, 5, 4, 0x0, 0x0},
44 {1, 2140, 0, 4, 4, 0x0, 0x0},
45 {}
46};
47
48static const struct board_specific_parameters *udimms[] = {
49 udimm0,
50};
51
52static const struct board_specific_parameters *rdimms[] = {
53 rdimm0,
54};
55
56
57#endif