Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 7ad2aa081a46b0f5961045c11176968d85d9f9de / . / arch / arm / dts / at91sam9261.dtsi
blob: 5e09de4eb9cdf12fdaa9c79c714b5212ab851be5 [file] [log] [blame]
Heiko Schocherefe04192016-05-25 07:23:46 +0200[diff] [blame]1/*
2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3 *
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 ssc2 = &ssc2;
33 };
34
35 cpus {
36 #address-cells = <0>;
37 #size-cells = <0>;
38
39 cpu {
40 compatible = "arm,arm926ej-s";
41 device_type = "cpu";
42 };
43 };
44
45 memory {
46 reg = <0x20000000 0x08000000>;
47 };
48
49 clocks {
50 main_xtal: main_xtal {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61 };
62
63 sram: sram@00300000 {
64 compatible = "mmio-sram";
65 reg = <0x00300000 0x28000>;
66 };
67
68 ahb {
69 compatible = "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 ranges;
73
74 usb0: ohci@00500000 {
75 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
76 reg = <0x00500000 0x100000>;
77 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
78 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
79 clock-names = "ohci_clk", "hclk", "uhpck";
80 status = "disabled";
81 };
82
83 fb0: fb@0x00600000 {
84 compatible = "atmel,at91sam9261-lcdc";
85 reg = <0x00600000 0x1000>;
86 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_fb>;
89 clocks = <&lcd_clk>, <&hclk1>;
90 clock-names = "lcdc_clk", "hclk";
91 status = "disabled";
92 };
93
94 nand0: nand@40000000 {
95 compatible = "atmel,at91rm9200-nand";
96 #address-cells = <1>;
97 #size-cells = <1>;
98 reg = <0x40000000 0x10000000>;
99 atmel,nand-addr-offset = <22>;
100 atmel,nand-cmd-offset = <21>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_nand>;
103
104 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
105 <&pioC 14 GPIO_ACTIVE_HIGH>,
106 <0>;
107 status = "disabled";
108 };
109
110 apb {
111 compatible = "simple-bus";
112 #address-cells = <1>;
113 #size-cells = <1>;
114 ranges;
115
116 tcb0: timer@fffa0000 {
117 compatible = "atmel,at91rm9200-tcb";
118 reg = <0xfffa0000 0x100>;
119 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
120 <18 IRQ_TYPE_LEVEL_HIGH 0>,
121 <19 IRQ_TYPE_LEVEL_HIGH 0>;
122 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
123 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
124 };
125
126 usb1: gadget@fffa4000 {
127 compatible = "atmel,at91sam9261-udc";
128 reg = <0xfffa4000 0x4000>;
129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
130 clocks = <&udc_clk>, <&udpck>;
131 clock-names = "pclk", "hclk";
132 atmel,matrix = <&matrix>;
133 status = "disabled";
134 };
135
136 mmc0: mmc@fffa8000 {
137 compatible = "atmel,hsmci";
138 reg = <0xfffa8000 0x600>;
139 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
142 #address-cells = <1>;
143 #size-cells = <0>;
144 clocks = <&mci0_clk>;
145 clock-names = "mci_clk";
146 status = "disabled";
147 };
148
149 i2c0: i2c@fffac000 {
150 compatible = "atmel,at91sam9261-i2c";
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_i2c_twi>;
153 reg = <0xfffac000 0x100>;
154 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 clocks = <&twi0_clk>;
158 status = "disabled";
159 };
160
161 usart0: serial@fffb0000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xfffb0000 0x200>;
164 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
165 atmel,use-dma-rx;
166 atmel,use-dma-tx;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_usart0>;
169 clocks = <&usart0_clk>;
170 clock-names = "usart";
171 status = "disabled";
172 };
173
174 usart1: serial@fffb4000 {
175 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfffb4000 0x200>;
177 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
178 atmel,use-dma-rx;
179 atmel,use-dma-tx;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_usart1>;
182 clocks = <&usart1_clk>;
183 clock-names = "usart";
184 status = "disabled";
185 };
186
187 usart2: serial@fffb8000{
188 compatible = "atmel,at91sam9260-usart";
189 reg = <0xfffb8000 0x200>;
190 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
191 atmel,use-dma-rx;
192 atmel,use-dma-tx;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_usart2>;
195 clocks = <&usart2_clk>;
196 clock-names = "usart";
197 status = "disabled";
198 };
199
200 ssc0: ssc@fffbc000 {
201 compatible = "atmel,at91rm9200-ssc";
202 reg = <0xfffbc000 0x4000>;
203 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
206 clocks = <&ssc0_clk>;
207 clock-names = "pclk";
208 status = "disabled";
209 };
210
211 ssc1: ssc@fffc0000 {
212 compatible = "atmel,at91rm9200-ssc";
213 reg = <0xfffc0000 0x4000>;
214 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
217 clocks = <&ssc1_clk>;
218 clock-names = "pclk";
219 status = "disabled";
220 };
221
222 ssc2: ssc@fffc4000 {
223 compatible = "atmel,at91rm9200-ssc";
224 reg = <0xfffc4000 0x4000>;
225 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
228 clocks = <&ssc2_clk>;
229 clock-names = "pclk";
230 status = "disabled";
231 };
232
233 spi0: spi@fffc8000 {
234 #address-cells = <1>;
235 #size-cells = <0>;
236 compatible = "atmel,at91rm9200-spi";
237 reg = <0xfffc8000 0x200>;
238 cs-gpios = <0>, <0>, <0>, <0>;
239 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_spi0>;
242 clocks = <&spi0_clk>;
243 clock-names = "spi_clk";
244 status = "disabled";
245 };
246
247 spi1: spi@fffcc000 {
248 #address-cells = <1>;
249 #size-cells = <0>;
250 compatible = "atmel,at91rm9200-spi";
251 reg = <0xfffcc000 0x200>;
252 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_spi1>;
255 clocks = <&spi1_clk>;
256 clock-names = "spi_clk";
257 status = "disabled";
258 };
259
260 ramc: ramc@ffffea00 {
261 compatible = "atmel,at91sam9260-sdramc";
262 reg = <0xffffea00 0x200>;
263 };
264
265 matrix: matrix@ffffee00 {
266 compatible = "atmel,at91sam9260-bus-matrix", "syscon";
267 reg = <0xffffee00 0x200>;
268 };
269
270 aic: interrupt-controller@fffff000 {
271 #interrupt-cells = <3>;
272 compatible = "atmel,at91rm9200-aic";
273 interrupt-controller;
274 reg = <0xfffff000 0x200>;
275 atmel,external-irqs = <29 30 31>;
276 };
277
278 dbgu: serial@fffff200 {
279 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
280 reg = <0xfffff200 0x200>;
281 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_dbgu>;
284 clocks = <&mck>;
285 clock-names = "usart";
286 status = "disabled";
287 };
288
289 pinctrl@fffff400 {
290 #address-cells = <1>;
291 #size-cells = <1>;
292 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
293 ranges = <0xfffff400 0xfffff400 0x600>;
294
295 atmel,mux-mask =
296 /* A B */
297 <0xffffffff 0xfffffff7>, /* pioA */
298 <0xffffffff 0xfffffff4>, /* pioB */
299 <0xffffffff 0xffffff07>; /* pioC */
300
301 /* shared pinctrl settings */
302 dbgu {
303 pinctrl_dbgu: dbgu-0 {
304 atmel,pins =
305 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
306 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
307 };
308 };
309
310 usart0 {
311 pinctrl_usart0: usart0-0 {
312 atmel,pins =
313 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
314 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
315 };
316
317 pinctrl_usart0_rts: usart0_rts-0 {
318 atmel,pins =
319 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
320 };
321
322 pinctrl_usart0_cts: usart0_cts-0 {
323 atmel,pins =
324 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
325 };
326 };
327
328 usart1 {
329 pinctrl_usart1: usart1-0 {
330 atmel,pins =
331 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
332 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
333 };
334
335 pinctrl_usart1_rts: usart1_rts-0 {
336 atmel,pins =
337 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
338 };
339
340 pinctrl_usart1_cts: usart1_cts-0 {
341 atmel,pins =
342 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
343 };
344 };
345
346 usart2 {
347 pinctrl_usart2: usart2-0 {
348 atmel,pins =
349 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
350 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
351 };
352
353 pinctrl_usart2_rts: usart2_rts-0 {
354 atmel,pins =
355 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
356 };
357
358 pinctrl_usart2_cts: usart2_cts-0 {
359 atmel,pins =
360 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
361 };
362 };
363
364 nand {
365 pinctrl_nand: nand-0 {
366 atmel,pins =
367 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
368 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
369 };
370 };
371
372 mmc0 {
373 pinctrl_mmc0_clk: mmc0_clk-0 {
374 atmel,pins =
375 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
376 };
377
378 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
379 atmel,pins =
380 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
381 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
382 };
383
384 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
385 atmel,pins =
386 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
387 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
388 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
389 };
390 };
391
392 ssc0 {
393 pinctrl_ssc0_tx: ssc0_tx-0 {
394 atmel,pins =
395 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
396 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
397 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
398 };
399
400 pinctrl_ssc0_rx: ssc0_rx-0 {
401 atmel,pins =
402 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
403 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
404 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
405 };
406 };
407
408 ssc1 {
409 pinctrl_ssc1_tx: ssc1_tx-0 {
410 atmel,pins =
411 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
412 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
413 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
414 };
415
416 pinctrl_ssc1_rx: ssc1_rx-0 {
417 atmel,pins =
418 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
419 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
420 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 };
422 };
423
424 ssc2 {
425 pinctrl_ssc2_tx: ssc2_tx-0 {
426 atmel,pins =
427 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
428 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
429 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_ssc2_rx: ssc2_rx-0 {
433 atmel,pins =
434 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
435 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
436 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
437 };
438 };
439
440 spi0 {
441 pinctrl_spi0: spi0-0 {
442 atmel,pins =
443 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
444 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
445 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
446 };
447 };
448
449 spi1 {
450 pinctrl_spi1: spi1-0 {
451 atmel,pins =
452 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
454 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
455 };
456 };
457
458 tcb0 {
459 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
460 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
461 };
462
463 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
464 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
465 };
466
467 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
468 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
469 };
470
471 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
472 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
473 };
474
475 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
476 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
477 };
478
479 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
480 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
481 };
482
483 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
484 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
485 };
486
487 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
488 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
489 };
490
491 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
492 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
493 };
494 };
495
496 i2c0 {
497 pinctrl_i2c_bitbang: i2c-0-bitbang {
498 atmel,pins =
499 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
500 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
501 };
502 pinctrl_i2c_twi: i2c-0-twi {
503 atmel,pins =
504 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
505 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
506 };
507 };
508
509 fb {
510 pinctrl_fb: fb-0 {
511 atmel,pins =
512 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
513 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
514 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
515 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
516 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
517 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
518 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
519 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
520 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
521 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
522 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
523 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
524 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
525 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
526 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
527 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
528 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
529 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
530 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
531 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
532 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
533 };
534 };
535
536 pioA: gpio@fffff400 {
537 compatible = "atmel,at91rm9200-gpio";
538 reg = <0xfffff400 0x200>;
539 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
540 #gpio-cells = <2>;
541 gpio-controller;
542 interrupt-controller;
543 #interrupt-cells = <2>;
544 clocks = <&pioA_clk>;
545 };
546
547 pioB: gpio@fffff600 {
548 compatible = "atmel,at91rm9200-gpio";
549 reg = <0xfffff600 0x200>;
550 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
551 #gpio-cells = <2>;
552 gpio-controller;
553 interrupt-controller;
554 #interrupt-cells = <2>;
555 clocks = <&pioB_clk>;
556 };
557
558 pioC: gpio@fffff800 {
559 compatible = "atmel,at91rm9200-gpio";
560 reg = <0xfffff800 0x200>;
561 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
562 #gpio-cells = <2>;
563 gpio-controller;
564 interrupt-controller;
565 #interrupt-cells = <2>;
566 clocks = <&pioC_clk>;
567 };
568 };
569
570 pmc: pmc@fffffc00 {
571 compatible = "atmel,at91rm9200-pmc", "syscon";
572 reg = <0xfffffc00 0x100>;
573 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
574 interrupt-controller;
575 #address-cells = <1>;
576 #size-cells = <0>;
577 #interrupt-cells = <1>;
578
579 main_osc: main_osc {
580 compatible = "atmel,at91rm9200-clk-main-osc";
581 #clock-cells = <0>;
582 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
583 clocks = <&main_xtal>;
584 };
585
586 main: mainck {
587 compatible = "atmel,at91rm9200-clk-main";
588 #clock-cells = <0>;
589 clocks = <&main_osc>;
590 };
591
592 plla: pllack {
593 compatible = "atmel,at91rm9200-clk-pll";
594 #clock-cells = <0>;
595 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
596 clocks = <&main>;
597 reg = <0>;
598 atmel,clk-input-range = <1000000 32000000>;
599 #atmel,pll-clk-output-range-cells = <4>;
600 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
601 <190000000 240000000 2 1>;
602 };
603
604 pllb: pllbck {
605 compatible = "atmel,at91rm9200-clk-pll";
606 #clock-cells = <0>;
607 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
608 clocks = <&main>;
609 reg = <1>;
610 atmel,clk-input-range = <1000000 5000000>;
611 #atmel,pll-clk-output-range-cells = <4>;
612 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
613 };
614
615 mck: masterck {
616 compatible = "atmel,at91rm9200-clk-master";
617 #clock-cells = <0>;
618 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
619 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
620 atmel,clk-output-range = <0 94000000>;
621 atmel,clk-divisors = <1 2 4 0>;
622 };
623
624 usb: usbck {
625 compatible = "atmel,at91rm9200-clk-usb";
626 #clock-cells = <0>;
627 atmel,clk-divisors = <1 2 4 0>;
628 clocks = <&pllb>;
629 };
630
631 prog: progck {
632 compatible = "atmel,at91rm9200-clk-programmable";
633 #address-cells = <1>;
634 #size-cells = <0>;
635 interrupt-parent = <&pmc>;
636 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
637
638 prog0: prog0 {
639 #clock-cells = <0>;
640 reg = <0>;
641 interrupts = <AT91_PMC_PCKRDY(0)>;
642 };
643
644 prog1: prog1 {
645 #clock-cells = <0>;
646 reg = <1>;
647 interrupts = <AT91_PMC_PCKRDY(1)>;
648 };
649
650 prog2: prog2 {
651 #clock-cells = <0>;
652 reg = <2>;
653 interrupts = <AT91_PMC_PCKRDY(2)>;
654 };
655
656 prog3: prog3 {
657 #clock-cells = <0>;
658 reg = <3>;
659 interrupts = <AT91_PMC_PCKRDY(3)>;
660 };
661 };
662
663 systemck {
664 compatible = "atmel,at91rm9200-clk-system";
665 #address-cells = <1>;
666 #size-cells = <0>;
667
668 uhpck: uhpck {
669 #clock-cells = <0>;
670 reg = <6>;
671 clocks = <&usb>;
672 };
673
674 udpck: udpck {
675 #clock-cells = <0>;
676 reg = <7>;
677 clocks = <&usb>;
678 };
679
680 pck0: pck0 {
681 #clock-cells = <0>;
682 reg = <8>;
683 clocks = <&prog0>;
684 };
685
686 pck1: pck1 {
687 #clock-cells = <0>;
688 reg = <9>;
689 clocks = <&prog1>;
690 };
691
692 pck2: pck2 {
693 #clock-cells = <0>;
694 reg = <10>;
695 clocks = <&prog2>;
696 };
697
698 pck3: pck3 {
699 #clock-cells = <0>;
700 reg = <11>;
701 clocks = <&prog3>;
702 };
703
704 hclk0: hclk0 {
705 #clock-cells = <0>;
706 reg = <16>;
707 clocks = <&mck>;
708 };
709
710 hclk1: hclk1 {
711 #clock-cells = <0>;
712 reg = <17>;
713 clocks = <&mck>;
714 };
715 };
716
717 periphck {
718 compatible = "atmel,at91rm9200-clk-peripheral";
719 #address-cells = <1>;
720 #size-cells = <0>;
721 clocks = <&mck>;
722
723 pioA_clk: pioA_clk {
724 #clock-cells = <0>;
725 reg = <2>;
726 };
727
728 pioB_clk: pioB_clk {
729 #clock-cells = <0>;
730 reg = <3>;
731 };
732
733 pioC_clk: pioC_clk {
734 #clock-cells = <0>;
735 reg = <4>;
736 };
737
738 usart0_clk: usart0_clk {
739 #clock-cells = <0>;
740 reg = <6>;
741 };
742
743 usart1_clk: usart1_clk {
744 #clock-cells = <0>;
745 reg = <7>;
746 };
747
748 usart2_clk: usart2_clk {
749 #clock-cells = <0>;
750 reg = <8>;
751 };
752
753 mci0_clk: mci0_clk {
754 #clock-cells = <0>;
755 reg = <9>;
756 };
757
758 udc_clk: udc_clk {
759 #clock-cells = <0>;
760 reg = <10>;
761 };
762
763 twi0_clk: twi0_clk {
764 reg = <11>;
765 #clock-cells = <0>;
766 };
767
768 spi0_clk: spi0_clk {
769 #clock-cells = <0>;
770 reg = <12>;
771 };
772
773 spi1_clk: spi1_clk {
774 #clock-cells = <0>;
775 reg = <13>;
776 };
777
778 ssc0_clk: ssc0_clk {
779 #clock-cells = <0>;
780 reg = <14>;
781 };
782
783 ssc1_clk: ssc1_clk {
784 #clock-cells = <0>;
785 reg = <15>;
786 };
787
788 ssc2_clk: ssc2_clk {
789 #clock-cells = <0>;
790 reg = <16>;
791 };
792
793 tc0_clk: tc0_clk {
794 #clock-cells = <0>;
795 reg = <17>;
796 };
797
798 tc1_clk: tc1_clk {
799 #clock-cells = <0>;
800 reg = <18>;
801 };
802
803 tc2_clk: tc2_clk {
804 #clock-cells = <0>;
805 reg = <19>;
806 };
807
808 ohci_clk: ohci_clk {
809 #clock-cells = <0>;
810 reg = <20>;
811 };
812
813 lcd_clk: lcd_clk {
814 #clock-cells = <0>;
815 reg = <21>;
816 };
817 };
818 };
819
820 rstc@fffffd00 {
821 compatible = "atmel,at91sam9260-rstc";
822 reg = <0xfffffd00 0x10>;
823 clocks = <&slow_xtal>;
824 };
825
826 shdwc@fffffd10 {
827 compatible = "atmel,at91sam9260-shdwc";
828 reg = <0xfffffd10 0x10>;
829 clocks = <&slow_xtal>;
830 };
831
832 pit: timer@fffffd30 {
833 compatible = "atmel,at91sam9260-pit";
834 reg = <0xfffffd30 0xf>;
835 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
836 clocks = <&mck>;
837 };
838
839 rtc@fffffd20 {
840 compatible = "atmel,at91sam9260-rtt";
841 reg = <0xfffffd20 0x10>;
842 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
843 clocks = <&slow_xtal>;
844 status = "disabled";
845 };
846
847 watchdog@fffffd40 {
848 compatible = "atmel,at91sam9260-wdt";
849 reg = <0xfffffd40 0x10>;
850 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
851 clocks = <&slow_xtal>;
852 status = "disabled";
853 };
854
855 gpbr: syscon@fffffd50 {
856 compatible = "atmel,at91sam9260-gpbr", "syscon";
857 reg = <0xfffffd50 0x10>;
858 status = "disabled";
859 };
860 };
861 };
862
863 i2c@0 {
864 compatible = "i2c-gpio";
865 pinctrl-names = "default";
866 pinctrl-0 = <&pinctrl_i2c_bitbang>;
867 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
868 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
869 i2c-gpio,sda-open-drain;
870 i2c-gpio,scl-open-drain;
871 i2c-gpio,delay-us = <2>; /* ~100 kHz */
872 #address-cells = <1>;
873 #size-cells = <0>;
874 status = "disabled";
875 };
876};