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git01.mediatek.com / filogic / uboot / 7abab270237b50af6d88c2f2c5536c67bfcd5b61 / . / board / adder / u-boot.lds
blob: def2f1f93842f3c237b0f415b34405b32609798e [file] [log] [blame]
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]1/*
2 * (C) Copyright 2001-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * Modified by Yuli Barcohen <yuli@arabellasw.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26OUTPUT_ARCH(powerpc)
27SECTIONS
28{
29 /* Read-only sections, merged into text segment: */
30 . = + SIZEOF_HEADERS;
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]31 .text :
32 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]33 arch/powerpc/cpu/mpc8xx/start.o (.text*)
34 arch/powerpc/cpu/mpc8xx/traps.o (.text*)
35 *(.text*)
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]36 . = ALIGN(16);
Trent Piepho4438e5e2009-02-18 15:22:05 -0800[diff] [blame]37 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]38 }
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]39
40 /* Read-write section, merged into data segment: */
41 . = (. + 0x0FFF) & 0xFFFFF000;
42 _erotext = .;
43 PROVIDE (erotext = .);
44 .reloc :
45 {
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]46 _GOT2_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]47 KEEP(*(.got2))
Joakim Tjernlunda65f8c82011-04-20 14:22:59 +0200[diff] [blame]48 KEEP(*(.got))
49 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]50 _FIXUP_TABLE_ = .;
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]51 KEEP(*(.fixup))
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]52 }
Joakim Tjernlunda65f8c82011-04-20 14:22:59 +0200[diff] [blame]53 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]54 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
55
56 .data :
57 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]58 *(.data*)
59 *(.sdata*)
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]60 }
61 _edata = .;
62 PROVIDE (edata = .);
63
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]64 . = .;
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]65
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]66 . = ALIGN(4);
67 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +0000[diff] [blame]68 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]69 }
70
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]71
Wolfgang Denk5dd2c652005-08-31 12:28:00 +0200[diff] [blame]72 . = .;
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]73 __start___ex_table = .;
74 __ex_table : { *(__ex_table) }
75 __stop___ex_table = .;
76
77 . = ALIGN(4096);
78 __init_begin = .;
79 .text.init : { *(.text.init) }
80 .data.init : { *(.data.init) }
81 . = ALIGN(4096);
82 __init_end = .;
83
84 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]85 .bss (NOLOAD) :
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]86 {
Wolfgang Denke71d99d2010-11-20 15:07:45 +0100[diff] [blame]87 *(.bss*)
88 *(.sbss*)
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]89 *(COMMON)
Selvamuthukumard2454ba2008-10-16 22:54:03 +0530[diff] [blame]90 . = ALIGN(4);
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]91 }
Simon Glassed70c8f2013-03-14 06:54:53 +0000[diff] [blame]92 __bss_end = . ;
wdenk9f664dd2004-06-09 21:50:45 +0000[diff] [blame]93 PROVIDE (end = .);
94}
95ENTRY(_start)