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git01.mediatek.com / filogic / uboot / 7a9b25a9029e35ac68096439bf6a669e05d1f7d6 / . / configs / at91sam9rlek_mmc_defconfig
blob: af7643d4c082951c65bfe3cebe59fbc94fa3c3af [file] [log] [blame]
Wu, Josh7ff194f2015-02-02 17:51:01 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rini340fcdb2015-03-20 10:47:38 -0400[diff] [blame]2CONFIG_ARCH_AT91=y
Wu, Josh7ff194f2015-02-02 17:51:01 +0800[diff] [blame]3CONFIG_TARGET_AT91SAM9RLEK=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]4CONFIG_SYS_MALLOC_F_LEN=0x2000
5CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]6CONFIG_DEBUG_UART=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]7CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC"
Simon Glass5b32e182017-07-23 21:19:47 -0600[diff] [blame]8CONFIG_ENV_IS_IN_FAT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]9CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]10CONFIG_USE_BOOTARGS=y
11CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]12# CONFIG_CONSOLE_MUX is not set
13CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]14# CONFIG_DISPLAY_BOARDINFO is not set
Wu, Josha9b5d1a2015-02-03 18:19:05 +0800[diff] [blame]15CONFIG_HUSH_PARSER=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]16CONFIG_SYS_PROMPT="U-Boot> "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]17# CONFIG_CMD_BDI is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]18CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]19# CONFIG_CMD_IMI is not set
20# CONFIG_CMD_IMLS is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]21# CONFIG_CMD_FPGA is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]22# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]23CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]24CONFIG_CMD_NAND=y
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +0800[diff] [blame]25CONFIG_CMD_SF=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]26# CONFIG_CMD_SOURCE is not set
27# CONFIG_CMD_SETEXPR is not set
28# CONFIG_CMD_NET is not set
29# CONFIG_CMD_NFS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]30CONFIG_CMD_FAT=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]31CONFIG_OF_CONTROL=y
32CONFIG_DM=y
33CONFIG_CLK=y
34CONFIG_CLK_AT91=y
35CONFIG_AT91_UTMI=y
36CONFIG_DM_GPIO=y
37CONFIG_AT91_GPIO=y
38CONFIG_DM_MMC=y
39CONFIG_GENERIC_ATMEL_MCI=y
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +0800[diff] [blame]40CONFIG_DM_SPI_FLASH=y
41CONFIG_SPI_FLASH=y
42CONFIG_SPI_FLASH_ATMEL=y
43CONFIG_SPI_FLASH_DATAFLASH=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]44CONFIG_PINCTRL=y
45CONFIG_PINCTRL_AT91=y
46CONFIG_DM_SERIAL=y
Wenyou Yangde5793e2017-04-18 15:28:29 +0800[diff] [blame]47CONFIG_DEBUG_UART_ATMEL=y
48CONFIG_DEBUG_UART_BASE=0xfffff200
49CONFIG_DEBUG_UART_CLOCK=100000000
50CONFIG_DEBUG_UART_BOARD_INIT=y
51CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]52CONFIG_ATMEL_USART=y
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +0800[diff] [blame]53CONFIG_DM_SPI=y
54CONFIG_ATMEL_SPI=y
Simon Glass169bb3b2016-10-17 20:12:56 -0600[diff] [blame]55CONFIG_LCD=y