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git01.mediatek.com / filogic / uboot / 7a428ccdf53e309024443b2a354190d521b0be8a / . / include / s3c2410.h
blob: abdebc12fbf84060f58cb86ddd384d8cd3f278b1 [file] [log] [blame]
wdenk17759792002-10-26 12:25:34 +0000[diff] [blame]1/************************************************
2 * NAME : s3c2410.h
3 * Version : 3.7.2002
4 *
5 * Based on S3C2410X User's manual Rev 0.1
6 ************************************************/
7
8#ifndef __S3C2410_H__
9#define __S3C2410_H__
10
11
12/* Memory control */
13#define rBWSCON (*(volatile unsigned *)0x48000000)
14#define rBANKCON0 (*(volatile unsigned *)0x48000004)
15#define rBANKCON1 (*(volatile unsigned *)0x48000008)
16#define rBANKCON2 (*(volatile unsigned *)0x4800000C)
17#define rBANKCON3 (*(volatile unsigned *)0x48000010)
18#define rBANKCON4 (*(volatile unsigned *)0x48000014)
19#define rBANKCON5 (*(volatile unsigned *)0x48000018)
20#define rBANKCON6 (*(volatile unsigned *)0x4800001C)
21#define rBANKCON7 (*(volatile unsigned *)0x48000020)
22#define rREFRESH (*(volatile unsigned *)0x48000024)
23#define rBANKSIZE (*(volatile unsigned *)0x48000028)
24#define rMRSRB6 (*(volatile unsigned *)0x4800002C)
25#define rMRSRB7 (*(volatile unsigned *)0x48000030)
26
27
28/* USB HOST */
29#define rHcRevision (*(volatile unsigned *)0x49000000)
30#define rHcControl (*(volatile unsigned *)0x49000004)
31#define rHcCommonStatus (*(volatile unsigned *)0x49000008)
32#define rHcInterruptStatus (*(volatile unsigned *)0x4900000C)
33#define rHcInterruptEnable (*(volatile unsigned *)0x49000010)
34#define rHcInterruptDisable (*(volatile unsigned *)0x49000014)
35#define rHcHCCA (*(volatile unsigned *)0x49000018)
36#define rHcPeriodCuttendED (*(volatile unsigned *)0x4900001C)
37#define rHcControlHeadED (*(volatile unsigned *)0x49000020)
38#define rHcControlCurrentED (*(volatile unsigned *)0x49000024)
39#define rHcBulkHeadED (*(volatile unsigned *)0x49000028)
40#define rHcBuldCurrentED (*(volatile unsigned *)0x4900002C)
41#define rHcDoneHead (*(volatile unsigned *)0x49000030)
42#define rHcRmInterval (*(volatile unsigned *)0x49000034)
43#define rHcFmRemaining (*(volatile unsigned *)0x49000038)
44#define rHcFmNumber (*(volatile unsigned *)0x4900003C)
45#define rHcPeriodicStart (*(volatile unsigned *)0x49000040)
46#define rHcLSThreshold (*(volatile unsigned *)0x49000044)
47#define rHcRhDescriptorA (*(volatile unsigned *)0x49000048)
48#define rHcRhDescriptorB (*(volatile unsigned *)0x4900004C)
49#define rHcRhStatus (*(volatile unsigned *)0x49000050)
50#define rHcRhPortStatus1 (*(volatile unsigned *)0x49000054)
51#define rHcRhPortStatus2 (*(volatile unsigned *)0x49000058)
52
53
54/* INTERRUPT */
55#define rSRCPND (*(volatile unsigned *)0x4A000000)
56#define rINTMOD (*(volatile unsigned *)0x4A000004)
57#define rINTMSK (*(volatile unsigned *)0x4A000008)
58#define rPRIORITY (*(volatile unsigned *)0x4A00000C)
59#define rINTPND (*(volatile unsigned *)0x4A000010)
60#define rINTOFFSET (*(volatile unsigned *)0x4A000014)
61#define rSUBSRCPND (*(volatile unsigned *)0x4A000018)
62#define rINTSUBMSK (*(volatile unsigned *)0x4A00001C)
63
64
65/* DMA */
66#define rDISRC0 (*(volatile unsigned *)0x4B000000)
67#define rDISRCC0 (*(volatile unsigned *)0x4B000004)
68#define rDIDST0 (*(volatile unsigned *)0x4B000008)
69#define rDIDSTC0 (*(volatile unsigned *)0x4B00000C)
70#define rDCON0 (*(volatile unsigned *)0x4B000010)
71#define rDSTAT0 (*(volatile unsigned *)0x4B000014)
72#define rDCSRC0 (*(volatile unsigned *)0x4B000018)
73#define rDCDST0 (*(volatile unsigned *)0x4B00001C)
74#define rDMASKTRIG0 (*(volatile unsigned *)0x4B000020)
75#define rDISRC1 (*(volatile unsigned *)0x4B000040)
76#define rDISRCC1 (*(volatile unsigned *)0x4B000044)
77#define rDIDST1 (*(volatile unsigned *)0x4B000048)
78#define rDIDSTC1 (*(volatile unsigned *)0x4B00004C)
79#define rDCON1 (*(volatile unsigned *)0x4B000050)
80#define rDSTAT1 (*(volatile unsigned *)0x4B000054)
81#define rDCSRC1 (*(volatile unsigned *)0x4B000058)
82#define rDCDST1 (*(volatile unsigned *)0x4B00005C)
83#define rDMASKTRIG1 (*(volatile unsigned *)0x4B000060)
84#define rDISRC2 (*(volatile unsigned *)0x4B000080)
85#define rDISRCC2 (*(volatile unsigned *)0x4B000084)
86#define rDIDST2 (*(volatile unsigned *)0x4B000088)
87#define rDIDSTC2 (*(volatile unsigned *)0x4B00008C)
88#define rDCON2 (*(volatile unsigned *)0x4B000090)
89#define rDSTAT2 (*(volatile unsigned *)0x4B000094)
90#define rDCSRC2 (*(volatile unsigned *)0x4B000098)
91#define rDCDST2 (*(volatile unsigned *)0x4B00009C)
92#define rDMASKTRIG2 (*(volatile unsigned *)0x4B0000A0)
93#define rDISRC3 (*(volatile unsigned *)0x4B0000C0)
94#define rDISRCC3 (*(volatile unsigned *)0x4B0000C4)
95#define rDIDST3 (*(volatile unsigned *)0x4B0000C8)
96#define rDIDSTC3 (*(volatile unsigned *)0x4B0000CC)
97#define rDCON3 (*(volatile unsigned *)0x4B0000D0)
98#define rDSTAT3 (*(volatile unsigned *)0x4B0000D4)
99#define rDCSRC3 (*(volatile unsigned *)0x4B0000D8)
100#define rDCDST3 (*(volatile unsigned *)0x4B0000DC)
101#define rDMASKTRIG3 (*(volatile unsigned *)0x4B0000E0)
102
103
104/* CLOCK & POWER MANAGEMENT */
105#define rLOCKTIME (*(volatile unsigned *)0x4C000000)
106#define rMPLLCON (*(volatile unsigned *)0x4C000004)
107#define rUPLLCON (*(volatile unsigned *)0x4C000008)
108#define rCLKCON (*(volatile unsigned *)0x4C00000C)
109#define rCLKSLOW (*(volatile unsigned *)0x4C000010)
110#define rCLKDIVN (*(volatile unsigned *)0x4C000014)
111
112
113/* LCD CONTROLLER */
114#define rLCDCON1 (*(volatile unsigned *)0x4D000000)
115#define rLCDCON2 (*(volatile unsigned *)0x4D000004)
116#define rLCDCON3 (*(volatile unsigned *)0x4D000008)
117#define rLCDCON4 (*(volatile unsigned *)0x4D00000C)
118#define rLCDCON5 (*(volatile unsigned *)0x4D000010)
119#define rLCDSADDR1 (*(volatile unsigned *)0x4D000014)
120#define rLCDSADDR2 (*(volatile unsigned *)0x4D000018)
121#define rLCDSADDR3 (*(volatile unsigned *)0x4D00001C)
122#define rREDLUT (*(volatile unsigned *)0x4D000020)
123#define rGREENLUT (*(volatile unsigned *)0x4D000024)
124#define rBLUELUT (*(volatile unsigned *)0x4D000028)
125#define rDITHMODE (*(volatile unsigned *)0x4D00004C)
126#define rTPAL (*(volatile unsigned *)0x4D000050)
127#define rLCDINTPND (*(volatile unsigned *)0x4D000054)
128#define rLCDSRCPND (*(volatile unsigned *)0x4D000058)
129#define rLCDINTMSK (*(volatile unsigned *)0x4D00005C)
130
131
132/* NAND FLASH */
133#define rNFCONF (*(volatile unsigned *)0x4E000000)
134#define rNFCMD (*(volatile unsigned *)0x4E000004)
135#define rNFADDR (*(volatile unsigned *)0x4E000008)
136#define rNFDATA (*(volatile unsigned *)0x4E00000C)
137#define rNFSTAT (*(volatile unsigned *)0x4E000010)
138#define rNFECC (*(volatile unsigned *)0x4E000014)
139
140
141/* UART */
142#define rULCON0 (*(volatile unsigned *)0x50000000)
143#define rUCON0 (*(volatile unsigned *)0x50000004)
144#define rUFCON0 (*(volatile unsigned *)0x50000008)
145#define rUMCON0 (*(volatile unsigned *)0x5000000C)
146#define rUTRSTAT0 (*(volatile unsigned *)0x50000010)
147#define rUERSTAT0 (*(volatile unsigned *)0x50000014)
148#define rUFSTAT0 (*(volatile unsigned *)0x50000018)
149#define rUMSTAT0 (*(volatile unsigned *)0x5000001C)
150#define rUBRDIV0 (*(volatile unsigned *)0x50000028)
151
152#define rULCON1 (*(volatile unsigned *)0x50004000)
153#define rUCON1 (*(volatile unsigned *)0x50004004)
154#define rUFCON1 (*(volatile unsigned *)0x50004008)
155#define rUMCON1 (*(volatile unsigned *)0x5000400C)
156#define rUTRSTAT1 (*(volatile unsigned *)0x50004010)
157#define rUERSTAT1 (*(volatile unsigned *)0x50004014)
158#define rUFSTAT1 (*(volatile unsigned *)0x50004018)
159#define rUMSTAT1 (*(volatile unsigned *)0x5000401C)
160#define rUBRDIV1 (*(volatile unsigned *)0x50004028)
161
162#define rULCON2 (*(volatile unsigned *)0x50008000)
163#define rUCON2 (*(volatile unsigned *)0x50008004)
164#define rUFCON2 (*(volatile unsigned *)0x50008008)
165#define rUTRSTAT2 (*(volatile unsigned *)0x50008010)
166#define rUERSTAT2 (*(volatile unsigned *)0x50008014)
167#define rUFSTAT2 (*(volatile unsigned *)0x50008018)
168#define rUBRDIV2 (*(volatile unsigned *)0x50008028)
169
170#ifdef __BIG_ENDIAN
171#define rUTXH0 (*(volatile unsigned char *)0x50000023)
172#define rURXH0 (*(volatile unsigned char *)0x50000027)
173#define rUTXH1 (*(volatile unsigned char *)0x50004023)
174#define rURXH1 (*(volatile unsigned char *)0x50004027)
175#define rUTXH2 (*(volatile unsigned char *)0x50008023)
176#define rURXH2 (*(volatile unsigned char *)0x50008027)
177
178#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000023)=(unsigned char)(ch)
179#define RdURXH0() (*(volatile unsigned char *)0x50000027)
180#define WrUTXH1(ch) (*(volatile unsigned char *)0x50004023)=(unsigned char)(ch)
181#define RdURXH1() (*(volatile unsigned char *)0x50004027)
182#define WrUTXH2(ch) (*(volatile unsigned char *)0x50008023)=(unsigned char)(ch)
183#define RdURXH2() (*(volatile unsigned char *)0x50008027)
184
185#define UTXH0 (0x50000020+3) /* byte_access address by DMA */
186#define URXH0 (0x50000024+3)
187#define UTXH1 (0x50004020+3)
188#define URXH1 (0x50004024+3)
189#define UTXH2 (0x50008020+3)
190#define URXH2 (0x50008024+3)
191
192#else /* Little Endian */
193#define rUTXH0 (*(volatile unsigned char *)0x50000020)
194#define rURXH0 (*(volatile unsigned char *)0x50000024)
195#define rUTXH1 (*(volatile unsigned char *)0x50004020)
196#define rURXH1 (*(volatile unsigned char *)0x50004024)
197#define rUTXH2 (*(volatile unsigned char *)0x50008020)
198#define rURXH2 (*(volatile unsigned char *)0x50008024)
199
200#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000020)=(unsigned char)(ch)
201#define RdURXH0() (*(volatile unsigned char *)0x50000024)
202#define WrUTXH1(ch) (*(volatile unsigned char *)0x50004020)=(unsigned char)(ch)
203#define RdURXH1() (*(volatile unsigned char *)0x50004024)
204#define WrUTXH2(ch) (*(volatile unsigned char *)0x50008020)=(unsigned char)(ch)
205#define RdURXH2() (*(volatile unsigned char *)0x50008024)
206
207#define UTXH0 (0x50000020) /* byte_access address by DMA */
208#define URXH0 (0x50000024)
209#define UTXH1 (0x50004020)
210#define URXH1 (0x50004024)
211#define UTXH2 (0x50008020)
212#define URXH2 (0x50008024)
213#endif
214
215
216/* PWM TIMER */
217#define rTCFG0 (*(volatile unsigned *)0x51000000)
218#define rTCFG1 (*(volatile unsigned *)0x51000004)
219#define rTCON (*(volatile unsigned *)0x51000008)
220#define rTCNTB0 (*(volatile unsigned *)0x5100000C)
221#define rTCMPB0 (*(volatile unsigned *)0x51000010)
222#define rTCNTO0 (*(volatile unsigned *)0x51000014)
223#define rTCNTB1 (*(volatile unsigned *)0x51000018)
224#define rTCMPB1 (*(volatile unsigned *)0x5100001C)
225#define rTCNTO1 (*(volatile unsigned *)0x51000020)
226#define rTCNTB2 (*(volatile unsigned *)0x51000024)
227#define rTCMPB2 (*(volatile unsigned *)0x51000028)
228#define rTCNTO2 (*(volatile unsigned *)0x5100002C)
229#define rTCNTB3 (*(volatile unsigned *)0x51000030)
230#define rTCMPB3 (*(volatile unsigned *)0x51000034)
231#define rTCNTO3 (*(volatile unsigned *)0x51000038)
232#define rTCNTB4 (*(volatile unsigned *)0x5100003C)
233#define rTCNTO4 (*(volatile unsigned *)0x51000040)
234
235
236/* USB DEVICE */
237#ifdef __BIG_ENDIAN
238#define rFUNC_ADDR_REG (*(volatile unsigned char *)0x52000143)
239#define rPWR_REG (*(volatile unsigned char *)0x52000147)
240#define rEP_INT_REG (*(volatile unsigned char *)0x5200014B)
241#define rUSB_INT_REG (*(volatile unsigned char *)0x5200015B)
242#define rEP_INT_EN_REG (*(volatile unsigned char *)0x5200015F)
243#define rUSB_INT_EN_REG (*(volatile unsigned char *)0x5200016F)
244#define rFRAME_NUM1_REG (*(volatile unsigned char *)0x52000173)
245#define rFRAME_NUM2_REG (*(volatile unsigned char *)0x52000177)
246#define rINDEX_REG (*(volatile unsigned char *)0x5200017B)
247#define rMAXP_REG (*(volatile unsigned char *)0x52000183)
248#define rEP0_CSR (*(volatile unsigned char *)0x52000187)
249#define rIN_CSR1_REG (*(volatile unsigned char *)0x52000187)
250#define rIN_CSR2_REG (*(volatile unsigned char *)0x5200018B)
251#define rOUT_CSR1_REG (*(volatile unsigned char *)0x52000193)
252#define rOUT_CSR2_REG (*(volatile unsigned char *)0x52000197)
253#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x5200019B)
254#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019F)
255#define rEP0_FIFO (*(volatile unsigned char *)0x520001C3)
256#define rEP1_FIFO (*(volatile unsigned char *)0x520001C7)
257#define rEP2_FIFO (*(volatile unsigned char *)0x520001CB)
258#define rEP3_FIFO (*(volatile unsigned char *)0x520001CF)
259#define rEP4_FIFO (*(volatile unsigned char *)0x520001D3)
260#define rEP1_DMA_CON (*(volatile unsigned char *)0x52000203)
261#define rEP1_DMA_UNIT (*(volatile unsigned char *)0x52000207)
262#define rEP1_DMA_FIFO (*(volatile unsigned char *)0x5200020B)
263#define rEP1_DMA_TX_LO (*(volatile unsigned char *)0x5200020F)
264#define rEP1_DMA_TX_MD (*(volatile unsigned char *)0x52000213)
265#define rEP1_DMA_TX_HI (*(volatile unsigned char *)0x52000217)
266#define rEP2_DMA_CON (*(volatile unsigned char *)0x5200021B)
267#define rEP2_DMA_UNIT (*(volatile unsigned char *)0x5200021F)
268#define rEP2_DMA_FIFO (*(volatile unsigned char *)0x52000223)
269#define rEP2_DMA_TX_LO (*(volatile unsigned char *)0x52000227)
270#define rEP2_DMA_TX_MD (*(volatile unsigned char *)0x5200022B)
271#define rEP2_DMA_TX_HI (*(volatile unsigned char *)0x5200022F)
272#define rEP3_DMA_CON (*(volatile unsigned char *)0x52000243)
273#define rEP3_DMA_UNIT (*(volatile unsigned char *)0x52000247)
274#define rEP3_DMA_FIFO (*(volatile unsigned char *)0x5200024B)
275#define rEP3_DMA_TX_LO (*(volatile unsigned char *)0x5200024F)
276#define rEP3_DMA_TX_MD (*(volatile unsigned char *)0x52000253)
277#define rEP3_DMA_TX_HI (*(volatile unsigned char *)0x52000257)
278#define rEP4_DMA_CON (*(volatile unsigned char *)0x5200025B)
279#define rEP4_DMA_UNIT (*(volatile unsigned char *)0x5200025F)
280#define rEP4_DMA_FIFO (*(volatile unsigned char *)0x52000263)
281#define rEP4_DMA_TX_LO (*(volatile unsigned char *)0x52000267)
282#define rEP4_DMA_TX_MD (*(volatile unsigned char *)0x5200026B)
283#define rEP4_DMA_TX_HI (*(volatile unsigned char *)0x5200026F)
284#else /* little endian */
285#define rFUNC_ADDR_REG (*(volatile unsigned char *)0x52000140)
286#define rPWR_REG (*(volatile unsigned char *)0x52000144)
287#define rEP_INT_REG (*(volatile unsigned char *)0x52000148)
288#define rUSB_INT_REG (*(volatile unsigned char *)0x52000158)
289#define rEP_INT_EN_REG (*(volatile unsigned char *)0x5200015C)
290#define rUSB_INT_EN_REG (*(volatile unsigned char *)0x5200016C)
291#define rFRAME_NUM1_REG (*(volatile unsigned char *)0x52000170)
292#define rFRAME_NUM2_REG (*(volatile unsigned char *)0x52000174)
293#define rINDEX_REG (*(volatile unsigned char *)0x52000178)
294#define rMAXP_REG (*(volatile unsigned char *)0x52000180)
295#define rEP0_CSR (*(volatile unsigned char *)0x52000184)
296#define rIN_CSR1_REG (*(volatile unsigned char *)0x52000184)
297#define rIN_CSR2_REG (*(volatile unsigned char *)0x52000188)
298#define rOUT_CSR1_REG (*(volatile unsigned char *)0x52000190)
299#define rOUT_CSR2_REG (*(volatile unsigned char *)0x52000194)
300#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x52000198)
301#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019C)
302#define rEP0_FIFO (*(volatile unsigned char *)0x520001C0)
303#define rEP1_FIFO (*(volatile unsigned char *)0x520001C4)
304#define rEP2_FIFO (*(volatile unsigned char *)0x520001C8)
305#define rEP3_FIFO (*(volatile unsigned char *)0x520001CC)
306#define rEP4_FIFO (*(volatile unsigned char *)0x520001D0)
307#define rEP1_DMA_CON (*(volatile unsigned char *)0x52000200)
308#define rEP1_DMA_UNIT (*(volatile unsigned char *)0x52000204)
309#define rEP1_DMA_FIFO (*(volatile unsigned char *)0x52000208)
310#define rEP1_DMA_TX_LO (*(volatile unsigned char *)0x5200020C)
311#define rEP1_DMA_TX_MD (*(volatile unsigned char *)0x52000210)
312#define rEP1_DMA_TX_HI (*(volatile unsigned char *)0x52000214)
313#define rEP2_DMA_CON (*(volatile unsigned char *)0x52000218)
314#define rEP2_DMA_UNIT (*(volatile unsigned char *)0x5200021C)
315#define rEP2_DMA_FIFO (*(volatile unsigned char *)0x52000220)
316#define rEP2_DMA_TX_LO (*(volatile unsigned char *)0x52000224)
317#define rEP2_DMA_TX_MD (*(volatile unsigned char *)0x52000228)
318#define rEP2_DMA_TX_HI (*(volatile unsigned char *)0x5200022C)
319#define rEP3_DMA_CON (*(volatile unsigned char *)0x52000240)
320#define rEP3_DMA_UNIT (*(volatile unsigned char *)0x52000244)
321#define rEP3_DMA_FIFO (*(volatile unsigned char *)0x52000248)
322#define rEP3_DMA_TX_LO (*(volatile unsigned char *)0x5200024C)
323#define rEP3_DMA_TX_MD (*(volatile unsigned char *)0x52000250)
324#define rEP3_DMA_TX_HI (*(volatile unsigned char *)0x52000254)
325#define rEP4_DMA_CON (*(volatile unsigned char *)0x52000258)
326#define rEP4_DMA_UNIT (*(volatile unsigned char *)0x5200025C)
327#define rEP4_DMA_FIFO (*(volatile unsigned char *)0x52000260)
328#define rEP4_DMA_TX_LO (*(volatile unsigned char *)0x52000264)
329#define rEP4_DMA_TX_MD (*(volatile unsigned char *)0x52000268)
330#define rEP4_DMA_TX_HI (*(volatile unsigned char *)0x5200026C)
331#endif /* __BIG_ENDIAN */
332
333/* WATCH DOG TIMER */
334#define rWTCON (*(volatile unsigned *)0x53000000)
335#define rWTDAT (*(volatile unsigned *)0x53000004)
336#define rWTCNT (*(volatile unsigned *)0x53000008)
337
338
339/* IIC */
340#define rIICCON (*(volatile unsigned *)0x54000000)
341#define rIICSTAT (*(volatile unsigned *)0x54000004)
342#define rIICADD (*(volatile unsigned *)0x54000008)
343#define rIICDS (*(volatile unsigned *)0x5400000C)
344
345
346/* IIS */
347#define rIISCON (*(volatile unsigned *)0x55000000)
348#define rIISMOD (*(volatile unsigned *)0x55000004)
349#define rIISPSR (*(volatile unsigned *)0x55000008)
350#define rIISFCON (*(volatile unsigned *)0x5500000C)
351
352#ifdef __BIG_ENDIAN
353#define IISFIF ((volatile unsigned short *)0x55000012)
354#else /* little endian */
355#define IISFIF ((volatile unsigned short *)0x55000010)
356#endif
357
358
359/* I/O PORT */
360#define rGPACON (*(volatile unsigned *)0x56000000)
361#define rGPADAT (*(volatile unsigned *)0x56000004)
362
363#define rGPBCON (*(volatile unsigned *)0x56000010)
364#define rGPBDAT (*(volatile unsigned *)0x56000014)
365#define rGPBUP (*(volatile unsigned *)0x56000018)
366
367#define rGPCCON (*(volatile unsigned *)0x56000020)
368#define rGPCDAT (*(volatile unsigned *)0x56000024)
369#define rGPCUP (*(volatile unsigned *)0x56000028)
370
371#define rGPDCON (*(volatile unsigned *)0x56000030)
372#define rGPDDAT (*(volatile unsigned *)0x56000034)
373#define rGPDUP (*(volatile unsigned *)0x56000038)
374
375#define rGPECON (*(volatile unsigned *)0x56000040)
376#define rGPEDAT (*(volatile unsigned *)0x56000044)
377#define rGPEUP (*(volatile unsigned *)0x56000048)
378
379#define rGPFCON (*(volatile unsigned *)0x56000050)
380#define rGPFDAT (*(volatile unsigned *)0x56000054)
381#define rGPFUP (*(volatile unsigned *)0x56000058)
382
383#define rGPGCON (*(volatile unsigned *)0x56000060)
384#define rGPGDAT (*(volatile unsigned *)0x56000064)
385#define rGPGUP (*(volatile unsigned *)0x56000068)
386
387#define rGPHCON (*(volatile unsigned *)0x56000070)
388#define rGPHDAT (*(volatile unsigned *)0x56000074)
389#define rGPHUP (*(volatile unsigned *)0x56000078)
390
391#define rMISCCR (*(volatile unsigned *)0x56000080)
392#define rDCLKCON (*(volatile unsigned *)0x56000084)
393#define rEXTINT0 (*(volatile unsigned *)0x56000088)
394#define rEXTINT1 (*(volatile unsigned *)0x5600008C)
395#define rEXTINT2 (*(volatile unsigned *)0x56000090)
396#define rEINTFLT0 (*(volatile unsigned *)0x56000094)
397#define rEINTFLT1 (*(volatile unsigned *)0x56000098)
398#define rEINTFLT2 (*(volatile unsigned *)0x5600009C)
399#define rEINTFLT3 (*(volatile unsigned *)0x560000A0)
400#define rEINTMASK (*(volatile unsigned *)0x560000A4)
401#define rEINTPEND (*(volatile unsigned *)0x560000A8)
402#define rGSTATUS0 (*(volatile unsigned *)0x560000AC)
403#define rGSTATUS1 (*(volatile unsigned *)0x560000B0)
404
405
406/* RTC */
407#ifdef __BIG_ENDIAN
408#define rRTCCON (*(volatile unsigned char *)0x57000043)
409#define rTICNT (*(volatile unsigned char *)0x57000047)
410#define rRTCALM (*(volatile unsigned char *)0x57000053)
411#define rALMSEC (*(volatile unsigned char *)0x57000057)
412#define rALMMIN (*(volatile unsigned char *)0x5700005B)
413#define rALMHOUR (*(volatile unsigned char *)0x5700005F)
414#define rALMDATE (*(volatile unsigned char *)0x57000063)
415#define rALMMON (*(volatile unsigned char *)0x57000067)
416#define rALMYEAR (*(volatile unsigned char *)0x5700006B)
417#define rRTCRST (*(volatile unsigned char *)0x5700006F)
418#define rBCDSEC (*(volatile unsigned char *)0x57000073)
419#define rBCDMIN (*(volatile unsigned char *)0x57000077)
420#define rBCDHOUR (*(volatile unsigned char *)0x5700007B)
421#define rBCDDATE (*(volatile unsigned char *)0x5700007F)
422#define rBCDDAY (*(volatile unsigned char *)0x57000083)
423#define rBCDMON (*(volatile unsigned char *)0x57000087)
424#define rBCDYEAR (*(volatile unsigned char *)0x5700008B)
425#else /* little endian */
426#define rRTCCON (*(volatile unsigned char *)0x57000040)
427#define rTICNT (*(volatile unsigned char *)0x57000044)
428#define rRTCALM (*(volatile unsigned char *)0x57000050)
429#define rALMSEC (*(volatile unsigned char *)0x57000054)
430#define rALMMIN (*(volatile unsigned char *)0x57000058)
431#define rALMHOUR (*(volatile unsigned char *)0x5700005C)
432#define rALMDATE (*(volatile unsigned char *)0x57000060)
433#define rALMMON (*(volatile unsigned char *)0x57000064)
434#define rALMYEAR (*(volatile unsigned char *)0x57000068)
435#define rRTCRST (*(volatile unsigned char *)0x5700006C)
436#define rBCDSEC (*(volatile unsigned char *)0x57000070)
437#define rBCDMIN (*(volatile unsigned char *)0x57000074)
438#define rBCDHOUR (*(volatile unsigned char *)0x57000078)
439#define rBCDDATE (*(volatile unsigned char *)0x5700007C)
440#define rBCDDAY (*(volatile unsigned char *)0x57000080)
441#define rBCDMON (*(volatile unsigned char *)0x57000084)
442#define rBCDYEAR (*(volatile unsigned char *)0x57000088)
443#endif
444
445
446/* ADC */
447#define rADCCON (*(volatile unsigned *)0x58000000)
448#define rADCTSC (*(volatile unsigned *)0x58000004)
449#define rADCDLY (*(volatile unsigned *)0x58000008)
450#define rADCDAT0 (*(volatile unsigned *)0x5800000C)
451#define rADCDAT1 (*(volatile unsigned *)0x58000010)
452
453
454/* SPI */
455#define rSPCON0 (*(volatile unsigned *)0x59000000)
456#define rSPSTA0 (*(volatile unsigned *)0x59000004)
457#define rSPPIN0 (*(volatile unsigned *)0x59000008)
458#define rSPPRE0 (*(volatile unsigned *)0x5900000C)
459#define rSPTDAT0 (*(volatile unsigned *)0x59000010)
460#define rSPRDAT0 (*(volatile unsigned *)0x59000014)
461#define rSPCON1 (*(volatile unsigned *)0x59000020)
462#define rSPSTA1 (*(volatile unsigned *)0x59000024)
463#define rSPPIN1 (*(volatile unsigned *)0x59000028)
464#define rSPPRE1 (*(volatile unsigned *)0x5900002C)
465#define rSPTDAT1 (*(volatile unsigned *)0x59000030)
466#define rSPRDAT1 (*(volatile unsigned *)0x59000034)
467
468
469/* SD INTERFACE */
470#define rSDICON (*(volatile unsigned *)0x5A000000)
471#define rSDIPRE (*(volatile unsigned *)0x5A000004)
472#define rSDICmdArg (*(volatile unsigned *)0x5A000008)
473#define rSDICmdCon (*(volatile unsigned *)0x5A00000C)
474#define rSDICmdSta (*(volatile unsigned *)0x5A000010)
475#define rSDIRSP0 (*(volatile unsigned *)0x5A000014)
476#define rSDIRSP1 (*(volatile unsigned *)0x5A000018)
477#define rSDIRSP2 (*(volatile unsigned *)0x5A00001C)
478#define rSDIRSP3 (*(volatile unsigned *)0x5A000020)
479#define rSDIDTimer (*(volatile unsigned *)0x5A000024)
480#define rSDIBSize (*(volatile unsigned *)0x5A000028)
481#define rSDIDatCon (*(volatile unsigned *)0x5A00002C)
482#define rSDIDatCnt (*(volatile unsigned *)0x5A000030)
483#define rSDIDatSta (*(volatile unsigned *)0x5A000034)
484#define rSDIFSTA (*(volatile unsigned *)0x5A000038)
485#ifdef __BIG_ENDIAN
486#define rSDIDAT (*(volatile unsigned char *)0x5A00003F)
487#else
488#define rSDIDAT (*(volatile unsigned char *)0x5A00003C)
489#endif
490#define rSDIIntMsk (*(volatile unsigned *)0x5A000040)
491
492/* ISR */
493#define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0))
494#define pISR_UNDEF (*(unsigned *)(_ISR_STARTADDRESS+0x4))
495#define pISR_SWI (*(unsigned *)(_ISR_STARTADDRESS+0x8))
496#define pISR_PABORT (*(unsigned *)(_ISR_STARTADDRESS+0xC))
497#define pISR_DABORT (*(unsigned *)(_ISR_STARTADDRESS+0x10))
498#define pISR_RESERVED (*(unsigned *)(_ISR_STARTADDRESS+0x14))
499#define pISR_IRQ (*(unsigned *)(_ISR_STARTADDRESS+0x18))
500#define pISR_FIQ (*(unsigned *)(_ISR_STARTADDRESS+0x1C))
501
502#define pISR_EINT0 (*(unsigned *)(_ISR_STARTADDRESS+0x20))
503#define pISR_EINT1 (*(unsigned *)(_ISR_STARTADDRESS+0x24))
504#define pISR_EINT2 (*(unsigned *)(_ISR_STARTADDRESS+0x28))
505#define pISR_EINT3 (*(unsigned *)(_ISR_STARTADDRESS+0x2C))
506#define pISR_EINT4_7 (*(unsigned *)(_ISR_STARTADDRESS+0x30))
507#define pISR_EINT8_23 (*(unsigned *)(_ISR_STARTADDRESS+0x34))
508#define pISR_BAT_FLT (*(unsigned *)(_ISR_STARTADDRESS+0x3C))
509#define pISR_TICK (*(unsigned *)(_ISR_STARTADDRESS+0x40))
510#define pISR_WDT (*(unsigned *)(_ISR_STARTADDRESS+0x44))
511#define pISR_TIMER0 (*(unsigned *)(_ISR_STARTADDRESS+0x48))
512#define pISR_TIMER1 (*(unsigned *)(_ISR_STARTADDRESS+0x4C))
513#define pISR_TIMER2 (*(unsigned *)(_ISR_STARTADDRESS+0x50))
514#define pISR_TIMER3 (*(unsigned *)(_ISR_STARTADDRESS+0x54))
515#define pISR_TIMER4 (*(unsigned *)(_ISR_STARTADDRESS+0x58))
516#define pISR_UART2 (*(unsigned *)(_ISR_STARTADDRESS+0x5C))
517#define pISR_NOTUSED (*(unsigned *)(_ISR_STARTADDRESS+0x60))
518#define pISR_DMA0 (*(unsigned *)(_ISR_STARTADDRESS+0x64))
519#define pISR_DMA1 (*(unsigned *)(_ISR_STARTADDRESS+0x68))
520#define pISR_DMA2 (*(unsigned *)(_ISR_STARTADDRESS+0x6C))
521#define pISR_DMA3 (*(unsigned *)(_ISR_STARTADDRESS+0x70))
522#define pISR_SDI (*(unsigned *)(_ISR_STARTADDRESS+0x74))
523#define pISR_SPI0 (*(unsigned *)(_ISR_STARTADDRESS+0x78))
524#define pISR_UART1 (*(unsigned *)(_ISR_STARTADDRESS+0x7C))
525#define pISR_USBD (*(unsigned *)(_ISR_STARTADDRESS+0x84))
526#define pISR_USBH (*(unsigned *)(_ISR_STARTADDRESS+0x88))
527#define pISR_IIC (*(unsigned *)(_ISR_STARTADDRESS+0x8C))
528#define pISR_UART0 (*(unsigned *)(_ISR_STARTADDRESS+0x90))
529#define pISR_SPI1 (*(unsigned *)(_ISR_STARTADDRESS+0x94))
530#define pISR_RTC (*(unsigned *)(_ISR_STARTADDRESS+0x98))
531#define pISR_ADC (*(unsigned *)(_ISR_STARTADDRESS+0xA0))
532
533
534/* PENDING BIT */
535#define BIT_EINT0 (0x1)
536#define BIT_EINT1 (0x1<<1)
537#define BIT_EINT2 (0x1<<2)
538#define BIT_EINT3 (0x1<<3)
539#define BIT_EINT4_7 (0x1<<4)
540#define BIT_EINT8_23 (0x1<<5)
541#define BIT_BAT_FLT (0x1<<7)
542#define BIT_TICK (0x1<<8)
543#define BIT_WDT (0x1<<9)
544#define BIT_TIMER0 (0x1<<10)
545#define BIT_TIMER1 (0x1<<11)
546#define BIT_TIMER2 (0x1<<12)
547#define BIT_TIMER3 (0x1<<13)
548#define BIT_TIMER4 (0x1<<14)
549#define BIT_UART2 (0x1<<15)
550#define BIT_LCD (0x1<<16)
551#define BIT_DMA0 (0x1<<17)
552#define BIT_DMA1 (0x1<<18)
553#define BIT_DMA2 (0x1<<19)
554#define BIT_DMA3 (0x1<<20)
555#define BIT_SDI (0x1<<21)
556#define BIT_SPI0 (0x1<<22)
557#define BIT_UART1 (0x1<<23)
558#define BIT_USBD (0x1<<25)
559#define BIT_USBH (0x1<<26)
560#define BIT_IIC (0x1<<27)
561#define BIT_UART0 (0x1<<28)
562#define BIT_SPI1 (0x1<<29)
563#define BIT_RTC (0x1<<30)
564#define BIT_ADC (0x1<<31)
565#define BIT_ALLMSK (0xFFFFFFFF)
566
567#define ClearPending(bit) {\
568 rSRCPND = bit;\
569 rINTPND = bit;\
570 rINTPND;\
571 }
572/* Wait until rINTPND is changed for the case that the ISR is very short. */
573#endif /*__S3C2410_H__*/