| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * NXP LPC32xx SoC Ethernet Controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: Should be "nxp,lpc-eth" |
| 5 | - reg: Address and length of the register set for the device |
| 6 | - interrupts: Should contain ethernet controller interrupt |
| 7 | |
| 8 | Optional properties: |
| 9 | - phy-mode: See ethernet.txt file in the same directory. If the property is |
| 10 | absent, "rmii" is assumed. |
| 11 | - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering |
| 12 | |
| 13 | Optional subnodes: |
| 14 | - mdio : specifies the mdio bus, used as a container for phy nodes according to |
| 15 | phy.txt in the same directory |
| 16 | |
| 17 | |
| 18 | Example: |
| 19 | |
| 20 | mac: ethernet@31060000 { |
| 21 | compatible = "nxp,lpc-eth"; |
| 22 | reg = <0x31060000 0x1000>; |
| 23 | interrupt-parent = <&mic>; |
| 24 | interrupts = <29 0>; |
| 25 | |
| 26 | phy-mode = "rmii"; |
| 27 | use-iram; |
| 28 | }; |