| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Allwinner A64 DMA Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Chen-Yu Tsai <wens@csie.org> |
| 11 | - Maxime Ripard <mripard@kernel.org> |
| 12 | |
| 13 | allOf: |
| 14 | - $ref: dma-controller.yaml# |
| 15 | |
| 16 | properties: |
| 17 | "#dma-cells": |
| 18 | const: 1 |
| 19 | description: The cell is the request line number. |
| 20 | |
| 21 | compatible: |
| 22 | oneOf: |
| 23 | - enum: |
| 24 | - allwinner,sun20i-d1-dma |
| 25 | - allwinner,sun50i-a64-dma |
| 26 | - allwinner,sun50i-a100-dma |
| 27 | - allwinner,sun50i-h6-dma |
| 28 | - items: |
| 29 | - const: allwinner,sun8i-r40-dma |
| 30 | - const: allwinner,sun50i-a64-dma |
| 31 | |
| 32 | reg: |
| 33 | maxItems: 1 |
| 34 | |
| 35 | interrupts: |
| 36 | maxItems: 1 |
| 37 | |
| 38 | clocks: |
| 39 | minItems: 1 |
| 40 | maxItems: 2 |
| 41 | |
| 42 | clock-names: |
| 43 | items: |
| 44 | - const: bus |
| 45 | - const: mbus |
| 46 | |
| 47 | resets: |
| 48 | maxItems: 1 |
| 49 | |
| 50 | required: |
| 51 | - "#dma-cells" |
| 52 | - compatible |
| 53 | - reg |
| 54 | - interrupts |
| 55 | - clocks |
| 56 | - resets |
| 57 | - dma-channels |
| 58 | |
| 59 | if: |
| 60 | properties: |
| 61 | compatible: |
| 62 | enum: |
| 63 | - allwinner,sun20i-d1-dma |
| 64 | - allwinner,sun50i-a100-dma |
| 65 | - allwinner,sun50i-h6-dma |
| 66 | |
| 67 | then: |
| 68 | properties: |
| 69 | clocks: |
| 70 | minItems: 2 |
| 71 | |
| 72 | required: |
| 73 | - clock-names |
| 74 | |
| 75 | else: |
| 76 | properties: |
| 77 | clocks: |
| 78 | maxItems: 1 |
| 79 | |
| 80 | unevaluatedProperties: false |
| 81 | |
| 82 | examples: |
| 83 | - | |
| 84 | dma: dma-controller@1c02000 { |
| 85 | compatible = "allwinner,sun50i-a64-dma"; |
| 86 | reg = <0x01c02000 0x1000>; |
| 87 | interrupts = <0 50 4>; |
| 88 | clocks = <&ccu 30>; |
| 89 | dma-channels = <8>; |
| 90 | dma-requests = <27>; |
| 91 | resets = <&ccu 7>; |
| 92 | #dma-cells = <1>; |
| 93 | }; |
| 94 | |
| 95 | ... |