blob: 57513a449fab24c5169ddfffe4a685cf7f523eb6 [file] [log] [blame]
Simon Glassb2c1cac2014-02-26 15:59:21 -07001/dts-v1/;
2
3/ {
4 model = "sandbox";
5 compatible = "sandbox";
6 #address-cells = <1>;
Simon Glasscf61f742015-07-06 12:54:36 -06007 #size-cells = <1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -07008
Simon Glassfef72b72014-07-23 06:55:03 -06009 aliases {
10 console = &uart0;
Simon Glass5b968632015-05-22 15:42:15 -060011 eth0 = "/eth@10002000";
Bin Meng04a11cb2015-08-27 22:25:53 -070012 eth3 = &eth_3;
Simon Glass5b968632015-05-22 15:42:15 -060013 eth5 = &eth_5;
Simon Glass5620cf82018-10-01 12:22:40 -060014 gpio1 = &gpio_a;
15 gpio2 = &gpio_b;
Simon Glass0ccb0972015-01-25 08:27:05 -070016 i2c0 = "/i2c@0";
Simon Glasse4fef742017-04-23 20:02:07 -060017 mmc0 = "/mmc0";
18 mmc1 = "/mmc1";
Bin Meng408e5902018-08-03 01:14:41 -070019 pci0 = &pci0;
20 pci1 = &pci1;
Bin Meng510dddb2018-08-03 01:14:50 -070021 pci2 = &pci2;
Nishanth Menonedf85812015-09-17 15:42:41 -050022 remoteproc1 = &rproc_1;
23 remoteproc2 = &rproc_2;
Simon Glass336b2952015-05-22 15:42:17 -060024 rtc0 = &rtc_0;
25 rtc1 = &rtc_1;
Simon Glass5b968632015-05-22 15:42:15 -060026 spi0 = "/spi@0";
Przemyslaw Marczak3dbb55e2015-05-13 13:38:34 +020027 testfdt6 = "/e-test";
Simon Glass0ccb0972015-01-25 08:27:05 -070028 testbus3 = "/some-bus";
29 testfdt0 = "/some-bus/c-test@0";
30 testfdt1 = "/some-bus/c-test@1";
31 testfdt3 = "/b-test";
32 testfdt5 = "/some-bus/c-test@5";
33 testfdt8 = "/a-test";
Eugeniu Rosca5ba71e52018-05-19 14:13:55 +020034 fdt-dummy0 = "/translation-test@8000/dev@0,0";
35 fdt-dummy1 = "/translation-test@8000/dev@1,100";
36 fdt-dummy2 = "/translation-test@8000/dev@2,200";
37 fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
Simon Glass31680482015-03-25 12:23:05 -060038 usb0 = &usb_0;
39 usb1 = &usb_1;
40 usb2 = &usb_2;
Mario Six95922152018-08-09 14:51:19 +020041 axi0 = &axi;
Mario Six02ad6fb2018-09-27 09:19:31 +020042 osd0 = "/osd";
Simon Glassfef72b72014-07-23 06:55:03 -060043 };
44
Simon Glassed96cde2018-12-10 10:37:33 -070045 audio: audio-codec {
46 compatible = "sandbox,audio-codec";
47 #sound-dai-cells = <1>;
48 };
49
Simon Glassc953aaf2018-12-10 10:37:34 -070050 cros_ec: cros-ec {
Simon Glass699c9ca2018-10-01 12:22:08 -060051 reg = <0 0>;
52 compatible = "google,cros-ec-sandbox";
53
54 /*
55 * This describes the flash memory within the EC. Note
56 * that the STM32L flash erases to 0, not 0xff.
57 */
58 flash {
59 image-pos = <0x08000000>;
60 size = <0x20000>;
61 erase-value = <0>;
62
63 /* Information for sandbox */
64 ro {
65 image-pos = <0>;
66 size = <0xf000>;
67 };
68 wp-ro {
69 image-pos = <0xf000>;
70 size = <0x1000>;
71 };
72 rw {
73 image-pos = <0x10000>;
74 size = <0x10000>;
75 };
76 };
77 };
78
Yannick Fertré9712c822019-10-07 15:29:05 +020079 dsi_host: dsi_host {
80 compatible = "sandbox,dsi-host";
81 };
82
Simon Glassb2c1cac2014-02-26 15:59:21 -070083 a-test {
Simon Glasscf61f742015-07-06 12:54:36 -060084 reg = <0 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -070085 compatible = "denx,u-boot-fdt-test";
Simon Glassa7bb08a2014-07-23 06:54:57 -060086 ping-expect = <0>;
Simon Glassb2c1cac2014-02-26 15:59:21 -070087 ping-add = <0>;
Simon Glassfef72b72014-07-23 06:55:03 -060088 u-boot,dm-pre-reloc;
Simon Glass16e10402015-01-05 20:05:29 -070089 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
90 <0>, <&gpio_a 12>;
91 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
92 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
93 <&gpio_b 9 0xc 3 2 1>;
Simon Glass6df01f92018-12-10 10:37:37 -070094 int-value = <1234>;
95 uint-value = <(-1234)>;
Simon Glassb2c1cac2014-02-26 15:59:21 -070096 };
97
98 junk {
Simon Glasscf61f742015-07-06 12:54:36 -060099 reg = <1 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700100 compatible = "not,compatible";
101 };
102
103 no-compatible {
Simon Glasscf61f742015-07-06 12:54:36 -0600104 reg = <2 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700105 };
106
Simon Glass5620cf82018-10-01 12:22:40 -0600107 backlight: backlight {
108 compatible = "pwm-backlight";
109 enable-gpios = <&gpio_a 1>;
110 power-supply = <&ldo_1>;
111 pwms = <&pwm 0 1000>;
112 default-brightness-level = <5>;
113 brightness-levels = <0 16 32 64 128 170 202 234 255>;
114 };
115
Jean-Jacques Hiblote83a31b2018-08-09 16:17:46 +0200116 bind-test {
117 bind-test-child1 {
118 compatible = "sandbox,phy";
119 #phy-cells = <1>;
120 };
121
122 bind-test-child2 {
123 compatible = "simple-bus";
124 };
125 };
126
Simon Glassb2c1cac2014-02-26 15:59:21 -0700127 b-test {
Simon Glasscf61f742015-07-06 12:54:36 -0600128 reg = <3 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700129 compatible = "denx,u-boot-fdt-test";
Simon Glassa7bb08a2014-07-23 06:54:57 -0600130 ping-expect = <3>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700131 ping-add = <3>;
132 };
133
Jean-Jacques Hiblot7e9db022017-04-24 11:51:28 +0200134 phy_provider0: gen_phy@0 {
135 compatible = "sandbox,phy";
136 #phy-cells = <1>;
137 };
138
139 phy_provider1: gen_phy@1 {
140 compatible = "sandbox,phy";
141 #phy-cells = <0>;
142 broken;
143 };
144
145 gen_phy_user: gen_phy_user {
146 compatible = "simple-bus";
147 phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
148 phy-names = "phy1", "phy2", "phy3";
149 };
150
Simon Glassb2c1cac2014-02-26 15:59:21 -0700151 some-bus {
152 #address-cells = <1>;
153 #size-cells = <0>;
Simon Glass40717422014-07-23 06:55:18 -0600154 compatible = "denx,u-boot-test-bus";
Simon Glasscf61f742015-07-06 12:54:36 -0600155 reg = <3 1>;
Simon Glassa7bb08a2014-07-23 06:54:57 -0600156 ping-expect = <4>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700157 ping-add = <4>;
Simon Glass40717422014-07-23 06:55:18 -0600158 c-test@5 {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700159 compatible = "denx,u-boot-fdt-test";
160 reg = <5>;
Simon Glass40717422014-07-23 06:55:18 -0600161 ping-expect = <5>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700162 ping-add = <5>;
163 };
Simon Glass40717422014-07-23 06:55:18 -0600164 c-test@0 {
165 compatible = "denx,u-boot-fdt-test";
166 reg = <0>;
167 ping-expect = <6>;
168 ping-add = <6>;
169 };
170 c-test@1 {
171 compatible = "denx,u-boot-fdt-test";
172 reg = <1>;
173 ping-expect = <7>;
174 ping-add = <7>;
175 };
Simon Glassb2c1cac2014-02-26 15:59:21 -0700176 };
177
178 d-test {
Simon Glasscf61f742015-07-06 12:54:36 -0600179 reg = <3 1>;
Simon Glassdb6f0202014-07-23 06:55:12 -0600180 ping-expect = <6>;
181 ping-add = <6>;
182 compatible = "google,another-fdt-test";
183 };
184
185 e-test {
Simon Glasscf61f742015-07-06 12:54:36 -0600186 reg = <3 1>;
Simon Glassa7bb08a2014-07-23 06:54:57 -0600187 ping-expect = <6>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700188 ping-add = <6>;
189 compatible = "google,another-fdt-test";
190 };
191
Simon Glass0ccb0972015-01-25 08:27:05 -0700192 f-test {
193 compatible = "denx,u-boot-fdt-test";
194 };
195
196 g-test {
197 compatible = "denx,u-boot-fdt-test";
198 };
199
Bin Mengd9d24782018-10-10 22:07:01 -0700200 h-test {
201 compatible = "denx,u-boot-fdt-test1";
202 };
203
Patrice Chotard9cc2d142017-09-04 14:55:57 +0200204 clocks {
205 clk_fixed: clk-fixed {
206 compatible = "fixed-clock";
207 #clock-cells = <0>;
208 clock-frequency = <1234>;
209 };
Anup Patel8d28c3c2019-02-25 08:14:55 +0000210
211 clk_fixed_factor: clk-fixed-factor {
212 compatible = "fixed-factor-clock";
213 #clock-cells = <0>;
214 clock-div = <3>;
215 clock-mult = <2>;
216 clocks = <&clk_fixed>;
217 };
Lukasz Majewskiccafcdd2019-06-24 15:50:47 +0200218
219 osc {
220 compatible = "fixed-clock";
221 #clock-cells = <0>;
222 clock-frequency = <20000000>;
223 };
Stephen Warrena9622432016-06-17 09:44:00 -0600224 };
225
226 clk_sandbox: clk-sbox {
Simon Glass8cc4d822015-07-06 12:54:24 -0600227 compatible = "sandbox,clk";
Stephen Warrena9622432016-06-17 09:44:00 -0600228 #clock-cells = <1>;
Jean-Jacques Hiblotc1e9c942019-10-22 14:00:07 +0200229 assigned-clocks = <&clk_sandbox 3>;
230 assigned-clock-rates = <321>;
Stephen Warrena9622432016-06-17 09:44:00 -0600231 };
232
233 clk-test {
234 compatible = "sandbox,clk-test";
235 clocks = <&clk_fixed>,
236 <&clk_sandbox 1>,
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200237 <&clk_sandbox 0>,
238 <&clk_sandbox 3>,
239 <&clk_sandbox 2>;
240 clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
Simon Glass8cc4d822015-07-06 12:54:24 -0600241 };
242
Lukasz Majewski8c0709b2019-06-24 15:50:50 +0200243 ccf: clk-ccf {
244 compatible = "sandbox,clk-ccf";
245 };
246
Simon Glass5b968632015-05-22 15:42:15 -0600247 eth@10002000 {
248 compatible = "sandbox,eth";
249 reg = <0x10002000 0x1000>;
Joe Hershberger76f3c102018-07-02 14:47:45 -0500250 fake-host-hwaddr = [00 00 66 44 22 00];
Simon Glass5b968632015-05-22 15:42:15 -0600251 };
252
253 eth_5: eth@10003000 {
254 compatible = "sandbox,eth";
255 reg = <0x10003000 0x1000>;
Joe Hershberger76f3c102018-07-02 14:47:45 -0500256 fake-host-hwaddr = [00 00 66 44 22 11];
Simon Glass5b968632015-05-22 15:42:15 -0600257 };
258
Bin Meng04a11cb2015-08-27 22:25:53 -0700259 eth_3: sbe5 {
260 compatible = "sandbox,eth";
261 reg = <0x10005000 0x1000>;
Joe Hershberger76f3c102018-07-02 14:47:45 -0500262 fake-host-hwaddr = [00 00 66 44 22 33];
Bin Meng04a11cb2015-08-27 22:25:53 -0700263 };
264
Simon Glass5b968632015-05-22 15:42:15 -0600265 eth@10004000 {
266 compatible = "sandbox,eth";
267 reg = <0x10004000 0x1000>;
Joe Hershberger76f3c102018-07-02 14:47:45 -0500268 fake-host-hwaddr = [00 00 66 44 22 22];
Simon Glass5b968632015-05-22 15:42:15 -0600269 };
270
Rajan Vajab3b2ddb2018-09-19 03:43:46 -0700271 firmware {
272 sandbox_firmware: sandbox-firmware {
273 compatible = "sandbox,firmware";
274 };
275 };
276
Simon Glass25348a42014-10-13 23:42:11 -0600277 gpio_a: base-gpios {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700278 compatible = "sandbox,gpio";
Simon Glass16e10402015-01-05 20:05:29 -0700279 gpio-controller;
280 #gpio-cells = <1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700281 gpio-bank-name = "a";
Simon Glass9e7ab232018-02-03 10:36:59 -0700282 sandbox,gpio-count = <20>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700283 };
284
Simon Glass16e10402015-01-05 20:05:29 -0700285 gpio_b: extra-gpios {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700286 compatible = "sandbox,gpio";
Simon Glass16e10402015-01-05 20:05:29 -0700287 gpio-controller;
288 #gpio-cells = <5>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700289 gpio-bank-name = "b";
Simon Glass9e7ab232018-02-03 10:36:59 -0700290 sandbox,gpio-count = <10>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700291 };
Simon Glass25348a42014-10-13 23:42:11 -0600292
Simon Glass7df766e2014-12-10 08:55:55 -0700293 i2c@0 {
294 #address-cells = <1>;
295 #size-cells = <0>;
Simon Glasscf61f742015-07-06 12:54:36 -0600296 reg = <0 1>;
Simon Glass7df766e2014-12-10 08:55:55 -0700297 compatible = "sandbox,i2c";
298 clock-frequency = <100000>;
299 eeprom@2c {
300 reg = <0x2c>;
301 compatible = "i2c-eeprom";
Simon Glass17b56f62018-11-18 08:14:34 -0700302 sandbox,emul = <&emul_eeprom>;
Simon Glass7df766e2014-12-10 08:55:55 -0700303 };
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200304
Simon Glass336b2952015-05-22 15:42:17 -0600305 rtc_0: rtc@43 {
306 reg = <0x43>;
307 compatible = "sandbox-rtc";
Simon Glass17b56f62018-11-18 08:14:34 -0700308 sandbox,emul = <&emul0>;
Simon Glass336b2952015-05-22 15:42:17 -0600309 };
310
311 rtc_1: rtc@61 {
312 reg = <0x61>;
313 compatible = "sandbox-rtc";
Simon Glass17b56f62018-11-18 08:14:34 -0700314 sandbox,emul = <&emul1>;
315 };
316
317 i2c_emul: emul {
318 reg = <0xff>;
319 compatible = "sandbox,i2c-emul-parent";
320 emul_eeprom: emul-eeprom {
321 compatible = "sandbox,i2c-eeprom";
322 sandbox,filename = "i2c.bin";
323 sandbox,size = <256>;
324 };
325 emul0: emul0 {
326 compatible = "sandbox,i2c-rtc";
327 };
328 emul1: emull {
Simon Glass336b2952015-05-22 15:42:17 -0600329 compatible = "sandbox,i2c-rtc";
330 };
331 };
332
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200333 sandbox_pmic: sandbox_pmic {
334 reg = <0x40>;
Simon Glass17b56f62018-11-18 08:14:34 -0700335 sandbox,emul = <&emul_pmic0>;
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200336 };
Lukasz Majewskia4d82972018-05-15 16:26:40 +0200337
338 mc34708: pmic@41 {
339 reg = <0x41>;
Simon Glass17b56f62018-11-18 08:14:34 -0700340 sandbox,emul = <&emul_pmic1>;
Lukasz Majewskia4d82972018-05-15 16:26:40 +0200341 };
Simon Glass7df766e2014-12-10 08:55:55 -0700342 };
343
Philipp Tomsich1fc53302018-12-14 21:14:29 +0100344 bootcount@0 {
345 compatible = "u-boot,bootcount-rtc";
346 rtc = <&rtc_1>;
347 offset = <0x13>;
348 };
349
Przemyslaw Marczak1bc7f232015-10-27 13:08:06 +0100350 adc@0 {
351 compatible = "sandbox,adc";
352 vdd-supply = <&buck2>;
353 vss-microvolts = <0>;
354 };
355
Simon Glass54028bc2019-12-06 21:41:59 -0700356 irq {
357 compatible = "sandbox,irq";
358 };
359
Simon Glass90b6fef2016-01-18 19:52:26 -0700360 lcd {
361 u-boot,dm-pre-reloc;
362 compatible = "sandbox,lcd-sdl";
363 xres = <1366>;
364 yres = <768>;
365 };
366
Simon Glassd783eb32015-07-06 12:54:34 -0600367 leds {
368 compatible = "gpio-leds";
369
370 iracibble {
371 gpios = <&gpio_a 1 0>;
372 label = "sandbox:red";
373 };
374
375 martinet {
376 gpios = <&gpio_a 2 0>;
377 label = "sandbox:green";
378 };
Patrick Bruennb58adfe2018-04-11 11:16:29 +0200379
380 default_on {
381 gpios = <&gpio_a 5 0>;
382 label = "sandbox:default_on";
383 default-state = "on";
384 };
385
386 default_off {
387 gpios = <&gpio_a 6 0>;
388 label = "sandbox:default_off";
389 default-state = "off";
390 };
Simon Glassd783eb32015-07-06 12:54:34 -0600391 };
392
Stephen Warren62f2c902016-05-16 17:41:37 -0600393 mbox: mbox {
394 compatible = "sandbox,mbox";
395 #mbox-cells = <1>;
396 };
397
398 mbox-test {
399 compatible = "sandbox,mbox-test";
400 mboxes = <&mbox 100>, <&mbox 1>;
401 mbox-names = "other", "test";
402 };
403
AKASHI Takahiro8fb963a2019-08-27 17:17:03 +0900404 cpus {
405 cpu-test1 {
406 compatible = "sandbox,cpu_sandbox";
407 u-boot,dm-pre-reloc;
408 };
Mario Sixdea5df72018-08-06 10:23:44 +0200409
AKASHI Takahiro8fb963a2019-08-27 17:17:03 +0900410 cpu-test2 {
411 compatible = "sandbox,cpu_sandbox";
412 u-boot,dm-pre-reloc;
413 };
Mario Sixdea5df72018-08-06 10:23:44 +0200414
AKASHI Takahiro8fb963a2019-08-27 17:17:03 +0900415 cpu-test3 {
416 compatible = "sandbox,cpu_sandbox";
417 u-boot,dm-pre-reloc;
418 };
Mario Sixdea5df72018-08-06 10:23:44 +0200419 };
420
Simon Glassc953aaf2018-12-10 10:37:34 -0700421 i2s: i2s {
422 compatible = "sandbox,i2s";
423 #sound-dai-cells = <1>;
Simon Glass4d5814c2019-02-16 20:24:56 -0700424 sandbox,silent; /* Don't emit sounds while testing */
Simon Glassc953aaf2018-12-10 10:37:34 -0700425 };
426
Jean-Jacques Hiblotdb97c7f2019-07-05 09:33:57 +0200427 nop-test_0 {
428 compatible = "sandbox,nop_sandbox1";
429 nop-test_1 {
430 compatible = "sandbox,nop_sandbox2";
431 bind = "True";
432 };
433 nop-test_2 {
434 compatible = "sandbox,nop_sandbox2";
435 bind = "False";
436 };
437 };
438
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200439 misc-test {
440 compatible = "sandbox,misc_sandbox";
441 };
442
Simon Glasse4fef742017-04-23 20:02:07 -0600443 mmc2 {
444 compatible = "sandbox,mmc";
445 };
446
447 mmc1 {
448 compatible = "sandbox,mmc";
449 };
450
451 mmc0 {
Simon Glassd3e58e42015-07-06 12:54:32 -0600452 compatible = "sandbox,mmc";
453 };
454
Simon Glass53a68b32019-02-16 20:24:50 -0700455 pch {
456 compatible = "sandbox,pch";
457 };
458
Bin Meng408e5902018-08-03 01:14:41 -0700459 pci0: pci-controller0 {
Simon Glass3a6eae62015-03-05 12:25:34 -0700460 compatible = "sandbox,pci";
461 device_type = "pci";
462 #address-cells = <3>;
463 #size-cells = <2>;
Simon Glass35464f72019-09-25 08:56:08 -0600464 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
Simon Glass3a6eae62015-03-05 12:25:34 -0700465 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
Bin Mengcbf071b2018-08-03 01:14:39 -0700466 pci@0,0 {
467 compatible = "pci-generic";
468 reg = <0x0000 0 0 0 0>;
Simon Glassb98ba4c2019-09-25 08:56:10 -0600469 sandbox,emul = <&swap_case_emul0_0>;
Bin Mengcbf071b2018-08-03 01:14:39 -0700470 };
Alex Margineanf1274432019-06-07 11:24:24 +0300471 pci@1,0 {
472 compatible = "pci-generic";
Simon Glass23b27592019-09-15 12:08:58 -0600473 /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
474 reg = <0x02000814 0 0 0 0
475 0x01000810 0 0 0 0>;
Simon Glassb98ba4c2019-09-25 08:56:10 -0600476 sandbox,emul = <&swap_case_emul0_1>;
Alex Margineanf1274432019-06-07 11:24:24 +0300477 };
Simon Glass937bb472019-12-06 21:41:57 -0700478 p2sb-pci@2,0 {
479 compatible = "sandbox,p2sb";
480 reg = <0x02001010 0 0 0 0>;
481 sandbox,emul = <&p2sb_emul>;
482
483 adder {
484 intel,p2sb-port-id = <3>;
485 compatible = "sandbox,adder";
486 };
487 };
Simon Glass8c501022019-12-06 21:41:54 -0700488 pci@1e,0 {
489 compatible = "sandbox,pmc";
490 reg = <0xf000 0 0 0 0>;
491 sandbox,emul = <&pmc_emul1e>;
492 acpi-base = <0x400>;
493 gpe0-dwx-mask = <0xf>;
494 gpe0-dwx-shift-base = <4>;
495 gpe0-dw = <6 7 9>;
496 gpe0-sts = <0x20>;
497 gpe0-en = <0x30>;
498 };
Simon Glass3a6eae62015-03-05 12:25:34 -0700499 pci@1f,0 {
500 compatible = "pci-generic";
Simon Glass23b27592019-09-15 12:08:58 -0600501 /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
502 reg = <0x0100f810 0 0 0 0>;
Simon Glassb98ba4c2019-09-25 08:56:10 -0600503 sandbox,emul = <&swap_case_emul0_1f>;
Simon Glass3a6eae62015-03-05 12:25:34 -0700504 };
505 };
506
Simon Glassb98ba4c2019-09-25 08:56:10 -0600507 pci-emul0 {
508 compatible = "sandbox,pci-emul-parent";
509 swap_case_emul0_0: emul0@0,0 {
510 compatible = "sandbox,swap-case";
511 };
512 swap_case_emul0_1: emul0@1,0 {
513 compatible = "sandbox,swap-case";
514 use-ea;
515 };
516 swap_case_emul0_1f: emul0@1f,0 {
517 compatible = "sandbox,swap-case";
518 };
Simon Glass937bb472019-12-06 21:41:57 -0700519 p2sb_emul: emul@2,0 {
520 compatible = "sandbox,p2sb-emul";
521 };
Simon Glass8c501022019-12-06 21:41:54 -0700522 pmc_emul1e: emul@1e,0 {
523 compatible = "sandbox,pmc-emul";
524 };
Simon Glassb98ba4c2019-09-25 08:56:10 -0600525 };
526
Bin Meng408e5902018-08-03 01:14:41 -0700527 pci1: pci-controller1 {
528 compatible = "sandbox,pci";
529 device_type = "pci";
530 #address-cells = <3>;
531 #size-cells = <2>;
532 ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
533 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
Bin Meng5fed5362018-08-03 01:14:47 -0700534 sandbox,dev-info = <0x08 0x00 0x1234 0x5678
Marek Vasute5733222018-10-10 21:27:08 +0200535 0x0c 0x00 0x1234 0x5678
536 0x10 0x00 0x1234 0x5678>;
537 pci@10,0 {
538 reg = <0x8000 0 0 0 0>;
539 };
Bin Meng408e5902018-08-03 01:14:41 -0700540 };
541
Bin Meng510dddb2018-08-03 01:14:50 -0700542 pci2: pci-controller2 {
543 compatible = "sandbox,pci";
544 device_type = "pci";
545 #address-cells = <3>;
546 #size-cells = <2>;
547 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
548 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
549 sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
550 pci@1f,0 {
551 compatible = "pci-generic";
552 reg = <0xf800 0 0 0 0>;
Simon Glassb98ba4c2019-09-25 08:56:10 -0600553 sandbox,emul = <&swap_case_emul2_1f>;
554 };
555 };
556
557 pci-emul2 {
558 compatible = "sandbox,pci-emul-parent";
559 swap_case_emul2_1f: emul2@1f,0 {
560 compatible = "sandbox,swap-case";
Bin Meng510dddb2018-08-03 01:14:50 -0700561 };
562 };
563
Ramon Friedc64f19b2019-04-27 11:15:23 +0300564 pci_ep: pci_ep {
565 compatible = "sandbox,pci_ep";
566 };
567
Simon Glass9c433fe2017-04-23 20:10:44 -0600568 probing {
569 compatible = "simple-bus";
570 test1 {
571 compatible = "denx,u-boot-probe-test";
572 };
573
574 test2 {
575 compatible = "denx,u-boot-probe-test";
576 };
577
578 test3 {
579 compatible = "denx,u-boot-probe-test";
580 };
581
582 test4 {
583 compatible = "denx,u-boot-probe-test";
Jean-Jacques Hiblotdc44ea42018-11-29 10:57:37 +0100584 first-syscon = <&syscon0>;
585 second-sys-ctrl = <&another_system_controller>;
Patrick Delaunayee010432019-03-07 09:57:13 +0100586 third-syscon = <&syscon2>;
Simon Glass9c433fe2017-04-23 20:10:44 -0600587 };
588 };
589
Stephen Warren92c67fa2016-07-13 13:45:31 -0600590 pwrdom: power-domain {
591 compatible = "sandbox,power-domain";
592 #power-domain-cells = <1>;
593 };
594
595 power-domain-test {
596 compatible = "sandbox,power-domain-test";
597 power-domains = <&pwrdom 2>;
598 };
599
Simon Glass5620cf82018-10-01 12:22:40 -0600600 pwm: pwm {
Simon Glasse62f4be2017-04-16 21:01:11 -0600601 compatible = "sandbox,pwm";
Simon Glass5620cf82018-10-01 12:22:40 -0600602 #pwm-cells = <2>;
Simon Glasse62f4be2017-04-16 21:01:11 -0600603 };
604
605 pwm2 {
606 compatible = "sandbox,pwm";
Simon Glass5620cf82018-10-01 12:22:40 -0600607 #pwm-cells = <2>;
Simon Glasse62f4be2017-04-16 21:01:11 -0600608 };
609
Simon Glass3d355e62015-07-06 12:54:31 -0600610 ram {
611 compatible = "sandbox,ram";
612 };
613
Simon Glassd860f222015-07-06 12:54:29 -0600614 reset@0 {
615 compatible = "sandbox,warm-reset";
616 };
617
618 reset@1 {
619 compatible = "sandbox,reset";
620 };
621
Stephen Warren6488e642016-06-17 09:43:59 -0600622 resetc: reset-ctl {
623 compatible = "sandbox,reset-ctl";
624 #reset-cells = <1>;
625 };
626
627 reset-ctl-test {
628 compatible = "sandbox,reset-ctl-test";
629 resets = <&resetc 100>, <&resetc 2>;
630 reset-names = "other", "test";
631 };
632
Nishanth Menonedf85812015-09-17 15:42:41 -0500633 rproc_1: rproc@1 {
634 compatible = "sandbox,test-processor";
635 remoteproc-name = "remoteproc-test-dev1";
636 };
637
638 rproc_2: rproc@2 {
639 compatible = "sandbox,test-processor";
640 internal-memory-mapped;
641 remoteproc-name = "remoteproc-test-dev2";
642 };
643
Simon Glass5620cf82018-10-01 12:22:40 -0600644 panel {
645 compatible = "simple-panel";
646 backlight = <&backlight 0 100>;
647 };
648
Ramon Fried26ed32e2018-07-02 02:57:59 +0300649 smem@0 {
650 compatible = "sandbox,smem";
651 };
652
Simon Glass76072ac2018-12-10 10:37:36 -0700653 sound {
654 compatible = "sandbox,sound";
655 cpu {
656 sound-dai = <&i2s 0>;
657 };
658
659 codec {
660 sound-dai = <&audio 0>;
661 };
662 };
663
Simon Glass25348a42014-10-13 23:42:11 -0600664 spi@0 {
665 #address-cells = <1>;
666 #size-cells = <0>;
Simon Glasscf61f742015-07-06 12:54:36 -0600667 reg = <0 1>;
Simon Glass25348a42014-10-13 23:42:11 -0600668 compatible = "sandbox,spi";
669 cs-gpios = <0>, <&gpio_a 0>;
670 spi.bin@0 {
671 reg = <0>;
Neil Armstronga009fa72019-02-10 10:16:20 +0000672 compatible = "spansion,m25p16", "jedec,spi-nor";
Simon Glass25348a42014-10-13 23:42:11 -0600673 spi-max-frequency = <40000000>;
674 sandbox,filename = "spi.bin";
675 };
676 };
677
Jean-Jacques Hiblotdc44ea42018-11-29 10:57:37 +0100678 syscon0: syscon@0 {
Simon Glasscd556522015-07-06 12:54:35 -0600679 compatible = "sandbox,syscon0";
Mario Sixe3f59f42018-10-04 09:00:40 +0200680 reg = <0x10 16>;
Simon Glasscd556522015-07-06 12:54:35 -0600681 };
682
Jean-Jacques Hiblotdc44ea42018-11-29 10:57:37 +0100683 another_system_controller: syscon@1 {
Simon Glasscd556522015-07-06 12:54:35 -0600684 compatible = "sandbox,syscon1";
Simon Glasscf61f742015-07-06 12:54:36 -0600685 reg = <0x20 5
686 0x28 6
687 0x30 7
688 0x38 8>;
Simon Glasscd556522015-07-06 12:54:35 -0600689 };
690
Patrick Delaunayee010432019-03-07 09:57:13 +0100691 syscon2: syscon@2 {
Masahiro Yamada42ab1072018-04-23 13:26:53 +0900692 compatible = "simple-mfd", "syscon";
693 reg = <0x40 5
694 0x48 6
695 0x50 7
696 0x58 8>;
697 };
698
Thomas Chou6f2cfbf2015-12-11 16:27:34 +0800699 timer {
700 compatible = "sandbox,timer";
701 clock-frequency = <1000000>;
702 };
703
Miquel Raynal80938c12018-05-15 11:57:27 +0200704 tpm2 {
705 compatible = "sandbox,tpm2";
706 };
707
Simon Glass5b968632015-05-22 15:42:15 -0600708 uart0: serial {
709 compatible = "sandbox,serial";
710 u-boot,dm-pre-reloc;
Joe Hershberger4c197242015-03-22 17:09:15 -0500711 };
712
Simon Glass31680482015-03-25 12:23:05 -0600713 usb_0: usb@0 {
714 compatible = "sandbox,usb";
715 status = "disabled";
716 hub {
717 compatible = "sandbox,usb-hub";
718 #address-cells = <1>;
719 #size-cells = <0>;
720 flash-stick {
721 reg = <0>;
722 compatible = "sandbox,usb-flash";
723 };
724 };
725 };
726
727 usb_1: usb@1 {
728 compatible = "sandbox,usb";
729 hub {
730 compatible = "usb-hub";
731 usb,device-class = <9>;
732 hub-emul {
733 compatible = "sandbox,usb-hub";
734 #address-cells = <1>;
735 #size-cells = <0>;
Simon Glass4700fe52015-11-08 23:48:01 -0700736 flash-stick@0 {
Simon Glass31680482015-03-25 12:23:05 -0600737 reg = <0>;
738 compatible = "sandbox,usb-flash";
739 sandbox,filepath = "testflash.bin";
740 };
741
Simon Glass4700fe52015-11-08 23:48:01 -0700742 flash-stick@1 {
743 reg = <1>;
744 compatible = "sandbox,usb-flash";
745 sandbox,filepath = "testflash1.bin";
746 };
747
748 flash-stick@2 {
749 reg = <2>;
750 compatible = "sandbox,usb-flash";
751 sandbox,filepath = "testflash2.bin";
752 };
753
Simon Glassc0ccc722015-11-08 23:48:08 -0700754 keyb@3 {
755 reg = <3>;
756 compatible = "sandbox,usb-keyb";
757 };
758
Simon Glass31680482015-03-25 12:23:05 -0600759 };
760 };
761 };
762
763 usb_2: usb@2 {
764 compatible = "sandbox,usb";
765 status = "disabled";
766 };
767
Mateusz Kulikowskic7e4fbb2016-03-31 23:12:28 +0200768 spmi: spmi@0 {
769 compatible = "sandbox,spmi";
770 #address-cells = <0x1>;
771 #size-cells = <0x1>;
Simon Glass95139972019-09-25 08:55:59 -0600772 ranges;
Mateusz Kulikowskic7e4fbb2016-03-31 23:12:28 +0200773 pm8916@0 {
774 compatible = "qcom,spmi-pmic";
775 reg = <0x0 0x1>;
776 #address-cells = <0x1>;
777 #size-cells = <0x1>;
Simon Glass95139972019-09-25 08:55:59 -0600778 ranges;
Mateusz Kulikowskic7e4fbb2016-03-31 23:12:28 +0200779
780 spmi_gpios: gpios@c000 {
781 compatible = "qcom,pm8916-gpio";
782 reg = <0xc000 0x400>;
783 gpio-controller;
784 gpio-count = <4>;
785 #gpio-cells = <2>;
786 gpio-bank-name="spmi";
787 };
788 };
789 };
maxims@google.comdaea6d42017-04-17 12:00:21 -0700790
791 wdt0: wdt@0 {
792 compatible = "sandbox,wdt";
793 };
Rob Clarka471b672018-01-10 11:33:30 +0100794
Mario Six95922152018-08-09 14:51:19 +0200795 axi: axi@0 {
796 compatible = "sandbox,axi";
797 #address-cells = <0x1>;
798 #size-cells = <0x1>;
799 store@0 {
800 compatible = "sandbox,sandbox_store";
801 reg = <0x0 0x400>;
802 };
803 };
804
Rob Clarka471b672018-01-10 11:33:30 +0100805 chosen {
Simon Glass305ac9a2018-02-03 10:36:58 -0700806 #address-cells = <1>;
807 #size-cells = <1>;
Rob Clarka471b672018-01-10 11:33:30 +0100808 chosen-test {
809 compatible = "denx,u-boot-fdt-test";
810 reg = <9 1>;
811 };
812 };
Mario Six35616ef2018-03-12 14:53:33 +0100813
814 translation-test@8000 {
815 compatible = "simple-bus";
816 reg = <0x8000 0x4000>;
817
818 #address-cells = <0x2>;
819 #size-cells = <0x1>;
820
821 ranges = <0 0x0 0x8000 0x1000
822 1 0x100 0x9000 0x1000
823 2 0x200 0xA000 0x1000
824 3 0x300 0xB000 0x1000
825 >;
826
Fabien Dessenne22236e02019-05-31 15:11:30 +0200827 dma-ranges = <0 0x000 0x10000000 0x1000
828 1 0x100 0x20000000 0x1000
829 >;
830
Mario Six35616ef2018-03-12 14:53:33 +0100831 dev@0,0 {
832 compatible = "denx,u-boot-fdt-dummy";
833 reg = <0 0x0 0x1000>;
Álvaro Fernández Rojasa3181152018-12-03 19:37:09 +0100834 reg-names = "sandbox-dummy-0";
Mario Six35616ef2018-03-12 14:53:33 +0100835 };
836
837 dev@1,100 {
838 compatible = "denx,u-boot-fdt-dummy";
839 reg = <1 0x100 0x1000>;
840
841 };
842
843 dev@2,200 {
844 compatible = "denx,u-boot-fdt-dummy";
845 reg = <2 0x200 0x1000>;
846 };
847
848
849 noxlatebus@3,300 {
850 compatible = "simple-bus";
851 reg = <3 0x300 0x1000>;
852
853 #address-cells = <0x1>;
854 #size-cells = <0x0>;
855
856 dev@42 {
857 compatible = "denx,u-boot-fdt-dummy";
858 reg = <0x42>;
859 };
860 };
861 };
Mario Six02ad6fb2018-09-27 09:19:31 +0200862
863 osd {
864 compatible = "sandbox,sandbox_osd";
865 };
Tom Rinib93eea72018-09-30 18:16:51 -0400866
Mario Sixab664ff2018-07-31 11:44:13 +0200867 board {
868 compatible = "sandbox,board_sandbox";
869 };
Jens Wiklander86afaa62018-09-25 16:40:16 +0200870
871 sandbox_tee {
872 compatible = "sandbox,tee";
873 };
Bin Meng1bb290d2018-10-15 02:21:26 -0700874
875 sandbox_virtio1 {
876 compatible = "sandbox,virtio1";
877 };
878
879 sandbox_virtio2 {
880 compatible = "sandbox,virtio2";
881 };
Patrice Chotard0fc8afc2018-10-24 14:10:23 +0200882
883 pinctrl {
884 compatible = "sandbox,pinctrl";
885 };
Benjamin Gaignarda550b542018-11-27 13:49:50 +0100886
887 hwspinlock@0 {
888 compatible = "sandbox,hwspinlock";
889 };
Grygorii Strashko19ebf0b2018-11-28 19:17:51 +0100890
891 dma: dma {
892 compatible = "sandbox,dma";
893 #dma-cells = <1>;
894
895 dmas = <&dma 0>, <&dma 1>, <&dma 2>;
896 dma-names = "m2m", "tx0", "rx0";
897 };
Alex Marginean0daa53a2019-06-03 19:12:28 +0300898
Alex Marginean0649be52019-07-12 10:13:53 +0300899 /*
900 * keep mdio-mux ahead of mdio so that the mux is removed first at the
901 * end of the test. If parent mdio is removed first, clean-up of the
902 * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
903 * active at the end of the test. That it turn doesn't allow the mdio
904 * class to be destroyed, triggering an error.
905 */
906 mdio-mux-test {
907 compatible = "sandbox,mdio-mux";
908 #address-cells = <1>;
909 #size-cells = <0>;
910 mdio-parent-bus = <&mdio>;
911
912 mdio-ch-test@0 {
913 reg = <0>;
914 };
915 mdio-ch-test@1 {
916 reg = <1>;
917 };
918 };
919
920 mdio: mdio-test {
Alex Marginean0daa53a2019-06-03 19:12:28 +0300921 compatible = "sandbox,mdio";
922 };
Simon Glassb2c1cac2014-02-26 15:59:21 -0700923};
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200924
925#include "sandbox_pmic.dtsi"