blob: 1491fb8ef6a3f03438060e50886088b119a9fc85 [file] [log] [blame]
Tom Rini6b642ac2024-10-01 12:20:28 -06001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/sophgo,sg2042-rpgate.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Sophgo SG2042 Gate Clock Generator for RP(riscv processors) subsystem
8
9maintainers:
10 - Chen Wang <unicorn_wang@outlook.com>
11
12properties:
13 compatible:
14 const: sophgo,sg2042-rpgate
15
16 reg:
17 maxItems: 1
18
19 clocks:
20 items:
21 - description: Gate clock for RP subsystem
22
23 clock-names:
24 items:
25 - const: rpgate
26
27 '#clock-cells':
28 const: 1
29 description:
30 See <dt-bindings/clock/sophgo,sg2042-rpgate.h> for valid indices.
31
32required:
33 - compatible
34 - reg
35 - clocks
36 - clock-names
37 - '#clock-cells'
38
39additionalProperties: false
40
41examples:
42 - |
43 clock-controller@20000000 {
44 compatible = "sophgo,sg2042-rpgate";
45 reg = <0x20000000 0x10000>;
46 clocks = <&clkgen 85>;
47 clock-names = "rpgate";
48 #clock-cells = <1>;
49 };