Patrick Wildt | 53d0f0a | 2023-02-06 00:48:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2019 NXP |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | * |
| 6 | * Generated code from MX8M_DDR_tool |
| 7 | * Align with uboot version: |
| 8 | * imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.0.0_ga |
| 9 | */ |
| 10 | #include "lpddr4_timing_ch2.h" |
| 11 | |
| 12 | static struct dram_cfg_param lpddr4_ddrc_cfg[] = { |
| 13 | /** Initialize DDRC registers **/ |
| 14 | { DDRC_DBG1(0), 1 }, |
| 15 | /* selfref_en=1, SDRAM enter self-refresh state */ |
| 16 | { DDRC_PWRCTL(0), 1 }, |
| 17 | { DDRC_MSTR(0), 0xa0080020 | (CH2_LPDDR4_CS << 24) }, |
| 18 | { DDRC_MSTR2(0), 0 }, |
| 19 | { DDRC_DERATEEN(0), 0x0203 }, |
| 20 | { DDRC_DERATEINT(0), 0x0003e800 }, |
| 21 | { DDRC_RFSHTMG(0), 0x006100e0 }, |
| 22 | { DDRC_INIT0(0), 0xc003061c }, |
| 23 | { DDRC_INIT1(0), 0x009e0000 }, |
| 24 | { DDRC_INIT3(0), 0x00d4002d }, |
| 25 | { DDRC_INIT4(0), CH2_VAL_INIT4 }, |
| 26 | { DDRC_INIT6(0), 0x0066004a }, |
| 27 | { DDRC_INIT7(0), 0x0016004a }, |
| 28 | { DDRC_DRAMTMG0(0), 0x1a201b22 }, |
| 29 | { DDRC_DRAMTMG1(0), 0x00060633 }, |
| 30 | { DDRC_DRAMTMG3(0), 0x00c0c000 }, |
| 31 | { DDRC_DRAMTMG4(0), 0x0f04080f }, |
| 32 | { DDRC_DRAMTMG5(0), 0x02040c0c }, |
| 33 | { DDRC_DRAMTMG6(0), 0x01010007 }, |
| 34 | { DDRC_DRAMTMG7(0), 0x0401 }, |
| 35 | { DDRC_DRAMTMG12(0), 0x00020600 }, |
| 36 | { DDRC_DRAMTMG13(0), 0x0c100002 }, |
| 37 | { DDRC_DRAMTMG14(0), 0xe6 }, |
| 38 | { DDRC_DRAMTMG17(0), 0x00a00050 }, |
| 39 | { DDRC_ZQCTL0(0), 0xc3200018 }, |
| 40 | { DDRC_ZQCTL1(0), 0x028061a8 }, |
| 41 | { DDRC_ZQCTL2(0), 0 }, |
| 42 | { DDRC_DFITMG0(0), 0x0497820a }, |
| 43 | { DDRC_DFITMG1(0), 0x00080303 }, |
| 44 | { DDRC_DFIUPD0(0), 0xe0400018 }, |
| 45 | { DDRC_DFIUPD1(0), 0x00df00e4 }, |
| 46 | { DDRC_DFIUPD2(0), 0x80000000 }, |
| 47 | { DDRC_DFIMISC(0), 0x11 }, |
| 48 | { DDRC_DFITMG2(0), 0x170a }, |
| 49 | { DDRC_DBICTL(0), 1 }, |
| 50 | { DDRC_DFIPHYMSTR(0), 1 }, |
| 51 | { DDRC_RANKCTL(0), 0x0639 }, |
| 52 | { DDRC_DRAMTMG2(0), 0x070e1617 }, |
| 53 | |
| 54 | /* address mapping */ |
| 55 | { DDRC_ADDRMAP0(0), CH2_VAL_DDRC_ADDRMAP0 }, |
| 56 | { DDRC_ADDRMAP3(0), 0 }, |
| 57 | /* addrmap_col_b10 and addrmap_col_b11 set to de-activated (5-bit width) */ |
| 58 | { DDRC_ADDRMAP4(0), 0x1f1f }, |
| 59 | /* bank interleave */ |
| 60 | /* addrmap_bank_b2, addrmap_bank_b1, addrmap_bank_b0 */ |
| 61 | { DDRC_ADDRMAP1(0), 0x00080808 }, |
| 62 | /* addrmap_row_b11, addrmap_row_b10_b2, addrmap_row_b1, addrmap_row_b0 */ |
| 63 | { DDRC_ADDRMAP5(0), 0x07070707 }, |
| 64 | /* addrmap_row_b15, addrmap_row_b14, addrmap_row_b13, addrmap_row_b12 */ |
| 65 | { DDRC_ADDRMAP6(0), CH2_VAL_DDRC_ADDRMAP6 }, |
| 66 | { DDRC_ADDRMAP7(0), 0x0f0f }, |
| 67 | { DDRC_FREQ1_DERATEEN(0), 1 }, |
| 68 | { DDRC_FREQ1_DERATEINT(0), 0xd0c0 }, |
| 69 | { DDRC_FREQ1_RFSHCTL0(0), 0x0020d040 }, |
| 70 | { DDRC_FREQ1_RFSHTMG(0), 0x0014002f }, |
| 71 | { DDRC_FREQ1_INIT3(0), 0x00940009 }, |
| 72 | { DDRC_FREQ1_INIT4(0), CH2_VAL_INIT4 }, |
| 73 | { DDRC_FREQ1_INIT6(0), 0x0066004a }, |
| 74 | { DDRC_FREQ1_INIT7(0), 0x0016004a }, |
| 75 | { DDRC_FREQ1_DRAMTMG0(0), 0x0b070508 }, |
| 76 | { DDRC_FREQ1_DRAMTMG1(0), 0x0003040b }, |
| 77 | { DDRC_FREQ1_DRAMTMG2(0), 0x0305090c }, |
| 78 | { DDRC_FREQ1_DRAMTMG3(0), 0x00505000 }, |
| 79 | { DDRC_FREQ1_DRAMTMG4(0), 0x04040204 }, |
| 80 | { DDRC_FREQ1_DRAMTMG5(0), 0x02030303 }, |
| 81 | { DDRC_FREQ1_DRAMTMG6(0), 0x01010004 }, |
| 82 | { DDRC_FREQ1_DRAMTMG7(0), 0x0301 }, |
| 83 | { DDRC_FREQ1_DRAMTMG12(0), 0x00020300 }, |
| 84 | { DDRC_FREQ1_DRAMTMG13(0), 0x0a100002 }, |
| 85 | { DDRC_FREQ1_DRAMTMG14(0), 0x31 }, |
| 86 | { DDRC_FREQ1_DRAMTMG17(0), 0x00220011 }, |
| 87 | { DDRC_FREQ1_ZQCTL0(0), 0xc0a70006 }, |
| 88 | { DDRC_FREQ1_DFITMG0(0), 0x03858202 }, |
| 89 | { DDRC_FREQ1_DFITMG1(0), 0x00080303 }, |
| 90 | { DDRC_FREQ1_DFITMG2(0), 0x0502 }, |
| 91 | { DDRC_ODTMAP(0), 0 }, |
| 92 | { DDRC_SCHED(0), 0x29001505 }, |
| 93 | { DDRC_SCHED1(0), 0x2c }, |
| 94 | { DDRC_PERFHPR1(0), 0x5900575b }, |
| 95 | { DDRC_PERFLPR1(0), 0x90000096 }, |
| 96 | { DDRC_PERFWR1(0), 0x1000012c }, |
| 97 | { DDRC_DBG0(0), 0x16 }, |
| 98 | { DDRC_DBG1(0), 0 }, |
| 99 | { DDRC_DBGCMD(0), 0 }, |
| 100 | { DDRC_SWCTL(0), 1 }, |
| 101 | { DDRC_POISONCFG(0), 0x11 }, |
| 102 | { DDRC_PCCFG(0), 0x0111 }, |
| 103 | { DDRC_PCFGR_0(0), 0x10f3 }, |
| 104 | { DDRC_PCFGW_0(0), 0x72ff }, |
| 105 | { DDRC_PCTRL_0(0), 1 }, |
| 106 | { DDRC_PCFGQOS0_0(0), 0x0e00 }, |
| 107 | { DDRC_PCFGQOS1_0(0), 0x0062ffff }, |
| 108 | { DDRC_PCFGWQOS0_0(0), 0x0e00 }, |
| 109 | { DDRC_PCFGWQOS1_0(0), 0xffff }, |
| 110 | }; |
| 111 | |
| 112 | /* PHY Initialize Configuration */ |
| 113 | static struct dram_cfg_param lpddr4_ddrphy_cfg[] = { |
| 114 | { 0x100a0, 0 }, |
| 115 | { 0x100a1, 1 }, |
| 116 | { 0x100a2, 2 }, |
| 117 | { 0x100a3, 3 }, |
| 118 | { 0x100a4, 4 }, |
| 119 | { 0x100a5, 5 }, |
| 120 | { 0x100a6, 6 }, |
| 121 | { 0x100a7, 7 }, |
| 122 | { 0x110a0, 0 }, |
| 123 | { 0x110a1, 1 }, |
| 124 | { 0x110a2, 2 }, |
| 125 | { 0x110a3, 3 }, |
| 126 | { 0x110a4, 4 }, |
| 127 | { 0x110a5, 5 }, |
| 128 | { 0x110a6, 6 }, |
| 129 | { 0x110a7, 7 }, |
| 130 | { 0x120a0, 0 }, |
| 131 | { 0x120a1, 1 }, |
| 132 | { 0x120a2, 2 }, |
| 133 | { 0x120a3, 3 }, |
| 134 | { 0x120a4, 4 }, |
| 135 | { 0x120a5, 5 }, |
| 136 | { 0x120a6, 6 }, |
| 137 | { 0x120a7, 7 }, |
| 138 | { 0x130a0, 0 }, |
| 139 | { 0x130a1, 1 }, |
| 140 | { 0x130a2, 2 }, |
| 141 | { 0x130a3, 3 }, |
| 142 | { 0x130a4, 4 }, |
| 143 | { 0x130a5, 5 }, |
| 144 | { 0x130a6, 6 }, |
| 145 | { 0x130a7, 7 }, |
| 146 | { 0x1005f, 0x01ff }, |
| 147 | { 0x1015f, 0x01ff }, |
| 148 | { 0x1105f, 0x01ff }, |
| 149 | { 0x1115f, 0x01ff }, |
| 150 | { 0x1205f, 0x01ff }, |
| 151 | { 0x1215f, 0x01ff }, |
| 152 | { 0x1305f, 0x01ff }, |
| 153 | { 0x1315f, 0x01ff }, |
| 154 | { 0x11005f, 0x01ff }, |
| 155 | { 0x11015f, 0x01ff }, |
| 156 | { 0x11105f, 0x01ff }, |
| 157 | { 0x11115f, 0x01ff }, |
| 158 | { 0x11205f, 0x01ff }, |
| 159 | { 0x11215f, 0x01ff }, |
| 160 | { 0x11305f, 0x01ff }, |
| 161 | { 0x11315f, 0x01ff }, |
| 162 | { 0x0055, 0x01ff }, |
| 163 | { 0x1055, 0x01ff }, |
| 164 | { 0x2055, 0x01ff }, |
| 165 | { 0x3055, 0x01ff }, |
| 166 | { 0x4055, 0x01ff }, |
| 167 | { 0x5055, 0x01ff }, |
| 168 | { 0x6055, 0x01ff }, |
| 169 | { 0x7055, 0x01ff }, |
| 170 | { 0x8055, 0x01ff }, |
| 171 | { 0x9055, 0x01ff }, |
| 172 | { 0x200c5, 0x19 }, |
| 173 | { 0x1200c5, 7 }, |
| 174 | { 0x2002e, 2 }, |
| 175 | { 0x12002e, 1 }, |
| 176 | { 0x90204, 0 }, |
| 177 | { 0x190204, 0 }, |
| 178 | { 0x20024, 0x01ab }, |
| 179 | { 0x2003a, 0 }, |
| 180 | { 0x120024, 0x01ab }, |
| 181 | { 0x2003a, 0 }, |
| 182 | { 0x20056, 3 }, |
| 183 | { 0x120056, 3 }, |
| 184 | { 0x1004d, 0x0e00 }, |
| 185 | { 0x1014d, 0x0e00 }, |
| 186 | { 0x1104d, 0x0e00 }, |
| 187 | { 0x1114d, 0x0e00 }, |
| 188 | { 0x1204d, 0x0e00 }, |
| 189 | { 0x1214d, 0x0e00 }, |
| 190 | { 0x1304d, 0x0e00 }, |
| 191 | { 0x1314d, 0x0e00 }, |
| 192 | { 0x11004d, 0x0e00 }, |
| 193 | { 0x11014d, 0x0e00 }, |
| 194 | { 0x11104d, 0x0e00 }, |
| 195 | { 0x11114d, 0x0e00 }, |
| 196 | { 0x11204d, 0x0e00 }, |
| 197 | { 0x11214d, 0x0e00 }, |
| 198 | { 0x11304d, 0x0e00 }, |
| 199 | { 0x11314d, 0x0e00 }, |
| 200 | { 0x10049, 0x0eba }, |
| 201 | { 0x10149, 0x0eba }, |
| 202 | { 0x11049, 0x0eba }, |
| 203 | { 0x11149, 0x0eba }, |
| 204 | { 0x12049, 0x0eba }, |
| 205 | { 0x12149, 0x0eba }, |
| 206 | { 0x13049, 0x0eba }, |
| 207 | { 0x13149, 0x0eba }, |
| 208 | { 0x110049, 0x0eba }, |
| 209 | { 0x110149, 0x0eba }, |
| 210 | { 0x111049, 0x0eba }, |
| 211 | { 0x111149, 0x0eba }, |
| 212 | { 0x112049, 0x0eba }, |
| 213 | { 0x112149, 0x0eba }, |
| 214 | { 0x113049, 0x0eba }, |
| 215 | { 0x113149, 0x0eba }, |
| 216 | { 0x0043, 0x63 }, |
| 217 | { 0x1043, 0x63 }, |
| 218 | { 0x2043, 0x63 }, |
| 219 | { 0x3043, 0x63 }, |
| 220 | { 0x4043, 0x63 }, |
| 221 | { 0x5043, 0x63 }, |
| 222 | { 0x6043, 0x63 }, |
| 223 | { 0x7043, 0x63 }, |
| 224 | { 0x8043, 0x63 }, |
| 225 | { 0x9043, 0x63 }, |
| 226 | { 0x20018, 3 }, |
| 227 | { 0x20075, 4 }, |
| 228 | { 0x20050, 0 }, |
| 229 | { 0x20008, 0x0320 }, |
| 230 | { 0x120008, 0xa7 }, |
| 231 | { 0x20088, 9 }, |
| 232 | { 0x200b2, 0xdc }, |
| 233 | { 0x10043, 0x05a1 }, |
| 234 | { 0x10143, 0x05a1 }, |
| 235 | { 0x11043, 0x05a1 }, |
| 236 | { 0x11143, 0x05a1 }, |
| 237 | { 0x12043, 0x05a1 }, |
| 238 | { 0x12143, 0x05a1 }, |
| 239 | { 0x13043, 0x05a1 }, |
| 240 | { 0x13143, 0x05a1 }, |
| 241 | { 0x1200b2, 0xdc }, |
| 242 | { 0x110043, 0x05a1 }, |
| 243 | { 0x110143, 0x05a1 }, |
| 244 | { 0x111043, 0x05a1 }, |
| 245 | { 0x111143, 0x05a1 }, |
| 246 | { 0x112043, 0x05a1 }, |
| 247 | { 0x112143, 0x05a1 }, |
| 248 | { 0x113043, 0x05a1 }, |
| 249 | { 0x113143, 0x05a1 }, |
| 250 | { 0x200fa, 1 }, |
| 251 | { 0x1200fa, 1 }, |
| 252 | { 0x20019, 1 }, |
| 253 | { 0x120019, 1 }, |
| 254 | { 0x200f0, 0 }, |
| 255 | { 0x200f1, 0 }, |
| 256 | { 0x200f2, 0x4444 }, |
| 257 | { 0x200f3, 0x8888 }, |
| 258 | { 0x200f4, 0x5555 }, |
| 259 | { 0x200f5, 0 }, |
| 260 | { 0x200f6, 0 }, |
| 261 | { 0x200f7, 0xf000 }, |
| 262 | { 0x20025, 0 }, |
| 263 | { 0x2002d, 0 }, |
| 264 | { 0x12002d, 0 }, |
| 265 | { 0x200c7, 0x80 }, |
| 266 | { 0x1200c7, 0x80 }, |
| 267 | { 0x200ca, 0x0106 }, |
| 268 | { 0x1200ca, 0x0106 }, |
| 269 | { 0x20110, 2 }, |
| 270 | { 0x20111, 3 }, |
| 271 | { 0x20112, 4 }, |
| 272 | { 0x20113, 5 }, |
| 273 | { 0x20114, 0 }, |
| 274 | { 0x20115, 1 }, |
| 275 | }; |
| 276 | |
| 277 | /* P0 message block parameter for training firmware */ |
| 278 | static struct dram_cfg_param lpddr4_fsp0_cfg[] = { |
| 279 | { 0xd0000, 0 }, |
| 280 | { 0x54003, 0x0c80 }, |
| 281 | { 0x54004, 2 }, |
| 282 | { 0x54005, 0x2228 }, |
| 283 | { 0x54006, LPDDR4_PHY_VREF_VALUE }, |
| 284 | { 0x54008, 0x131f }, |
| 285 | { 0x54009, LPDDR4_HDT_CTL_3200_1D }, |
| 286 | { 0x5400b, 2 }, |
| 287 | { 0x54012, 0x10 | (CH2_LPDDR4_CS << 8) }, |
| 288 | { 0x54019, 0x2dd4 }, |
| 289 | { 0x5401a, 0x31 }, |
| 290 | { 0x5401b, 0x4a66 }, |
| 291 | { 0x5401c, 0x4a08 }, |
| 292 | { 0x5401e, 0x16 }, |
| 293 | { 0x5401f, 0x2dd4 }, |
| 294 | { 0x54020, 0x31 }, |
| 295 | { 0x54021, 0x4a66 }, |
| 296 | { 0x54022, 0x4a08 }, |
| 297 | { 0x54024, 0x16 }, |
| 298 | { 0x5402b, 0x1000 }, |
| 299 | { 0x5402c, CH2_LPDDR4_CS }, |
| 300 | { 0x54032, 0xd400 }, |
| 301 | { 0x54033, 0x312d }, |
| 302 | { 0x54034, 0x6600 }, |
| 303 | { 0x54035, 0x084a }, |
| 304 | { 0x54036, 0x4a }, |
| 305 | { 0x54037, 0x1600 }, |
| 306 | { 0x54038, 0xd400 }, |
| 307 | { 0x54039, 0x312d }, |
| 308 | { 0x5403a, 0x6600 }, |
| 309 | { 0x5403b, 0x084a }, |
| 310 | { 0x5403c, 0x4a }, |
| 311 | { 0x5403d, 0x1600 }, |
| 312 | { 0xd0000, 1 }, |
| 313 | }; |
| 314 | |
| 315 | |
| 316 | /* P1 message block parameter for training firmware */ |
| 317 | static struct dram_cfg_param lpddr4_fsp1_cfg[] = { |
| 318 | { 0xd0000, 0 }, |
| 319 | { 0x54002, 1 }, |
| 320 | { 0x54003, 0x029c }, |
| 321 | { 0x54004, 2 }, |
| 322 | { 0x54005, 0x2228 }, |
| 323 | { 0x54006, LPDDR4_PHY_VREF_VALUE }, |
| 324 | { 0x54008, 0x121f }, |
| 325 | { 0x54009, LPDDR4_HDT_CTL_3200_1D }, |
| 326 | { 0x5400b, 2 }, |
| 327 | { 0x54012, 0x10 | (CH2_LPDDR4_CS << 8) }, |
| 328 | { 0x54019, 0x0994 }, |
| 329 | { 0x5401a, 0x31 }, |
| 330 | { 0x5401b, 0x4a66 }, |
| 331 | { 0x5401c, 0x4a08 }, |
| 332 | { 0x5401e, 0x16 }, |
| 333 | { 0x5401f, 0x0994 }, |
| 334 | { 0x54020, 0x31 }, |
| 335 | { 0x54021, 0x4a66 }, |
| 336 | { 0x54022, 0x4a08 }, |
| 337 | { 0x54024, 0x16 }, |
| 338 | { 0x5402b, 0x1000 }, |
| 339 | { 0x5402c, CH2_LPDDR4_CS }, |
| 340 | { 0x54032, 0x9400 }, |
| 341 | { 0x54033, 0x3109 }, |
| 342 | { 0x54034, 0x6600 }, |
| 343 | { 0x54035, 0x084a }, |
| 344 | { 0x54036, 0x4a }, |
| 345 | { 0x54037, 0x1600 }, |
| 346 | { 0x54038, 0x9400 }, |
| 347 | { 0x54039, 0x3109 }, |
| 348 | { 0x5403a, 0x6600 }, |
| 349 | { 0x5403b, 0x084a }, |
| 350 | { 0x5403c, 0x4a }, |
| 351 | { 0x5403d, 0x1600 }, |
| 352 | { 0xd0000, 1 }, |
| 353 | }; |
| 354 | |
| 355 | |
| 356 | /* P0 2D message block parameter for training firmware */ |
| 357 | static struct dram_cfg_param lpddr4_fsp0_2d_cfg[] = { |
| 358 | { 0xd0000, 0 }, |
| 359 | { 0x54003, 0x0c80 }, |
| 360 | { 0x54004, 2 }, |
| 361 | { 0x54005, 0x2228 }, |
| 362 | { 0x54006, LPDDR4_PHY_VREF_VALUE }, |
| 363 | { 0x54008, 0x61 }, |
| 364 | { 0x54009, LPDDR4_HDT_CTL_3200_1D }, |
| 365 | { 0x5400b, 2 }, |
| 366 | { 0x5400d, 0x0100 }, |
| 367 | { 0x5400f, 0x0100 }, |
| 368 | { 0x54010, 0x1f7f }, |
| 369 | { 0x54012, 0x10 | (CH2_LPDDR4_CS << 8) }, |
| 370 | { 0x54019, 0x2dd4 }, |
| 371 | { 0x5401a, 0x31 }, |
| 372 | { 0x5401b, 0x4a66 }, |
| 373 | { 0x5401c, 0x4a08 }, |
| 374 | { 0x5401e, 0x16 }, |
| 375 | { 0x5401f, 0x2dd4 }, |
| 376 | { 0x54020, 0x31 }, |
| 377 | { 0x54021, 0x4a66 }, |
| 378 | { 0x54022, 0x4a08 }, |
| 379 | { 0x54024, 0x16 }, |
| 380 | { 0x5402b, 0x1000 }, |
| 381 | { 0x5402c, CH2_LPDDR4_CS }, |
| 382 | { 0x54032, 0xd400 }, |
| 383 | { 0x54033, 0x312d }, |
| 384 | { 0x54034, 0x6600 }, |
| 385 | { 0x54035, 0x084a }, |
| 386 | { 0x54036, 0x4a }, |
| 387 | { 0x54037, 0x1600 }, |
| 388 | { 0x54038, 0xd400 }, |
| 389 | { 0x54039, 0x312d }, |
| 390 | { 0x5403a, 0x6600 }, |
| 391 | { 0x5403b, 0x084a }, |
| 392 | { 0x5403c, 0x4a }, |
| 393 | { 0x5403d, 0x1600 }, |
| 394 | { 0xd0000, 1 }, |
| 395 | }; |
| 396 | |
| 397 | /* DRAM PHY init engine image */ |
| 398 | static struct dram_cfg_param lpddr4_phy_pie[] = { |
| 399 | { 0xd0000, 0 }, |
| 400 | { 0x90000, 0x10 }, |
| 401 | { 0x90001, 0x0400 }, |
| 402 | { 0x90002, 0x010e }, |
| 403 | { 0x90003, 0 }, |
| 404 | { 0x90004, 0 }, |
| 405 | { 0x90005, 8 }, |
| 406 | { 0x90029, 0x0b }, |
| 407 | { 0x9002a, 0x0480 }, |
| 408 | { 0x9002b, 0x0109 }, |
| 409 | { 0x9002c, 8 }, |
| 410 | { 0x9002d, 0x0448 }, |
| 411 | { 0x9002e, 0x0139 }, |
| 412 | { 0x9002f, 8 }, |
| 413 | { 0x90030, 0x0478 }, |
| 414 | { 0x90031, 0x0109 }, |
| 415 | { 0x90032, 0 }, |
| 416 | { 0x90033, 0xe8 }, |
| 417 | { 0x90034, 0x0109 }, |
| 418 | { 0x90035, 2 }, |
| 419 | { 0x90036, 0x10 }, |
| 420 | { 0x90037, 0x0139 }, |
| 421 | { 0x90038, 0x0f }, |
| 422 | { 0x90039, 0x07c0 }, |
| 423 | { 0x9003a, 0x0139 }, |
| 424 | { 0x9003b, 0x44 }, |
| 425 | { 0x9003c, 0x0630 }, |
| 426 | { 0x9003d, 0x0159 }, |
| 427 | { 0x9003e, 0x014f }, |
| 428 | { 0x9003f, 0x0630 }, |
| 429 | { 0x90040, 0x0159 }, |
| 430 | { 0x90041, 0x47 }, |
| 431 | { 0x90042, 0x0630 }, |
| 432 | { 0x90043, 0x0149 }, |
| 433 | { 0x90044, 0x4f }, |
| 434 | { 0x90045, 0x0630 }, |
| 435 | { 0x90046, 0x0179 }, |
| 436 | { 0x90047, 8 }, |
| 437 | { 0x90048, 0xe0 }, |
| 438 | { 0x90049, 0x0109 }, |
| 439 | { 0x9004a, 0 }, |
| 440 | { 0x9004b, 0x07c8 }, |
| 441 | { 0x9004c, 0x0109 }, |
| 442 | { 0x9004d, 0 }, |
| 443 | { 0x9004e, 1 }, |
| 444 | { 0x9004f, 8 }, |
| 445 | { 0x90050, 0 }, |
| 446 | { 0x90051, 0x045a }, |
| 447 | { 0x90052, 9 }, |
| 448 | { 0x90053, 0 }, |
| 449 | { 0x90054, 0x0448 }, |
| 450 | { 0x90055, 0x0109 }, |
| 451 | { 0x90056, 0x40 }, |
| 452 | { 0x90057, 0x0630 }, |
| 453 | { 0x90058, 0x0179 }, |
| 454 | { 0x90059, 1 }, |
| 455 | { 0x9005a, 0x0618 }, |
| 456 | { 0x9005b, 0x0109 }, |
| 457 | { 0x9005c, 0x40c0 }, |
| 458 | { 0x9005d, 0x0630 }, |
| 459 | { 0x9005e, 0x0149 }, |
| 460 | { 0x9005f, 8 }, |
| 461 | { 0x90060, 4 }, |
| 462 | { 0x90061, 0x48 }, |
| 463 | { 0x90062, 0x4040 }, |
| 464 | { 0x90063, 0x0630 }, |
| 465 | { 0x90064, 0x0149 }, |
| 466 | { 0x90065, 0 }, |
| 467 | { 0x90066, 4 }, |
| 468 | { 0x90067, 0x48 }, |
| 469 | { 0x90068, 0x40 }, |
| 470 | { 0x90069, 0x0630 }, |
| 471 | { 0x9006a, 0x0149 }, |
| 472 | { 0x9006b, 0x10 }, |
| 473 | { 0x9006c, 4 }, |
| 474 | { 0x9006d, 0x18 }, |
| 475 | { 0x9006e, 0 }, |
| 476 | { 0x9006f, 4 }, |
| 477 | { 0x90070, 0x78 }, |
| 478 | { 0x90071, 0x0549 }, |
| 479 | { 0x90072, 0x0630 }, |
| 480 | { 0x90073, 0x0159 }, |
| 481 | { 0x90074, 0x0d49 }, |
| 482 | { 0x90075, 0x0630 }, |
| 483 | { 0x90076, 0x0159 }, |
| 484 | { 0x90077, 0x094a }, |
| 485 | { 0x90078, 0x0630 }, |
| 486 | { 0x90079, 0x0159 }, |
| 487 | { 0x9007a, 0x0441 }, |
| 488 | { 0x9007b, 0x0630 }, |
| 489 | { 0x9007c, 0x0149 }, |
| 490 | { 0x9007d, 0x42 }, |
| 491 | { 0x9007e, 0x0630 }, |
| 492 | { 0x9007f, 0x0149 }, |
| 493 | { 0x90080, 1 }, |
| 494 | { 0x90081, 0x0630 }, |
| 495 | { 0x90082, 0x0149 }, |
| 496 | { 0x90083, 0 }, |
| 497 | { 0x90084, 0xe0 }, |
| 498 | { 0x90085, 0x0109 }, |
| 499 | { 0x90086, 0x0a }, |
| 500 | { 0x90087, 0x10 }, |
| 501 | { 0x90088, 0x0109 }, |
| 502 | { 0x90089, 9 }, |
| 503 | { 0x9008a, 0x03c0 }, |
| 504 | { 0x9008b, 0x0149 }, |
| 505 | { 0x9008c, 9 }, |
| 506 | { 0x9008d, 0x03c0 }, |
| 507 | { 0x9008e, 0x0159 }, |
| 508 | { 0x9008f, 0x18 }, |
| 509 | { 0x90090, 0x10 }, |
| 510 | { 0x90091, 0x0109 }, |
| 511 | { 0x90092, 0 }, |
| 512 | { 0x90093, 0x03c0 }, |
| 513 | { 0x90094, 0x0109 }, |
| 514 | { 0x90095, 0x18 }, |
| 515 | { 0x90096, 4 }, |
| 516 | { 0x90097, 0x48 }, |
| 517 | { 0x90098, 0x18 }, |
| 518 | { 0x90099, 4 }, |
| 519 | { 0x9009a, 0x58 }, |
| 520 | { 0x9009b, 0x0a }, |
| 521 | { 0x9009c, 0x10 }, |
| 522 | { 0x9009d, 0x0109 }, |
| 523 | { 0x9009e, 2 }, |
| 524 | { 0x9009f, 0x10 }, |
| 525 | { 0x900a0, 0x0109 }, |
| 526 | { 0x900a1, 5 }, |
| 527 | { 0x900a2, 0x07c0 }, |
| 528 | { 0x900a3, 0x0109 }, |
| 529 | { 0x900a4, 0x10 }, |
| 530 | { 0x900a5, 0x10 }, |
| 531 | { 0x900a6, 0x0109 }, |
| 532 | { 0x40000, 0x0811 }, |
| 533 | { 0x40020, 0x0880 }, |
| 534 | { 0x40040, 0 }, |
| 535 | { 0x40060, 0 }, |
| 536 | { 0x40001, 0x4008 }, |
| 537 | { 0x40021, 0x83 }, |
| 538 | { 0x40041, 0x4f }, |
| 539 | { 0x40061, 0 }, |
| 540 | { 0x40002, 0x4040 }, |
| 541 | { 0x40022, 0x83 }, |
| 542 | { 0x40042, 0x51 }, |
| 543 | { 0x40062, 0 }, |
| 544 | { 0x40003, 0x0811 }, |
| 545 | { 0x40023, 0x0880 }, |
| 546 | { 0x40043, 0 }, |
| 547 | { 0x40063, 0 }, |
| 548 | { 0x40004, 0x0720 }, |
| 549 | { 0x40024, 0x0f }, |
| 550 | { 0x40044, 0x1740 }, |
| 551 | { 0x40064, 0 }, |
| 552 | { 0x40005, 0x16 }, |
| 553 | { 0x40025, 0x83 }, |
| 554 | { 0x40045, 0x4b }, |
| 555 | { 0x40065, 0 }, |
| 556 | { 0x40006, 0x0716 }, |
| 557 | { 0x40026, 0x0f }, |
| 558 | { 0x40046, 0x2001 }, |
| 559 | { 0x40066, 0 }, |
| 560 | { 0x40007, 0x0716 }, |
| 561 | { 0x40027, 0x0f }, |
| 562 | { 0x40047, 0x2800 }, |
| 563 | { 0x40067, 0 }, |
| 564 | { 0x40008, 0x0716 }, |
| 565 | { 0x40028, 0x0f }, |
| 566 | { 0x40048, 0x0f00 }, |
| 567 | { 0x40068, 0 }, |
| 568 | { 0x40009, 0x0720 }, |
| 569 | { 0x40029, 0x0f }, |
| 570 | { 0x40049, 0x1400 }, |
| 571 | { 0x40069, 0 }, |
| 572 | { 0x4000a, 0x0e08 }, |
| 573 | { 0x4002a, 0x0c15 }, |
| 574 | { 0x4004a, 0 }, |
| 575 | { 0x4006a, 0 }, |
| 576 | { 0x4000b, 0x0623 }, |
| 577 | { 0x4002b, 0x15 }, |
| 578 | { 0x4004b, 0 }, |
| 579 | { 0x4006b, 0 }, |
| 580 | { 0x4000c, 0x4028 }, |
| 581 | { 0x4002c, 0x80 }, |
| 582 | { 0x4004c, 0 }, |
| 583 | { 0x4006c, 0 }, |
| 584 | { 0x4000d, 0x0e08 }, |
| 585 | { 0x4002d, 0x0c1a }, |
| 586 | { 0x4004d, 0 }, |
| 587 | { 0x4006d, 0 }, |
| 588 | { 0x4000e, 0x0623 }, |
| 589 | { 0x4002e, 0x1a }, |
| 590 | { 0x4004e, 0 }, |
| 591 | { 0x4006e, 0 }, |
| 592 | { 0x4000f, 0x4040 }, |
| 593 | { 0x4002f, 0x80 }, |
| 594 | { 0x4004f, 0 }, |
| 595 | { 0x4006f, 0 }, |
| 596 | { 0x40010, 0x2604 }, |
| 597 | { 0x40030, 0x15 }, |
| 598 | { 0x40050, 0 }, |
| 599 | { 0x40070, 0 }, |
| 600 | { 0x40011, 0x0708 }, |
| 601 | { 0x40031, 5 }, |
| 602 | { 0x40051, 0 }, |
| 603 | { 0x40071, 0x2002 }, |
| 604 | { 0x40012, 8 }, |
| 605 | { 0x40032, 0x80 }, |
| 606 | { 0x40052, 0 }, |
| 607 | { 0x40072, 0 }, |
| 608 | { 0x40013, 0x2604 }, |
| 609 | { 0x40033, 0x1a }, |
| 610 | { 0x40053, 0 }, |
| 611 | { 0x40073, 0 }, |
| 612 | { 0x40014, 0x0708 }, |
| 613 | { 0x40034, 0x0a }, |
| 614 | { 0x40054, 0 }, |
| 615 | { 0x40074, 0x2002 }, |
| 616 | { 0x40015, 0x4040 }, |
| 617 | { 0x40035, 0x80 }, |
| 618 | { 0x40055, 0 }, |
| 619 | { 0x40075, 0 }, |
| 620 | { 0x40016, 0x060a }, |
| 621 | { 0x40036, 0x15 }, |
| 622 | { 0x40056, 0x1200 }, |
| 623 | { 0x40076, 0 }, |
| 624 | { 0x40017, 0x061a }, |
| 625 | { 0x40037, 0x15 }, |
| 626 | { 0x40057, 0x1300 }, |
| 627 | { 0x40077, 0 }, |
| 628 | { 0x40018, 0x060a }, |
| 629 | { 0x40038, 0x1a }, |
| 630 | { 0x40058, 0x1200 }, |
| 631 | { 0x40078, 0 }, |
| 632 | { 0x40019, 0x0642 }, |
| 633 | { 0x40039, 0x1a }, |
| 634 | { 0x40059, 0x1300 }, |
| 635 | { 0x40079, 0 }, |
| 636 | { 0x4001a, 0x4808 }, |
| 637 | { 0x4003a, 0x0880 }, |
| 638 | { 0x4005a, 0 }, |
| 639 | { 0x4007a, 0 }, |
| 640 | { 0x900a7, 0 }, |
| 641 | { 0x900a8, 0x0790 }, |
| 642 | { 0x900a9, 0x011a }, |
| 643 | { 0x900aa, 8 }, |
| 644 | { 0x900ab, 0x07aa }, |
| 645 | { 0x900ac, 0x2a }, |
| 646 | { 0x900ad, 0x10 }, |
| 647 | { 0x900ae, 0x07b2 }, |
| 648 | { 0x900af, 0x2a }, |
| 649 | { 0x900b0, 0 }, |
| 650 | { 0x900b1, 0x07c8 }, |
| 651 | { 0x900b2, 0x0109 }, |
| 652 | { 0x900b3, 0x10 }, |
| 653 | { 0x900b4, 0x02a8 }, |
| 654 | { 0x900b5, 0x0129 }, |
| 655 | { 0x900b6, 8 }, |
| 656 | { 0x900b7, 0x0370 }, |
| 657 | { 0x900b8, 0x0129 }, |
| 658 | { 0x900b9, 0x0a }, |
| 659 | { 0x900ba, 0x03c8 }, |
| 660 | { 0x900bb, 0x01a9 }, |
| 661 | { 0x900bc, 0x0c }, |
| 662 | { 0x900bd, 0x0408 }, |
| 663 | { 0x900be, 0x0199 }, |
| 664 | { 0x900bf, 0x14 }, |
| 665 | { 0x900c0, 0x0790 }, |
| 666 | { 0x900c1, 0x011a }, |
| 667 | { 0x900c2, 8 }, |
| 668 | { 0x900c3, 4 }, |
| 669 | { 0x900c4, 0x18 }, |
| 670 | { 0x900c5, 0x0e }, |
| 671 | { 0x900c6, 0x0408 }, |
| 672 | { 0x900c7, 0x0199 }, |
| 673 | { 0x900c8, 8 }, |
| 674 | { 0x900c9, 0x8568 }, |
| 675 | { 0x900ca, 0x0108 }, |
| 676 | { 0x900cb, 0x18 }, |
| 677 | { 0x900cc, 0x0790 }, |
| 678 | { 0x900cd, 0x016a }, |
| 679 | { 0x900ce, 8 }, |
| 680 | { 0x900cf, 0x01d8 }, |
| 681 | { 0x900d0, 0x0169 }, |
| 682 | { 0x900d1, 0x10 }, |
| 683 | { 0x900d2, 0x8558 }, |
| 684 | { 0x900d3, 0x0168 }, |
| 685 | { 0x900d4, 0x70 }, |
| 686 | { 0x900d5, 0x0788 }, |
| 687 | { 0x900d6, 0x016a }, |
| 688 | { 0x900d7, 0x1ff8 }, |
| 689 | { 0x900d8, 0x85a8 }, |
| 690 | { 0x900d9, 0x01e8 }, |
| 691 | { 0x900da, 0x50 }, |
| 692 | { 0x900db, 0x0798 }, |
| 693 | { 0x900dc, 0x016a }, |
| 694 | { 0x900dd, 0x60 }, |
| 695 | { 0x900de, 0x07a0 }, |
| 696 | { 0x900df, 0x016a }, |
| 697 | { 0x900e0, 8 }, |
| 698 | { 0x900e1, 0x8310 }, |
| 699 | { 0x900e2, 0x0168 }, |
| 700 | { 0x900e3, 8 }, |
| 701 | { 0x900e4, 0xa310 }, |
| 702 | { 0x900e5, 0x0168 }, |
| 703 | { 0x900e6, 0x0a }, |
| 704 | { 0x900e7, 0x0408 }, |
| 705 | { 0x900e8, 0x0169 }, |
| 706 | { 0x900e9, 0x6e }, |
| 707 | { 0x900ea, 0 }, |
| 708 | { 0x900eb, 0x68 }, |
| 709 | { 0x900ec, 0 }, |
| 710 | { 0x900ed, 0x0408 }, |
| 711 | { 0x900ee, 0x0169 }, |
| 712 | { 0x900ef, 0 }, |
| 713 | { 0x900f0, 0x8310 }, |
| 714 | { 0x900f1, 0x0168 }, |
| 715 | { 0x900f2, 0 }, |
| 716 | { 0x900f3, 0xa310 }, |
| 717 | { 0x900f4, 0x0168 }, |
| 718 | { 0x900f5, 0x1ff8 }, |
| 719 | { 0x900f6, 0x85a8 }, |
| 720 | { 0x900f7, 0x01e8 }, |
| 721 | { 0x900f8, 0x68 }, |
| 722 | { 0x900f9, 0x0798 }, |
| 723 | { 0x900fa, 0x016a }, |
| 724 | { 0x900fb, 0x78 }, |
| 725 | { 0x900fc, 0x07a0 }, |
| 726 | { 0x900fd, 0x016a }, |
| 727 | { 0x900fe, 0x68 }, |
| 728 | { 0x900ff, 0x0790 }, |
| 729 | { 0x90100, 0x016a }, |
| 730 | { 0x90101, 8 }, |
| 731 | { 0x90102, 0x8b10 }, |
| 732 | { 0x90103, 0x0168 }, |
| 733 | { 0x90104, 8 }, |
| 734 | { 0x90105, 0xab10 }, |
| 735 | { 0x90106, 0x0168 }, |
| 736 | { 0x90107, 0x0a }, |
| 737 | { 0x90108, 0x0408 }, |
| 738 | { 0x90109, 0x0169 }, |
| 739 | { 0x9010a, 0x58 }, |
| 740 | { 0x9010b, 0 }, |
| 741 | { 0x9010c, 0x68 }, |
| 742 | { 0x9010d, 0 }, |
| 743 | { 0x9010e, 0x0408 }, |
| 744 | { 0x9010f, 0x0169 }, |
| 745 | { 0x90110, 0 }, |
| 746 | { 0x90111, 0x8b10 }, |
| 747 | { 0x90112, 0x0168 }, |
| 748 | { 0x90113, 0 }, |
| 749 | { 0x90114, 0xab10 }, |
| 750 | { 0x90115, 0x0168 }, |
| 751 | { 0x90116, 0 }, |
| 752 | { 0x90117, 0x01d8 }, |
| 753 | { 0x90118, 0x0169 }, |
| 754 | { 0x90119, 0x80 }, |
| 755 | { 0x9011a, 0x0790 }, |
| 756 | { 0x9011b, 0x016a }, |
| 757 | { 0x9011c, 0x18 }, |
| 758 | { 0x9011d, 0x07aa }, |
| 759 | { 0x9011e, 0x6a }, |
| 760 | { 0x9011f, 0x0a }, |
| 761 | { 0x90120, 0 }, |
| 762 | { 0x90121, 0x01e9 }, |
| 763 | { 0x90122, 8 }, |
| 764 | { 0x90123, 0x8080 }, |
| 765 | { 0x90124, 0x0108 }, |
| 766 | { 0x90125, 0x0f }, |
| 767 | { 0x90126, 0x0408 }, |
| 768 | { 0x90127, 0x0169 }, |
| 769 | { 0x90128, 0x0c }, |
| 770 | { 0x90129, 0 }, |
| 771 | { 0x9012a, 0x68 }, |
| 772 | { 0x9012b, 9 }, |
| 773 | { 0x9012c, 0 }, |
| 774 | { 0x9012d, 0x01a9 }, |
| 775 | { 0x9012e, 0 }, |
| 776 | { 0x9012f, 0x0408 }, |
| 777 | { 0x90130, 0x0169 }, |
| 778 | { 0x90131, 0 }, |
| 779 | { 0x90132, 0x8080 }, |
| 780 | { 0x90133, 0x0108 }, |
| 781 | { 0x90134, 8 }, |
| 782 | { 0x90135, 0x07aa }, |
| 783 | { 0x90136, 0x6a }, |
| 784 | { 0x90137, 0 }, |
| 785 | { 0x90138, 0x8568 }, |
| 786 | { 0x90139, 0x0108 }, |
| 787 | { 0x9013a, 0xb7 }, |
| 788 | { 0x9013b, 0x0790 }, |
| 789 | { 0x9013c, 0x016a }, |
| 790 | { 0x9013d, 0x1f }, |
| 791 | { 0x9013e, 0 }, |
| 792 | { 0x9013f, 0x68 }, |
| 793 | { 0x90140, 8 }, |
| 794 | { 0x90141, 0x8558 }, |
| 795 | { 0x90142, 0x0168 }, |
| 796 | { 0x90143, 0x0f }, |
| 797 | { 0x90144, 0x0408 }, |
| 798 | { 0x90145, 0x0169 }, |
| 799 | { 0x90146, 0x0c }, |
| 800 | { 0x90147, 0 }, |
| 801 | { 0x90148, 0x68 }, |
| 802 | { 0x90149, 0 }, |
| 803 | { 0x9014a, 0x0408 }, |
| 804 | { 0x9014b, 0x0169 }, |
| 805 | { 0x9014c, 0 }, |
| 806 | { 0x9014d, 0x8558 }, |
| 807 | { 0x9014e, 0x0168 }, |
| 808 | { 0x9014f, 8 }, |
| 809 | { 0x90150, 0x03c8 }, |
| 810 | { 0x90151, 0x01a9 }, |
| 811 | { 0x90152, 3 }, |
| 812 | { 0x90153, 0x0370 }, |
| 813 | { 0x90154, 0x0129 }, |
| 814 | { 0x90155, 0x20 }, |
| 815 | { 0x90156, 0x02aa }, |
| 816 | { 0x90157, 9 }, |
| 817 | { 0x90158, 0 }, |
| 818 | { 0x90159, 0x0400 }, |
| 819 | { 0x9015a, 0x010e }, |
| 820 | { 0x9015b, 8 }, |
| 821 | { 0x9015c, 0xe8 }, |
| 822 | { 0x9015d, 0x0109 }, |
| 823 | { 0x9015e, 0 }, |
| 824 | { 0x9015f, 0x8140 }, |
| 825 | { 0x90160, 0x010c }, |
| 826 | { 0x90161, 0x10 }, |
| 827 | { 0x90162, 0x8138 }, |
| 828 | { 0x90163, 0x010c }, |
| 829 | { 0x90164, 8 }, |
| 830 | { 0x90165, 0x07c8 }, |
| 831 | { 0x90166, 0x0101 }, |
| 832 | { 0x90167, 8 }, |
| 833 | { 0x90168, 0 }, |
| 834 | { 0x90169, 8 }, |
| 835 | { 0x9016a, 8 }, |
| 836 | { 0x9016b, 0x0448 }, |
| 837 | { 0x9016c, 0x0109 }, |
| 838 | { 0x9016d, 0x0f }, |
| 839 | { 0x9016e, 0x07c0 }, |
| 840 | { 0x9016f, 0x0109 }, |
| 841 | { 0x90170, 0 }, |
| 842 | { 0x90171, 0xe8 }, |
| 843 | { 0x90172, 0x0109 }, |
| 844 | { 0x90173, 0x47 }, |
| 845 | { 0x90174, 0x0630 }, |
| 846 | { 0x90175, 0x0109 }, |
| 847 | { 0x90176, 8 }, |
| 848 | { 0x90177, 0x0618 }, |
| 849 | { 0x90178, 0x0109 }, |
| 850 | { 0x90179, 8 }, |
| 851 | { 0x9017a, 0xe0 }, |
| 852 | { 0x9017b, 0x0109 }, |
| 853 | { 0x9017c, 0 }, |
| 854 | { 0x9017d, 0x07c8 }, |
| 855 | { 0x9017e, 0x0109 }, |
| 856 | { 0x9017f, 8 }, |
| 857 | { 0x90180, 0x8140 }, |
| 858 | { 0x90181, 0x010c }, |
| 859 | { 0x90182, 0 }, |
| 860 | { 0x90183, 1 }, |
| 861 | { 0x90184, 8 }, |
| 862 | { 0x90185, 8 }, |
| 863 | { 0x90186, 4 }, |
| 864 | { 0x90187, 8 }, |
| 865 | { 0x90188, 8 }, |
| 866 | { 0x90189, 0x07c8 }, |
| 867 | { 0x9018a, 0x0101 }, |
| 868 | { 0x90006, 0 }, |
| 869 | { 0x90007, 0 }, |
| 870 | { 0x90008, 8 }, |
| 871 | { 0x90009, 0 }, |
| 872 | { 0x9000a, 0 }, |
| 873 | { 0x9000b, 0 }, |
| 874 | { 0xd00e7, 0x0400 }, |
| 875 | { 0x90017, 0 }, |
| 876 | { 0x9001f, 0x2a }, |
| 877 | { 0x90026, 0x6a }, |
| 878 | { 0x400d0, 0 }, |
| 879 | { 0x400d1, 0x0101 }, |
| 880 | { 0x400d2, 0x0105 }, |
| 881 | { 0x400d3, 0x0107 }, |
| 882 | { 0x400d4, 0x010f }, |
| 883 | { 0x400d5, 0x0202 }, |
| 884 | { 0x400d6, 0x020a }, |
| 885 | { 0x400d7, 0x020b }, |
| 886 | { 0x2003a, 2 }, |
| 887 | { 0x2000b, 0x64 }, |
| 888 | { 0x2000c, 0xc8 }, |
| 889 | { 0x2000d, 0x07d0 }, |
| 890 | { 0x2000e, 0x2c }, |
| 891 | { 0x12000b, 0x14 }, |
| 892 | { 0x12000c, 0x29 }, |
| 893 | { 0x12000d, 0x01a1 }, |
| 894 | { 0x12000e, 0x10 }, |
| 895 | { 0x9000c, 0 }, |
| 896 | { 0x9000d, 0x0173 }, |
| 897 | { 0x9000e, 0x60 }, |
| 898 | { 0x9000f, 0x6110 }, |
| 899 | { 0x90010, 0x2152 }, |
| 900 | { 0x90011, 0xdfbd }, |
| 901 | { 0x90012, 0x60 }, |
| 902 | { 0x90013, 0x6152 }, |
| 903 | { 0x20010, 0x5a }, |
| 904 | { 0x20011, 3 }, |
| 905 | { 0x40080, 0xe0 }, |
| 906 | { 0x40081, 0x12 }, |
| 907 | { 0x40082, 0xe0 }, |
| 908 | { 0x40083, 0x12 }, |
| 909 | { 0x40084, 0xe0 }, |
| 910 | { 0x40085, 0x12 }, |
| 911 | { 0x140080, 0xe0 }, |
| 912 | { 0x140081, 0x12 }, |
| 913 | { 0x140082, 0xe0 }, |
| 914 | { 0x140083, 0x12 }, |
| 915 | { 0x140084, 0xe0 }, |
| 916 | { 0x140085, 0x12 }, |
| 917 | { 0x400fd, 0x0f }, |
| 918 | { 0x10011, 1 }, |
| 919 | { 0x10012, 1 }, |
| 920 | { 0x10013, 0x0180 }, |
| 921 | { 0x10018, 1 }, |
| 922 | { 0x10002, 0x6209 }, |
| 923 | { 0x100b2, 1 }, |
| 924 | { 0x101b4, 1 }, |
| 925 | { 0x102b4, 1 }, |
| 926 | { 0x103b4, 1 }, |
| 927 | { 0x104b4, 1 }, |
| 928 | { 0x105b4, 1 }, |
| 929 | { 0x106b4, 1 }, |
| 930 | { 0x107b4, 1 }, |
| 931 | { 0x108b4, 1 }, |
| 932 | { 0x11011, 1 }, |
| 933 | { 0x11012, 1 }, |
| 934 | { 0x11013, 0x0180 }, |
| 935 | { 0x11018, 1 }, |
| 936 | { 0x11002, 0x6209 }, |
| 937 | { 0x110b2, 1 }, |
| 938 | { 0x111b4, 1 }, |
| 939 | { 0x112b4, 1 }, |
| 940 | { 0x113b4, 1 }, |
| 941 | { 0x114b4, 1 }, |
| 942 | { 0x115b4, 1 }, |
| 943 | { 0x116b4, 1 }, |
| 944 | { 0x117b4, 1 }, |
| 945 | { 0x118b4, 1 }, |
| 946 | { 0x12011, 1 }, |
| 947 | { 0x12012, 1 }, |
| 948 | { 0x12013, 0x0180 }, |
| 949 | { 0x12018, 1 }, |
| 950 | { 0x12002, 0x6209 }, |
| 951 | { 0x120b2, 1 }, |
| 952 | { 0x121b4, 1 }, |
| 953 | { 0x122b4, 1 }, |
| 954 | { 0x123b4, 1 }, |
| 955 | { 0x124b4, 1 }, |
| 956 | { 0x125b4, 1 }, |
| 957 | { 0x126b4, 1 }, |
| 958 | { 0x127b4, 1 }, |
| 959 | { 0x128b4, 1 }, |
| 960 | { 0x13011, 1 }, |
| 961 | { 0x13012, 1 }, |
| 962 | { 0x13013, 0x0180 }, |
| 963 | { 0x13018, 1 }, |
| 964 | { 0x13002, 0x6209 }, |
| 965 | { 0x130b2, 1 }, |
| 966 | { 0x131b4, 1 }, |
| 967 | { 0x132b4, 1 }, |
| 968 | { 0x133b4, 1 }, |
| 969 | { 0x134b4, 1 }, |
| 970 | { 0x135b4, 1 }, |
| 971 | { 0x136b4, 1 }, |
| 972 | { 0x137b4, 1 }, |
| 973 | { 0x138b4, 1 }, |
| 974 | { 0x2003a, 2 }, |
| 975 | { 0xc0080, 2 }, |
| 976 | { 0xd0000, 1 } |
| 977 | }; |
| 978 | |
| 979 | static struct dram_fsp_msg lpddr4_dram_fsp_msg[] = { |
| 980 | { |
| 981 | /* P0 3200mts 1D */ |
| 982 | .drate = 3200, |
| 983 | .fw_type = FW_1D_IMAGE, |
| 984 | .fsp_cfg = lpddr4_fsp0_cfg, |
| 985 | .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg), |
| 986 | }, |
| 987 | { |
| 988 | /* P1 667mts 1D */ |
| 989 | .drate = 667, |
| 990 | .fw_type = FW_1D_IMAGE, |
| 991 | .fsp_cfg = lpddr4_fsp1_cfg, |
| 992 | .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp1_cfg), |
| 993 | }, |
| 994 | { |
| 995 | /* P0 3200mts 2D */ |
| 996 | .drate = 3200, |
| 997 | .fw_type = FW_2D_IMAGE, |
| 998 | .fsp_cfg = lpddr4_fsp0_2d_cfg, |
| 999 | .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg), |
| 1000 | }, |
| 1001 | }; |
| 1002 | |
| 1003 | /* ddr timing config params */ |
| 1004 | struct dram_timing_info dram_timing_ch2 = { |
| 1005 | .ddrc_cfg = lpddr4_ddrc_cfg, |
| 1006 | .ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg), |
| 1007 | .ddrphy_cfg = lpddr4_ddrphy_cfg, |
| 1008 | .ddrphy_cfg_num = ARRAY_SIZE(lpddr4_ddrphy_cfg), |
| 1009 | .fsp_msg = lpddr4_dram_fsp_msg, |
| 1010 | .fsp_msg_num = ARRAY_SIZE(lpddr4_dram_fsp_msg), |
| 1011 | .ddrphy_pie = lpddr4_phy_pie, |
| 1012 | .ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie), |
| 1013 | .fsp_table = { 3200, 667, }, |
| 1014 | }; |