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git01.mediatek.com / filogic / uboot / 79efdf634f063cb5cb452d875c135fd3434afb6a / . / configs / u200_defconfig
blob: f346b381e2f480096cf3507aa5c0ec11e5641d67 [file] [log] [blame]
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_MESON=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]3CONFIG_TEXT_BASE=0x01000000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]4CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]5CONFIG_ENV_SIZE=0x2000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]6CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]7CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200"
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]8CONFIG_MESON_G12A=y
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]9CONFIG_DEBUG_UART_BASE=0xff803000
10CONFIG_DEBUG_UART_CLOCK=24000000
11CONFIG_IDENT_STRING=" u200"
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]12CONFIG_SYS_LOAD_ADDR=0x1000000
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]13CONFIG_DEBUG_UART=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]14CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
15CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
Alper Nebi Yasak2beb0f42022-01-29 18:25:30 +0300[diff] [blame]16CONFIG_REMAKE_ELF=y
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]17CONFIG_OF_BOARD_SETUP=y
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]18# CONFIG_DISPLAY_CPUINFO is not set
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]19CONFIG_MISC_INIT_R=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]20CONFIG_SYS_MAXARGS=32
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]21# CONFIG_CMD_BDI is not set
22# CONFIG_CMD_IMI is not set
23CONFIG_CMD_GPIO=y
24# CONFIG_CMD_LOADS is not set
25CONFIG_CMD_MMC=y
Tom Rinic1ca5732019-06-21 10:11:23 -0400[diff] [blame]26CONFIG_CMD_USB=y
27CONFIG_CMD_USB_MASS_STORAGE=y
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]28# CONFIG_CMD_SETEXPR is not set
29CONFIG_CMD_REGULATOR=y
30CONFIG_OF_CONTROL=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]31CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]32CONFIG_MMC_MESON_GX=y
Neil Armstrong895595a2021-02-25 09:44:33 +0100[diff] [blame]33CONFIG_DM_MDIO=y
34CONFIG_DM_MDIO_MUX=y
Neil Armstrongb24a2202021-02-25 09:44:35 +0100[diff] [blame]35CONFIG_ETH_DESIGNWARE_MESON8B=y
Tom Rini579e9e82021-04-27 08:28:38 -0400[diff] [blame]36CONFIG_MDIO_MUX_MESON_G12A=y
Tom Rinic1ca5732019-06-21 10:11:23 -0400[diff] [blame]37CONFIG_MESON_G12A_USB_PHY=y
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]38CONFIG_PINCTRL=y
39CONFIG_PINCTRL_MESON_G12A=y
40CONFIG_DM_REGULATOR=y
41CONFIG_DM_REGULATOR_FIXED=y
42CONFIG_DM_RESET=y
Jerome Brunetd1e5b142019-02-12 14:23:25 +0100[diff] [blame]43CONFIG_DEBUG_UART_ANNOUNCE=y
44CONFIG_DEBUG_UART_SKIP_INIT=y
45CONFIG_MESON_SERIAL=y
Neil Armstrong9eedb292019-05-31 10:07:56 +0200[diff] [blame]46CONFIG_USB=y
Neil Armstrong9eedb292019-05-31 10:07:56 +0200[diff] [blame]47CONFIG_USB_XHCI_HCD=y
48CONFIG_USB_XHCI_DWC3=y
49CONFIG_USB_DWC3=y
Jean-Jacques Hiblot731a2a32019-09-11 11:33:53 +0200[diff] [blame]50# CONFIG_USB_DWC3_GADGET is not set
Neil Armstrong9eedb292019-05-31 10:07:56 +0200[diff] [blame]51CONFIG_USB_DWC3_MESON_G12A=y
Tom Rinic1ca5732019-06-21 10:11:23 -0400[diff] [blame]52CONFIG_USB_GADGET=y
Neil Armstrong9eedb292019-05-31 10:07:56 +0200[diff] [blame]53CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
54CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
Tom Rinic1ca5732019-06-21 10:11:23 -0400[diff] [blame]55CONFIG_USB_GADGET_DWC2_OTG=y
56CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
57CONFIG_USB_GADGET_DOWNLOAD=y
58CONFIG_OF_LIBFDT_OVERLAY=y