Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Board functions for Siemens TAURUS (AT91SAM9G20) based boards |
| 4 | * (C) Copyright Siemens AG |
| 5 | * |
| 6 | * Based on: |
| 7 | * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c |
| 8 | * |
| 9 | * (C) Copyright 2007-2008 |
| 10 | * Stelian Pop <stelian@popies.net> |
| 11 | * Lead Tech Design <www.leadtechdesign.com> |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 12 | */ |
| 13 | |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 14 | #include <command.h> |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 15 | #include <common.h> |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 16 | #include <dm.h> |
Simon Glass | 5e6201b | 2019-08-01 09:46:51 -0600 | [diff] [blame] | 17 | #include <env.h> |
Simon Glass | 8e20188 | 2020-05-10 11:39:54 -0600 | [diff] [blame] | 18 | #include <flash.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 19 | #include <init.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 20 | #include <asm/global_data.h> |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 21 | #include <asm/io.h> |
| 22 | #include <asm/arch/at91sam9260_matrix.h> |
| 23 | #include <asm/arch/at91sam9_smc.h> |
| 24 | #include <asm/arch/at91_common.h> |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 25 | #include <asm/arch/at91_rstc.h> |
| 26 | #include <asm/arch/gpio.h> |
| 27 | #include <asm/arch/at91sam9_sdramc.h> |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 28 | #include <asm/arch/atmel_serial.h> |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 29 | #include <asm/arch/clk.h> |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 30 | #include <asm/gpio.h> |
Masahiro Yamada | 2b7a873 | 2017-11-30 13:45:24 +0900 | [diff] [blame] | 31 | #include <linux/mtd/rawnand.h> |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 32 | #include <atmel_mci.h> |
Heiko Schocher | 398b45b | 2014-10-31 08:30:56 +0100 | [diff] [blame] | 33 | #include <asm/arch/at91_spi.h> |
| 34 | #include <spi.h> |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 35 | |
| 36 | #include <net.h> |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 37 | #ifndef CONFIG_DM_ETH |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 38 | #include <netdev.h> |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 39 | #endif |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 40 | |
| 41 | DECLARE_GLOBAL_DATA_PTR; |
| 42 | |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 43 | static void taurus_request_gpio(void) |
| 44 | { |
| 45 | gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena"); |
| 46 | gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy"); |
| 47 | gpio_request(AT91_PIN_PA25, "ena PHY"); |
| 48 | } |
| 49 | |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 50 | static void taurus_nand_hw_init(void) |
| 51 | { |
| 52 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
| 53 | struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
| 54 | unsigned long csa; |
| 55 | |
| 56 | /* Assign CS3 to NAND/SmartMedia Interface */ |
| 57 | csa = readl(&matrix->ebicsa); |
| 58 | csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; |
| 59 | writel(csa, &matrix->ebicsa); |
| 60 | |
| 61 | /* Configure SMC CS3 for NAND/SmartMedia */ |
| 62 | writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | |
| 63 | AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), |
| 64 | &smc->cs[3].setup); |
| 65 | writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) | |
| 66 | AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3), |
| 67 | &smc->cs[3].pulse); |
| 68 | writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), |
| 69 | &smc->cs[3].cycle); |
| 70 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
| 71 | AT91_SMC_MODE_EXNW_DISABLE | |
| 72 | AT91_SMC_MODE_DBW_8 | |
| 73 | AT91_SMC_MODE_TDF_CYCLE(3), |
| 74 | &smc->cs[3].mode); |
| 75 | |
| 76 | /* Configure RDY/BSY */ |
| 77 | at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
| 78 | |
| 79 | /* Enable NandFlash */ |
| 80 | at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
| 81 | } |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 82 | |
| 83 | #if defined(CONFIG_SPL_BUILD) |
| 84 | #include <spl.h> |
| 85 | #include <nand.h> |
Heiko Schocher | 6f2a325 | 2014-11-18 09:41:58 +0100 | [diff] [blame] | 86 | #include <spi_flash.h> |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 87 | |
| 88 | void matrix_init(void) |
| 89 | { |
| 90 | struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
| 91 | |
| 92 | writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE)) |
| 93 | | AT91_MATRIX_SLOT_CYCLE_(0x40), |
| 94 | &mat->scfg[3]); |
| 95 | } |
| 96 | |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 97 | #if defined(CONFIG_BOARD_AXM) |
| 98 | static int at91_is_recovery(void) |
| 99 | { |
| 100 | if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) && |
| 101 | (at91_get_gpio_value(AT91_PIN_PA27) == 0)) |
| 102 | return 1; |
| 103 | |
| 104 | return 0; |
| 105 | } |
| 106 | #elif defined(CONFIG_BOARD_TAURUS) |
| 107 | static int at91_is_recovery(void) |
| 108 | { |
| 109 | if (at91_get_gpio_value(AT91_PIN_PA31) == 0) |
| 110 | return 1; |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | #endif |
| 115 | |
Heiko Schocher | 6dcb362 | 2015-08-21 18:55:07 +0200 | [diff] [blame] | 116 | void spl_board_init(void) |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 117 | { |
| 118 | taurus_nand_hw_init(); |
Heiko Schocher | 6f2a325 | 2014-11-18 09:41:58 +0100 | [diff] [blame] | 119 | at91_spi0_hw_init(TAURUS_SPI_MASK); |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 120 | |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 121 | #if defined(CONFIG_BOARD_AXM) |
| 122 | /* Configure LED PINs */ |
| 123 | at91_set_gpio_output(AT91_PIN_PA6, 0); |
| 124 | at91_set_gpio_output(AT91_PIN_PA8, 0); |
| 125 | at91_set_gpio_output(AT91_PIN_PA9, 0); |
| 126 | at91_set_gpio_output(AT91_PIN_PA10, 0); |
| 127 | at91_set_gpio_output(AT91_PIN_PA11, 0); |
| 128 | at91_set_gpio_output(AT91_PIN_PA12, 0); |
| 129 | |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 130 | /* Configure recovery button PINs */ |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 131 | at91_set_gpio_input(AT91_PIN_PA26, 1); |
| 132 | at91_set_gpio_input(AT91_PIN_PA27, 1); |
| 133 | #elif defined(CONFIG_BOARD_TAURUS) |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 134 | at91_set_gpio_input(AT91_PIN_PA31, 1); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 135 | #endif |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 136 | |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 137 | /* check for recovery mode */ |
| 138 | if (at91_is_recovery() == 1) { |
Heiko Schocher | 6f2a325 | 2014-11-18 09:41:58 +0100 | [diff] [blame] | 139 | struct spi_flash *flash; |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 140 | |
Heiko Schocher | 6dcb362 | 2015-08-21 18:55:07 +0200 | [diff] [blame] | 141 | puts("Recovery button pressed\n"); |
Heiko Schocher | 6f2a325 | 2014-11-18 09:41:58 +0100 | [diff] [blame] | 142 | nand_init(); |
| 143 | spl_nand_erase_one(0, 0); |
| 144 | flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, |
| 145 | 0, |
| 146 | CONFIG_SF_DEFAULT_SPEED, |
Heiko Schocher | 6dcb362 | 2015-08-21 18:55:07 +0200 | [diff] [blame] | 147 | CONFIG_SF_DEFAULT_MODE); |
Heiko Schocher | 6f2a325 | 2014-11-18 09:41:58 +0100 | [diff] [blame] | 148 | if (!flash) { |
| 149 | puts("no flash\n"); |
| 150 | } else { |
| 151 | puts("erase spi flash sector 0\n"); |
| 152 | spi_flash_erase(flash, 0, |
| 153 | CONFIG_SYS_NAND_U_BOOT_SIZE); |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 154 | } |
| 155 | } |
| 156 | } |
| 157 | |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 158 | #define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \ |
| 159 | |AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \ |
| 160 | | AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \ |
| 161 | | AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \ |
| 162 | | AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10)) |
| 163 | |
| 164 | void sdramc_configure(unsigned int mask) |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 165 | { |
| 166 | struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
| 167 | struct sdramc_reg setting; |
| 168 | |
| 169 | at91_sdram_hw_init(); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 170 | setting.cr = SDRAM_BASE_CONF | mask; |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 171 | setting.mdr = AT91_SDRAMC_MD_SDRAM; |
| 172 | setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000; |
| 173 | |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 174 | writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC | |
| 175 | AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL, |
| 176 | &ma->ebicsa); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 177 | |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 178 | sdramc_initialize(ATMEL_BASE_CS1, &setting); |
| 179 | } |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 180 | |
| 181 | void mem_init(void) |
| 182 | { |
| 183 | unsigned int ram_size = 0; |
| 184 | |
| 185 | /* Configure SDRAM for 128MB */ |
| 186 | sdramc_configure(AT91_SDRAMC_NC_10); |
| 187 | |
| 188 | /* Do memtest for 128MB */ |
| 189 | ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
| 190 | CONFIG_SYS_SDRAM_SIZE); |
| 191 | |
| 192 | /* |
| 193 | * If 32MB or 16MB should be supported check also for |
| 194 | * expected mirroring at A16 and A17 |
| 195 | * To find mirror addresses depends how the collumns are connected |
| 196 | * at RAM (internaly or externaly) |
| 197 | * If the collumns are not in inverted order the mirror size effect |
| 198 | * behaves like normal SRAM with A0,A1,A2,etc. connected incremantal |
| 199 | */ |
| 200 | |
| 201 | /* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/ |
| 202 | if (ram_size == 0x800) { |
Heiko Schocher | 1af10bb | 2019-04-29 16:36:10 +0200 | [diff] [blame] | 203 | printf("\n\r 64MB\n"); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 204 | sdramc_configure(AT91_SDRAMC_NC_9); |
| 205 | } else { |
| 206 | /* Size already initialized */ |
Heiko Schocher | 1af10bb | 2019-04-29 16:36:10 +0200 | [diff] [blame] | 207 | printf("\n\r 128MB\n"); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 208 | } |
| 209 | } |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 210 | #endif |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 211 | |
| 212 | #ifdef CONFIG_MACB |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 213 | static void siemens_phy_reset(void) |
| 214 | { |
| 215 | /* |
| 216 | * we need to reset PHY for 200us |
| 217 | * because of bug in ATMEL G20 CPU (undefined initial state of GPIO) |
| 218 | */ |
| 219 | if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) == |
| 220 | AT91_RSTC_RSTTYP_GENERAL) |
| 221 | at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */ |
| 222 | } |
| 223 | |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 224 | static void taurus_macb_hw_init(void) |
| 225 | { |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 226 | /* Enable EMAC clock */ |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 227 | at91_periph_clk_enable(ATMEL_ID_EMAC0); |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 228 | |
| 229 | /* |
| 230 | * Disable pull-up on: |
| 231 | * RXDV (PA17) => PHY normal mode (not Test mode) |
| 232 | * ERX0 (PA14) => PHY ADDR0 |
| 233 | * ERX1 (PA15) => PHY ADDR1 |
| 234 | * ERX2 (PA25) => PHY ADDR2 |
| 235 | * ERX3 (PA26) => PHY ADDR3 |
| 236 | * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 |
| 237 | * |
| 238 | * PHY has internal pull-down |
| 239 | */ |
| 240 | at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0); |
| 241 | at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); |
| 242 | at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0); |
| 243 | at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0); |
| 244 | at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0); |
| 245 | at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0); |
| 246 | |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 247 | siemens_phy_reset(); |
| 248 | |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 249 | at91_phy_reset(); |
| 250 | |
| 251 | at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */ |
| 252 | |
| 253 | /* Re-enable pull-up */ |
| 254 | at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1); |
| 255 | at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); |
| 256 | at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1); |
| 257 | at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1); |
| 258 | at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1); |
| 259 | at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1); |
| 260 | |
| 261 | /* Initialize EMAC=MACB hardware */ |
| 262 | at91_macb_hw_init(); |
| 263 | } |
| 264 | #endif |
| 265 | |
| 266 | #ifdef CONFIG_GENERIC_ATMEL_MCI |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 267 | int board_mmc_init(struct bd_info *bd) |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 268 | { |
| 269 | at91_mci_hw_init(); |
| 270 | |
| 271 | return atmel_mci_init((void *)ATMEL_BASE_MCI); |
| 272 | } |
| 273 | #endif |
| 274 | |
| 275 | int board_early_init_f(void) |
| 276 | { |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 277 | /* Enable clocks for all PIOs */ |
Heiko Schocher | 5453c6c | 2014-10-31 08:31:05 +0100 | [diff] [blame] | 278 | at91_periph_clk_enable(ATMEL_ID_PIOA); |
| 279 | at91_periph_clk_enable(ATMEL_ID_PIOB); |
| 280 | at91_periph_clk_enable(ATMEL_ID_PIOC); |
| 281 | |
| 282 | at91_seriald_hw_init(); |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 283 | taurus_request_gpio(); |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 284 | |
| 285 | return 0; |
| 286 | } |
| 287 | |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 288 | #ifdef CONFIG_USB_GADGET_AT91 |
| 289 | #include <linux/usb/at91_udc.h> |
| 290 | |
| 291 | void at91_udp_hw_init(void) |
| 292 | { |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 293 | /* Enable PLLB */ |
Wenyou Yang | c5c6efe | 2016-02-03 10:20:45 +0800 | [diff] [blame] | 294 | at91_pllb_clk_enable(get_pllb_init()); |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 295 | |
| 296 | /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */ |
| 297 | at91_periph_clk_enable(ATMEL_ID_UDP); |
| 298 | |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 299 | at91_system_clk_enable(AT91SAM926x_PMC_UDP); |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | struct at91_udc_data board_udc_data = { |
| 303 | .baseaddr = ATMEL_BASE_UDP0, |
| 304 | }; |
| 305 | #endif |
| 306 | |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 307 | int board_init(void) |
| 308 | { |
| 309 | /* adress of boot parameters */ |
| 310 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
| 311 | |
Heiko Schocher | 649d810 | 2016-05-25 07:23:48 +0200 | [diff] [blame] | 312 | taurus_request_gpio(); |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 313 | #ifdef CONFIG_CMD_NAND |
| 314 | taurus_nand_hw_init(); |
| 315 | #endif |
| 316 | #ifdef CONFIG_MACB |
| 317 | taurus_macb_hw_init(); |
| 318 | #endif |
Heiko Schocher | 398b45b | 2014-10-31 08:30:56 +0100 | [diff] [blame] | 319 | at91_spi0_hw_init(TAURUS_SPI_MASK); |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 320 | #ifdef CONFIG_USB_GADGET_AT91 |
| 321 | at91_udp_hw_init(); |
| 322 | at91_udc_probe(&board_udc_data); |
| 323 | #endif |
Heiko Schocher | cfcad35 | 2013-12-02 07:47:22 +0100 | [diff] [blame] | 324 | |
| 325 | return 0; |
| 326 | } |
| 327 | |
| 328 | int dram_init(void) |
| 329 | { |
| 330 | gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
| 331 | CONFIG_SYS_SDRAM_SIZE); |
| 332 | return 0; |
| 333 | } |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 334 | |
| 335 | #if !defined(CONFIG_SPL_BUILD) |
| 336 | #if defined(CONFIG_BOARD_AXM) |
| 337 | /* |
| 338 | * Booting the Fallback Image. |
| 339 | * |
| 340 | * The function is used to provide and |
| 341 | * boot the image with the fallback |
| 342 | * parameters, incase if the faulty image |
| 343 | * in upgraded over the base firmware. |
| 344 | * |
| 345 | */ |
| 346 | static int upgrade_failure_fallback(void) |
| 347 | { |
| 348 | char *partitionset_active = NULL; |
| 349 | char *rootfs = NULL; |
| 350 | char *rootfs_fallback = NULL; |
| 351 | char *kern_off; |
| 352 | char *kern_off_fb; |
| 353 | char *kern_size; |
| 354 | char *kern_size_fb; |
| 355 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 356 | partitionset_active = env_get("partitionset_active"); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 357 | if (partitionset_active) { |
| 358 | if (partitionset_active[0] == 'A') |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 359 | env_set("partitionset_active", "B"); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 360 | else |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 361 | env_set("partitionset_active", "A"); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 362 | } else { |
| 363 | printf("partitionset_active missing.\n"); |
| 364 | return -ENOENT; |
| 365 | } |
| 366 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 367 | rootfs = env_get("rootfs"); |
| 368 | rootfs_fallback = env_get("rootfs_fallback"); |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 369 | env_set("rootfs", rootfs_fallback); |
| 370 | env_set("rootfs_fallback", rootfs); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 371 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 372 | kern_size = env_get("kernel_size"); |
| 373 | kern_size_fb = env_get("kernel_size_fallback"); |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 374 | env_set("kernel_size", kern_size_fb); |
| 375 | env_set("kernel_size_fallback", kern_size); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 376 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 377 | kern_off = env_get("kernel_Off"); |
| 378 | kern_off_fb = env_get("kernel_Off_fallback"); |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 379 | env_set("kernel_Off", kern_off_fb); |
| 380 | env_set("kernel_Off_fallback", kern_off); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 381 | |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 382 | env_set("bootargs", '\0'); |
| 383 | env_set("upgrade_available", '\0'); |
| 384 | env_set("boot_retries", '\0'); |
Simon Glass | d49b889 | 2017-08-03 12:22:08 -0600 | [diff] [blame] | 385 | env_save(); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 386 | |
| 387 | return 0; |
| 388 | } |
| 389 | |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 390 | static int do_upgrade_available(struct cmd_tbl *cmdtp, int flag, int argc, |
| 391 | char *const argv[]) |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 392 | { |
| 393 | unsigned long upgrade_available = 0; |
| 394 | unsigned long boot_retry = 0; |
| 395 | char boot_buf[10]; |
| 396 | |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 397 | upgrade_available = dectoul(env_get("upgrade_available"), NULL); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 398 | if (upgrade_available) { |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 399 | boot_retry = dectoul(env_get("boot_retries"), NULL); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 400 | boot_retry++; |
| 401 | sprintf(boot_buf, "%lx", boot_retry); |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 402 | env_set("boot_retries", boot_buf); |
Simon Glass | d49b889 | 2017-08-03 12:22:08 -0600 | [diff] [blame] | 403 | env_save(); |
Heiko Schocher | b777357 | 2015-08-21 18:53:46 +0200 | [diff] [blame] | 404 | |
| 405 | /* |
| 406 | * Here the boot_retries count is checked, and if the |
| 407 | * count becomes greater than 2 switch back to the |
| 408 | * fallback, and reset the board. |
| 409 | */ |
| 410 | |
| 411 | if (boot_retry > 2) { |
| 412 | if (upgrade_failure_fallback() == 0) |
| 413 | do_reset(NULL, 0, 0, NULL); |
| 414 | return -1; |
| 415 | } |
| 416 | } |
| 417 | return 0; |
| 418 | } |
| 419 | |
| 420 | U_BOOT_CMD( |
| 421 | upgrade_available, 1, 1, do_upgrade_available, |
| 422 | "check Siemens update", |
| 423 | "no parameters" |
| 424 | ); |
| 425 | #endif |
| 426 | #endif |